Texas Instruments TPS54426PWP
- Part No.:
- TPS54426PWP
- Manufacturer:
- Texas Instruments
- Package:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS54426PWP.pdf
- Description:
- IC REG BUCK ADJ 4A 14HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:170
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS54426PWP from Texas Instruments is a 4-A synchronous step-down DC/DC converter with integrated 65 mΩ high-side and 55 mΩ low-side N-channel MOSFETs, D-CAP2™ adaptive on-time control, and Auto-Skip Eco-mode™ for light-load efficiency. It operates from 4.5 V to 18 V input, delivers 0.76 V to 5.5 V output, and features 700-kHz pseudo-fixed switching frequency-used in digital TV power supplies and Blu-ray disc player voltage regulation.
For engineers reviewing the TPS54426PWP datasheet, TPS54426PWP pinout, TPS54426PWP application, or TPS54426PWP equivalent, key selection considerations include its HTSSOP-14 PowerPAD™ package thermal performance, cycle-by-cycle overcurrent protection, pre-biased soft-start capability, and compatibility with ultra-low-ESR ceramic output capacitors without external compensation.
Technical Context
The TPS54426PWP implements D-CAP2™ mode control, combining adaptive on-time PWM with internal ramp compensation to achieve fast transient response and stability with ceramic output capacitors. Its on-time is inversely proportional to VIN and proportional to VOUT, enabling ~700 kHz operation across input voltage range without an external oscillator.
Eco-mode™ enables seamless transition from continuous conduction mode (CCM) at heavy loads to discontinuous conduction mode (DCM) at light loads, maintaining high efficiency down to microamp-level output currents. The device integrates VREG5 (5.5 V ±3%), power-good open-drain output, and internal output discharge MOSFET (50–100 Ω) for controlled shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 18 V - supports wide industrial and consumer input rails including 5 V, 12 V, and 15 V bus systems. |
| Output Current | 4 A continuous - sufficient for powering core logic, FPGAs, and SoCs in embedded video systems. |
| Output Voltage Range | 0.76 V to 5.5 V - programmable via resistor divider; includes 1.05 V, 1.2 V, 1.8 V, 2.5 V, 3.3 V, and 5 V standard rails. |
| Switching Frequency | ~700 kHz - fixed-frequency behavior enables predictable EMI filtering and compact magnetics design. |
| High-Side RDS(on) | 65 mΩ @ 25°C - minimizes conduction loss at high duty cycles; optimized for lower-VOUT applications. |
| Low-Side RDS(on) | 55 mΩ @ 25°C - reduces conduction loss during freewheeling; supports high-efficiency synchronous rectification. |
| Shutdown Current | <10 μA - enables ultra-low-power system standby states without external enable sequencing. |
| Feedback Reference | 0.765 V ±1.5% - high-accuracy bandgap reference ensures tight output regulation across temperature. |
Pinout & Package
The TPS54426PWP uses a 14-pin HTSSOP package with exposed PowerPAD™ thermal pad (PWP suffix), designed for soldered thermal connection to PGND on PCB layer. Thermal resistance θJA = 55.6°C/W, θJCbot = 4.3°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VO (Pin 1) | Output voltage node | Connects directly to output capacitor and inductor; used for on-time adjustment and feedback sensing path. |
| VFB (Pin 2) | Feedback input | High-impedance input monitoring resistor-divider output; sets regulated VOUT with 0.765 V reference. |
| VREG5 (Pin 3) | Internal 5.5 V LDO output | Supplies internal circuitry and can source up to 70 mA; requires 1 µF ceramic bypass to PGND. |
| SS (Pin 4) | Soft-start control | 2 µA current source charges external capacitor; enables adjustable startup ramp and pre-biased start capability. |
| GND (Pin 5) | Signal ground | Reference for analog circuits; must be connected to PGND near IC with low-inductance trace. |
| PG (Pin 6) | Power-good open-drain | Asserts high after 1.7× soft-start time when VOUT is within ±10%; requires external pull-up to VREG5 (20–150 kΩ). |
| EN (Pin 7) | Enable input | Active-high logic input; pulls up internally; <0.4 V disables device and activates output discharge MOSFET. |
| PGND1, PGND2 (Pins 8,9) | Power ground returns | Low-side MOSFET source connections and current-sense comparator inputs; must tie strongly to PowerPAD™. |
| SW1, SW2 (Pins 10,11) | Switch nodes | Drain-source junctions of internal FETs; connect to inductor; require low-parasitic layout and Kelvin feedback routing. |
| VBST (Pin 12) | Bootstrap supply | Charges high-side gate driver via 0.1 µF ceramic capacitor to respective SW pin; internal diode from VREG5. |
| VIN1, VIN2 (Pins 13,14) | Main input supply | Connect to bulk and decoupling capacitors; dual pins reduce IR drop and improve thermal distribution. |
| PowerPAD™ (Back side) | Thermal and electrical ground | Exposed copper pad; must be soldered to PGND plane with ≥6 thermal vias for reliable 4-A operation. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP2™ adaptive on-time control | Eliminates external compensation components and enables stable operation with ceramic output capacitors as low as 22 µF. |
| Auto-Skip Eco-mode™ | Reduces light-load quiescent current to <10 μA while maintaining regulation; avoids audible noise and improves standby efficiency. |
| Pre-biased soft-start | Prevents sinking current from pre-charged output rail during startup by gradually enabling low-side FET gate drive. |
| Integrated output discharge | 50–100 Ω internal MOSFET actively discharges VO when EN = low or fault occurs-no external circuit required. |
| Cycle-by-cycle overcurrent protection | Valley-current sensing on low-side FET enables fast, accurate current limiting without external sense resistor. |
| Power-good with hysteresis | Open-drain PG asserts after 1.7× soft-start time and deasserts within 5 µs if VFB drops below 85% of target-supports sequenced system power-up. |
Applications
| Digital TV Power Supply | Blu-ray Disc Player |
|---|---|
Use Scenario: Supplies 1.2 V core and 3.3 V I/O rails to main SoC and HDMI interface in flat-panel TV designs. IC Role / Device Role / Timing Role: Primary buck regulator delivering 4 A at 1.2 V with fast load-step response to handle video processing bursts. Use Value: D-CAP2™ control reduces output capacitance by >30% vs. traditional PWM, lowering BOM cost and board area. | Use Scenario: Powers laser diode driver, servo motor controller, and MPEG decoder in high-definition optical playback units. IC Role / Device Role / Timing Role: Main 5 V → 1.8 V/2.5 V point-of-load converter with Eco-mode™ extending battery-backed standby time. Use Value: Pre-biased soft-start prevents voltage droop on shared 3.3 V rail during cold boot, ensuring clean firmware initialization. |
| Networking Home Terminal | Digital Set Top Box (STB) |
Use Scenario: Generates 1.05 V DDR3 memory supply and 1.8 V PHY voltage in cable/fiber gateway devices. IC Role / Device Role / Timing Role: Synchronous buck delivering tightly regulated low-noise output with <10 mV ripple at 4 A load. Use Value: Integrated VREG5 powers auxiliary logic and enables single-supply system design-no external 5 V LDO needed. | Use Scenario: Provides 1.2 V processor core, 3.3 V tuner, and 5 V USB peripheral rails in multi-tuner STB platforms. IC Role / Device Role / Timing Role: Dual-output capable via cascaded configuration; PG signal coordinates FPGA configuration sequence. Use Value: 700-kHz switching allows use of small 22 µH inductors and 22 µF ceramic caps-reducing solution size by 40% vs. 300-kHz alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54428PWP | Same pinout, 4.5–18 V input, but rated for 6 A output and higher RDS(on) (52 mΩ HS / 42 mΩ LS); no VREG5 output. | Supports higher current loads but lacks integrated 5 V bias rail-requires external LDO for auxiliary circuitry. | Select when >4 A peak current is needed and VREG5 is not required; verify thermal margin with θJA = 55.6°C/W. |
| MP2342DL-LF-Z | 4.5–18 V input, 4 A rating, 500 kHz fixed frequency, no Eco-mode™, no VREG5, QFN-16 package. | Lower switching frequency increases inductor size; lacks pre-biased soft-start and power-good functionality. | Choose for cost-sensitive designs where soft-start sequencing and auxiliary bias are handled externally. |
Compared with TPS54426PWP, TPS54428PWP offers higher current headroom but removes VREG5 integration, while MP2342DL-LF-Z sacrifices Eco-mode™ efficiency and advanced startup features for simpler control and lower unit cost-neither is pin-compatible nor drop-in.
Availability
TPS54426PWP is available at Aetrix Electronics and suitable for digital TV power supplies, Blu-ray disc players, networking home terminals, and digital set-top boxes requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for TPS54426PWP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion.
The TPS54426 belongs to TI's SWIFT™ synchronous buck converter family, engineered for space-constrained consumer and industrial applications demanding high efficiency, fast transient response, and minimal external components.
FAQ
What is the maximum output current capability of the TPS54426PWP?
The TPS54426PWP is rated for 4 A continuous output current under recommended operating conditions (TA = –40°C to 85°C, proper PCB thermal design). Its current limit threshold is 4.7–7.5 A depending on temperature and test conditions, and it includes cycle-by-cycle overcurrent protection to safeguard against short-circuit events. Derating is required above 85°C ambient or with insufficient thermal vias on the PowerPAD™.
Does the TPS54426PWP support pre-biased output startup?
Yes, the TPS54426PWP includes proprietary pre-biased soft-start circuitry that prevents reverse current flow from the output during power-up. When the output voltage is already present before EN assertion, the controller incrementally enables the low-side FET gate drive on a cycle-by-cycle basis-ensuring smooth ramp-up without disrupting downstream circuitry. This feature is confirmed in the functional description and startup waveform figures of the SLVSAD6C datasheet.
What package type and thermal characteristics apply to the TPS54426PWP?
The TPS54426PWP uses a 14-pin HTSSOP package with PowerPAD™ (PWP suffix), featuring an exposed thermal pad on the underside. Its junction-to-ambient thermal resistance is 55.6°C/W, and junction-to-case (bottom) is 4.3°C/W. Reliable 4-A operation requires soldering the PowerPAD™ to a PGND plane with ≥6 thermal vias and minimizing trace inductance on VIN/PGND paths per TI layout guidelines.
Can the TPS54426PWP operate with ceramic output capacitors only?
Yes, the TPS54426PWP is explicitly designed for use with ultra-low-ESR ceramic output capacitors (e.g., 22 µF–68 µF X5R/X7R), enabled by its D-CAP2™ control architecture. Unlike traditional voltage-mode controllers, it does not require ESR-induced ripple for stability-eliminating the need for tantalum or polymer capacitors. The datasheet confirms stable operation with 22 µF ceramics and provides recommended values in Table 1.
What is the function of the VREG5 pin on the TPS54426PWP?
The VREG5 pin on the TPS54426PWP provides a regulated 5.5 V ±3% output (typical 5.5 V at 0–70 mA load), derived from VIN and used to power internal circuitry and optionally external bias rails. It requires a 1 µF ceramic capacitor to PGND and features line/load regulation of ≤20 mV/100 mV. VREG5 must remain above 3.8 V for normal operation, as it feeds the UVLO comparator-making it critical for system-level power sequencing.
TPS54426PWP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SWIFT™, D-CAP2™, Eco-Mode™
- Package/Case:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.76V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 4A
- Frequency - Switching:
- 700kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-HTSSOP
TPS54426PWP FAQ
1.How can I place an order for TPS54426PWP through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54426PWP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54426PWP reliable?
The price and inventory of TPS54426PWP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54426PWP is usually 5 days.
3.What payment methods are accepted for TPS54426PWP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54426PWP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54426PWP?
TPS54426PWP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54426PWP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54426PWP?
For technical support, including TPS54426PWP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54426PWP requirements.
6.How does Aetrix verify that TPS54426PWP is sourced from the original manufacturer or authorized distributors?
All TPS54426PWP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54426PWP meets industry standards.
7.What is the process for return or replacement of TPS54426PWP?
All TPS54426PWP units undergo pre-shipment inspection (PSI). If there is an issue with TPS54426PWP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54426PWP part is unused and in its original packaging.
Return procedure for TPS54426PWP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS54426PWP Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

