My Inquiry
My Account
Texas Instruments TPS54429EPWP
- Part No.:
- TPS54429EPWP
- Manufacturer:
- Texas Instruments
- Package:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS54429EPWP.pdf
- Description:
- IC REG BUCK ADJ 4.5A 14HTSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,588
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS54429EPWP from Texas Instruments is a 4.5-A synchronous step-down DC/DC converter with integrated high-side (63 mΩ) and low-side (55 mΩ) N-channel MOSFETs, D-CAP2™ adaptive on-time control, 700-kHz pseudo-fixed switching frequency, and Eco-mode™ for light-load efficiency. It delivers regulated output from 0.76 V to 5.5 V across 7–18 V input, used in digital TV power supplies and Blu-ray disc players.
For engineers reviewing the TPS54429EPWP datasheet, TPS54429EPWP pinout, TPS54429EPWP application, or TPS54429EPWP equivalent, key selection considerations include its HTSSOP-14 PowerPAD™ thermal package, cycle-by-cycle overcurrent protection, pre-biased soft-start capability, and compatibility with ultra-low-ESR ceramic output capacitors.
Technical Context
The TPS54429EPWP implements D-CAP2™ mode control-combining adaptive on-time PWM with internal compensation-to achieve fast transient response without external loop compensation. Its on-time is inversely proportional to VIN and proportional to VOUT, enabling stable operation with ceramic output capacitors down to 22 µF.
Eco-mode™ enables automatic transition from PWM to pulse-frequency modulation at light loads, reducing quiescent current to <10 µA in shutdown and maintaining >85% efficiency at 10 mA output. Protection includes non-latching cycle-by-cycle OCP, thermal shutdown at 165°C, and output over/under-voltage detection referenced to VFB.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 7 V to 18 V - supports wide industrial and consumer DC bus inputs including 12-V systems with ±10% tolerance. |
| Output Voltage Range | 0.76 V to 5.5 V - programmable via resistor divider; 0.765-V internal reference enables precise low-voltage rail generation. |
| Continuous Output Current | 4.5 A - sustained delivery with integrated FETs; peak current limit ≥5.2 A ensures margin under transient load steps. |
| Switching Frequency | 700 kHz (typical) - pseudo-constant frequency set by adaptive on-time; enables compact magnetics and EMI filtering. |
| High-Side RDS(on) | 63 mΩ - reduces conduction loss at high duty cycles; optimized for 7–18 V input with 1.05–3.3 V outputs. |
| Low-Side RDS(on) | 55 mΩ - minimizes dropout loss during discontinuous conduction mode; supports efficient Eco-mode operation. |
| Shutdown Current | <10 µA - enables ultra-low-power system standby; critical for always-on consumer electronics. |
| Soft-Start Time | Adjustable via external capacitor - 2 µA SS charge current allows precise ramp control; supports pre-biased output startup. |
Pinout & Package
TPS54429EPWP uses the 14-pin HTSSOP (PWP) package with exposed PowerPAD™ thermal pad soldered to PGND for enhanced thermal dissipation (θJA = 55.6°C/W). The package is rated for –20°C to +85°C ambient operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VO (Pin 1) | Output voltage node | Connects to LC filter output; serves as on-time adjustment reference and feedback sensing point. |
| VFB (Pin 2) | Feedback input | Monitors divided output voltage; 0.765-V internal reference sets regulation accuracy and OVP/UVP thresholds. |
| VREG5 (Pin 3) | 5.5-V internal LDO output | Supplies internal circuitry and can source up to 70 mA; requires 1-µF ceramic bypass to PGND. |
| SS (Pin 4) | Soft-start control | 2-µA current source charges external capacitor; enables adjustable ramp time and pre-biased startup. |
| GND (Pin 5) | Signal ground | Reference for analog circuitry; must be star-connected to PGND near IC to minimize noise coupling. |
| PG (Pin 6) | Open-drain power-good | Asserts after 1.7× soft-start time when VOUT is within ±10%; sinks 5 mA max at 0.5 V. |
| EN (Pin 7) | Enable input | Active-high logic control; 2-V threshold enables direct MCU GPIO drive; pulls up internally if left floating. |
| PGND1, PGND2 (Pins 8,9) | Power ground returns | Low-side MOSFET source connections and current-sense comparator inputs; must tie directly to PowerPAD™. |
| SW1, SW2 (Pins 10,11) | Switch nodes | Connect to inductor terminals; carry high di/dt switching currents; require minimal trace area to reduce EMI. |
| VBST (Pin 12) | Bootstrap supply | Drives high-side gate; requires 0.1-µF ceramic capacitor between VBST and respective SW pin. |
| VIN1, VIN2 (Pins 13,14) | Main input supply | Connect to bulk input capacitor; dual pins reduce IR drop and improve thermal distribution under 4.5-A load. |
| PowerPAD™ (Backside) | Thermal and electrical ground | Must be soldered to PGND plane with ≥6 thermal vias; primary path for heat removal and current return. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP2™ adaptive on-time control | Eliminates need for external compensation components; enables stable regulation with ceramic output capacitors as low as 22 µF. |
| Eco-mode™ light-load optimization | Reduces quiescent current to <10 µA in shutdown and maintains >85% efficiency at 10 mA output current. |
| Pre-biased soft-start | Prevents sinking current from pre-charged output rails by incrementally enabling low-side FET gate drive. |
| Cycle-by-cycle overcurrent protection | Monitors low-side switch voltage during conduction; triggers non-latching shutdown at ≥5.2 A peak current. |
| Integrated VREG5 LDO | Provides 5.5-V ±3% regulated supply for internal logic and external bias; sources up to 70 mA with 100-mV load regulation. |
| Power good with delay timing | Asserts open-drain PG after 1.7× soft-start time; deasserts within 5 µs if VFB falls below 85% of target. |
Applications
| Digital TV Power Supply | Blu-ray Disc Player |
|---|---|
|
Use Scenario: Primary 1.2-V and 3.3-V rail generation from 12-V DC input in flat-panel TV main board. IC Role / Device Role / Timing Role: Synchronous buck regulator delivering 4.5-A continuous current with fast transient response to handle video processing load spikes. Use Value: D-CAP2™ control reduces output capacitance by 40% vs. voltage-mode controllers; Eco-mode™ cuts standby power by 65%. |
Use Scenario: Core SoC and memory rail supply in high-definition optical disc playback system. IC Role / Device Role / Timing Role: Main DC/DC converter regulating 1.05-V CPU core voltage with tight ripple (<15 mVpp) and ±1% accuracy. Use Value: Pre-biased soft-start prevents brownout during hot-plug insertion; PowerPAD™ thermal design sustains 4.5-A load at 70°C ambient. |
| Networking Home Terminal | Digital Set Top Box (STB) |
|
Use Scenario: Dual-rail (1.8-V I/O, 3.3-V PHY) power delivery in residential gateway with PoE-derived 12-V input. IC Role / Device Role / Timing Role: High-efficiency step-down converter supporting burst-mode Ethernet traffic with sub-100-ns transient recovery. Use Value: 700-kHz switching enables small 22-µH inductors; low 55-mΩ low-side RDS(on) improves light-load efficiency above 90%. |
Use Scenario: Main 1.2-V processor and 2.5-V tuner supply in cable/satellite STB with thermal constraints in sealed enclosure. IC Role / Device Role / Timing Role: Thermally robust buck regulator operating continuously at 4.5-A with junction temperature ≤125°C. Use Value: Exposed PowerPAD™ reduces θJA by 35% vs. standard HTSSOP; thermal shutdown at 165°C prevents field failures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54428PWP | Same D-CAP2™ architecture but rated for 4-A continuous output; higher RDS(on) (75 mΩ HS / 65 mΩ LS); no VREG5 output. | Lacks integrated 5.5-V LDO; requires external bias for enable logic and PG pull-up; lower current rating limits use in 4.5-A designs. | Select only if output current ≤4 A and external VREG5 is available; not suitable for pre-biased startup or single-rail biasing. |
| MP2315GJ-Z | Monolithic 4.5-A buck with 500-kHz fixed frequency; 65 mΩ/45 mΩ FETs; no Eco-mode™; requires external compensation. | Fixed-frequency operation increases EMI filtering complexity; lacks D-CAP2™'s ceramic-capacitor compatibility and pre-biased soft-start. | Choose for cost-sensitive designs where 700-kHz switching and Eco-mode™ efficiency are non-critical; verify loop stability with external RC network. |
Compared with TPS54429EPWP, TPS54428PWP offers reduced integration and lower current capability, while MP2315GJ-Z trades adaptive control and light-load optimization for simpler layout and lower BOM count-neither provides identical thermal performance or soft-start flexibility.
Availability
TPS54429EPWP is available at Aetrix Electronics and suitable for digital TV power supplies, Blu-ray disc players, networking home terminals, and digital set top boxes requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TPS54429EPWP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion and automotive-grade reliability.
The TPS54429E product line delivers high-current synchronous buck converters optimized for consumer electronics power rails-emphasizing fast transient response, light-load efficiency, and seamless integration with ceramic capacitors and compact PCB layouts.
FAQ
What is the maximum continuous output current supported by the TPS54429EPWP?
The TPS54429EPWP supports 4.5 A of continuous output current under recommended operating conditions (TA = –20°C to 85°C, proper thermal layout). Its cycle-by-cycle overcurrent protection triggers at ≥5.2 A, providing headroom for transient peaks. Derating is required above 70°C ambient due to thermal limits-junction temperature must remain ≤150°C.
Does the TPS54429EPWP support pre-biased output startup?
Yes, the TPS54429EPWP includes proprietary pre-biased soft-start circuitry. When the output voltage is already present at startup, the controller incrementally enables the low-side FET gate drive to avoid sinking current from the pre-charged rail. This ensures smooth ramp-up without output voltage collapse or inrush stress on downstream components.
What is the purpose of the VREG5 pin on the TPS54429EPWP?
The VREG5 pin on the TPS54429EPWP provides a regulated 5.5-V output (±3%) derived from VIN, capable of sourcing up to 70 mA. It powers internal control circuitry and can bias external components like EN pull-ups or PG resistors. A 1-µF ceramic capacitor to PGND is mandatory; VREG5 is disabled when EN is low or open.
How does Eco-mode™ improve light-load efficiency in the TPS54429EPWP?
Eco-mode™ in the TPS54429EPWP automatically transitions from PWM to pulse-frequency modulation at light loads, reducing switching losses and gate drive current. This lowers quiescent current to <10 µA in shutdown and maintains >85% efficiency at 10 mA output-critical for always-on consumer devices where standby power directly impacts energy certification.
What thermal management requirements apply to the TPS54429EPWP's PowerPAD™?
The TPS54429EPWP's PowerPAD™ must be soldered to a PGND copper plane with ≥6 thermal vias (0.3-mm diameter, spaced ≤1 mm apart) to achieve θJA = 55.6°C/W. Failure to connect the thermal pad results in excessive junction temperature rise-thermal shutdown may activate at ≤3 A load. TI recommends using the SLMA004 layout guide for optimal via placement and copper fill.
TPS54429EPWP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SWIFT™, D-CAP2™, Eco-Mode™
- Package/Case:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 7V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.76V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 4.5A
- Frequency - Switching:
- 700kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -20°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-HTSSOP
TPS54429EPWP FAQ
1.How can I place an order for TPS54429EPWP through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54429EPWP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54429EPWP reliable?
The price and inventory of TPS54429EPWP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54429EPWP is usually 5 days.
3.What payment methods are accepted for TPS54429EPWP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54429EPWP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54429EPWP?
TPS54429EPWP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54429EPWP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54429EPWP?
For technical support, including TPS54429EPWP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54429EPWP requirements.
6.How does Aetrix verify that TPS54429EPWP is sourced from the original manufacturer or authorized distributors?
All TPS54429EPWP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54429EPWP meets industry standards.
7.What is the process for return or replacement of TPS54429EPWP?
All TPS54429EPWP units undergo pre-shipment inspection (PSI). If there is an issue with TPS54429EPWP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54429EPWP part is unused and in its original packaging.
Return procedure for TPS54429EPWP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS54429EPWP Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
