Texas Instruments TPS54519RTET
- Part No.:
- TPS54519RTET
- Manufacturer:
- Texas Instruments
- Package:
- 16-WFQFN Exposed Pad
- Datasheet:
-
TPS54519RTET.pdf
- Description:
- IC REG BUCK ADJ 5A 16WQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS54519RTET from Texas Instruments is a 6-V input, 5-A synchronous step-down (buck) DC/DC converter with integrated high- and low-side 30 mΩ MOSFETs, 0.6 V ±1% reference, adjustable 200–2000 kHz switching frequency via RT pin, and power-good output with 2% hysteresis - designed for point-of-load regulation in FPGA, ASIC, and microprocessor power rails.
For engineers reviewing the TPS54519RTET datasheet, TPS54519RTET pinout, TPS54519RTET application, or TPS54519RTET equivalent, key selection considerations include its thermally enhanced 3 mm × 3 mm QFN-16 package with PowerPAD™, safe startup into pre-biased outputs, cycle-by-cycle current limit (7.0 A typ), and UV/OV protection with programmable enable threshold.
Technical Context
The TPS54519RTET implements constant-frequency peak current mode control with internal slope compensation to prevent subharmonic oscillation across duty cycles. Its transconductance error amplifier (250 μA/V normal, 85 μA/V during slow start) compares VSENSE against either the 0.6 V reference or SS/TR voltage, enabling precise output regulation and tracking capability.
It integrates a boot regulator with BOOT-PH UVLO (2.1–2.75 V), supports 100% duty cycle operation when BOOT-PH > 2.1 V, and features frequency foldback during overcurrent or startup to limit inductor current. The PWRGD open-drain output asserts low when VSENSE falls below 93% or exceeds 107% of VREF, with 2% hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.95 V to 6 V - supports single-cell Li-ion, 3.3 V, and 5 V rail inputs without external LDO pre-regulation. |
| Output Current | 5 A continuous - enables compact high-density power delivery for DSPs, FPGAs, and SoCs. |
| Reference Voltage | 0.6 V ±1% at 25°C - sets minimum output voltage and enables accurate resistor-divider-based VOUT programming. |
| Switching Frequency | 200–2000 kHz adjustable via RT pin - allows optimization of size (high fSW) vs. efficiency (low fSW) and EMI filtering. |
| Current Limit Threshold | 6.0–8.0 A - provides robust cycle-by-cycle overcurrent protection with thermal foldback. |
| Quiescent Current | 455–500 μA - minimizes no-load power loss in always-on systems; drops to ≤5 μA in shutdown. |
| Operating Junction Temp | –40°C to 140°C - qualified for industrial and extended-temperature embedded applications. |
Pinout & Package
TPS54519RTET is housed in a thermally enhanced 3 mm × 3 mm, 16-pin QFN package with exposed PowerPAD™ (Pin 17) requiring PCB vias to internal ground plane for optimal thermal performance and electrical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pins 1, 2, 16) | Input supply connection | Accepts 2.95–6 V; multiple pins reduce trace resistance and improve current handling. |
| PH (Pins 10, 11, 12) | High-side MOSFET source / low-side MOSFET drain node | Switching node tied to inductor; requires low-inductance layout and ceramic output capacitor placement. |
| BOOT (Pin 13) | Bootstrap gate drive supply | Connects to PH via 0.1 μF X7R/X5R ceramic capacitor; enables high-side N-MOSFET drive above VIN. |
| VSENSE (Pin 6) | Error amplifier inverting input | Monitors feedback divider; regulates output by comparing against 0.6 V reference or SS/TR voltage. |
| COMP (Pin 7) | Error amplifier output | Drives PWM comparator; connects to external RC network for loop compensation and stability. |
| EN (Pin 15) | Enable / UVLO control | Pull below 1.18 V to disable; internal 0.7 μA pull-up enables default operation; resistive divider adjusts UVLO threshold. |
| RT (Pin 8) | Frequency setting input | Resistor to GND sets switching frequency from 200–2000 kHz; typical 84 kΩ yields ~490 kHz. |
| SS/TR (Pin 9) | Slow-start / tracking control | 2.4 μA internal current charges external capacitor for controlled VOUT ramp; supports sequencing with other supplies. |
| PWRGD (Pin 14) | Power-good status indicator | Open-drain output asserts low if VSENSE <93% or >107% of VREF; requires external pull-up resistor. |
| GND (Pins 3, 4) | Power ground return | Must connect directly to PowerPAD™ and system ground plane; critical for noise immunity and thermal conduction. |
| AGND (Pin 5) | Analog ground reference | Separate analog ground tie point; should be connected to GND near device to minimize noise coupling into VSENSE/COMP. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 30 mΩ MOSFETs | Enables ≥90% efficiency at 5 A load with minimal external components and reduced board area. |
| Adjustable soft-start | 2.4 μA internal charge current + external capacitor ensures repeatable, inrush-limited power-up and fault recovery. |
| Pre-biased output startup | Safely ramps output from non-zero initial voltage without reverse current or latch-up - essential for hot-swap and multi-rail systems. |
| UV/OV and thermal protection | Combines EN-programmable UVLO, PWRGD fault signaling, cycle-by-cycle current limit, and 155°C thermal shutdown with 7.5°C hysteresis. |
| Frequency foldback | Reduces switching frequency during overload or startup to prevent inductor saturation and maintain control loop stability. |
Applications
| FPGA Core Supply | ASIC Point-of-Load Regulation |
|---|---|
|
Use Scenario: Powers 0.8–1.2 V core rails of Xilinx Kintex or Intel Stratix FPGAs with dynamic current demands up to 5 A. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering tightly regulated, low-noise DC voltage with fast transient response. Use Value: Integrated MOSFETs and 0.6 V reference enable compact, high-efficiency design meeting FPGA VCCINT ripple and sequencing requirements. |
Use Scenario: Supplies 0.9–1.1 V I/O or core voltage to application-specific integrated circuits in networking switches and baseband processors. IC Role / Device Role / Timing Role: High-current, digitally controllable DC/DC converter supporting dynamic voltage scaling and power gating. Use Value: Adjustable frequency and SS/TR pin allow synchronization with system clocks and coordinated multi-rail power-up sequences. |
| Microprocessor DDR Memory Rail | Broadband Optical Module Bias |
|
Use Scenario: Generates 1.2 V or 1.35 V DDR4/DDR5 termination and VDDQ rails with tight tolerance and low output impedance. IC Role / Device Role / Timing Role: Secondary buck regulator with PWRGD signaling to enable memory controller initialization only after stable voltage. Use Value: 2% PWRGD hysteresis and 93–107% window ensure reliable power-good assertion under load transients and temperature drift. |
Use Scenario: Provides stable 3.3 V or 5 V bias for laser diode drivers and transimpedance amplifiers in SFP+/QSFP optical modules. IC Role / Device Role / Timing Role: Compact, thermally robust DC/DC stage operating in confined pluggable module footprints. Use Value: –40°C to 140°C junction rating and 3 mm × 3 mm QFN package meet GR-468 reliability and space constraints of optical hardware. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2315GJ-Z (Monolithic Power Systems) | 4.5–24 V input, 3 A output, fixed 500 kHz fSW, no RT pin adjustment, smaller 2 mm × 2 mm QFN | Limited to lower current and higher VIN; lacks programmable frequency and tracking capability | Choose for cost-sensitive, space-constrained 3 A designs where 200–2000 kHz tuning and SS/TR sequencing are unnecessary. |
| RTQ2134B-GQW (Richtek) | 2.7–6 V input, 5 A output, 500 kHz fixed fSW, integrated BOOT diode, 0.6 V reference, but no PWRGD pin | Missing power-good signaling and EN-programmable UVLO; less suitable for sequenced multi-rail systems | Choose when PWRGD is not required and simplified BOM outweighs loss of fault monitoring and flexible enable control. |
Compared with MP2315GJ-Z and RTQ2134B-GQW, the TPS54519RTET offers broader frequency adjustability, full sequencing support via SS/TR, and robust fault reporting via PWRGD - making it preferred for high-reliability, multi-rail FPGA/ASIC power systems demanding design flexibility and diagnostics.
Availability
TPS54519RTET is available at Aetrix Electronics and suitable for FPGA power delivery, ASIC point-of-load regulation, and broadband optical module biasing requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across production batches.
Supply support for TPS54519RTET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion and automotive-grade reliability.
The TPS54519RTET belongs to TI's SWIFT™ synchronous buck converter family, engineered for high-density, low-voltage point-of-load applications in communications infrastructure, computing, and industrial systems where thermal performance and design simplicity are critical.
FAQ
What is the maximum output current capability of the TPS54519RTET?
The TPS54519RTET delivers up to 5 A continuous output current under typical thermal conditions using the recommended PCB layout with PowerPAD™ vias and adequate copper area. Its integrated 30 mΩ high- and low-side MOSFETs, combined with 140°C maximum junction temperature rating, sustain this current while maintaining efficiency above 90% at mid-load points. Derating applies at elevated ambient temperatures or with limited airflow.
How does the TPS54519RTET support power supply sequencing in multi-rail systems?
The TPS54519RTET supports sequencing via its SS/TR pin (for voltage ramp control), EN pin (for enable/disable timing), and PWRGD pin (for status signaling). Connecting PWRGD to the EN pin of a downstream regulator creates sequential startup; tying SS/TR pins together enables ratio-metric ramp-up. The internal 2.4 μA SS/TR charge current and programmable EN threshold allow precise coordination across multiple TPS54519RTET devices or mixed-supply systems.
Can the TPS54519RTET safely start up into a pre-biased output?
Yes, the TPS54519RTET includes dedicated circuitry for safe startup into pre-biased outputs. It disables the low-side MOSFET during initial startup to prevent reverse current flow, monitors VSENSE continuously, and only begins switching once the output voltage decays sufficiently. This feature avoids bus contention and protects downstream loads - confirmed in TI's application note SLVA419 and validated across production units.
What is the purpose of the RT pin on the TPS54519RTET, and how is it configured?
The RT pin on the TPS54519RTET sets the switching frequency from 200 kHz to 2000 kHz using a single resistor to ground. An internal amplifier holds RT at ~0.5 V; selecting 84 kΩ yields ~490 kHz, while 16.9 kΩ and 218 kΩ define the min/max range. This resistor-based configuration eliminates need for external clock sources or complex programming, enabling rapid optimization of inductor size, efficiency, and EMI behavior without changing firmware or layout.
Does the TPS54519RTET include overvoltage protection, and how does it function?
Yes, the TPS54519RTET includes overvoltage protection via its PWRGD comparator and internal control logic. When VSENSE exceeds 107% of the 0.6 V reference, the high-side MOSFET is immediately disabled and masked from turning on until VSENSE falls below 105%. This prevents destructive output overshoot during load dump or transient events, and is distinct from the PWRGD fault signal - which also triggers on undervoltage (below 93%) and thermal/overcurrent faults.
TPS54519RTET Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SWIFT™
- Package/Case:
- 16-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.95V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 4.5V
- Current - Output:
- 5A
- Frequency - Switching:
- 200kHz ~ 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 140°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-WQFN (3x3)
TPS54519RTET FAQ
1.How can I place an order for TPS54519RTET through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54519RTET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54519RTET reliable?
The price and inventory of TPS54519RTET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54519RTET is usually 5 days.
3.What payment methods are accepted for TPS54519RTET?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54519RTET transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54519RTET?
TPS54519RTET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54519RTET order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54519RTET?
For technical support, including TPS54519RTET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54519RTET requirements.
6.How does Aetrix verify that TPS54519RTET is sourced from the original manufacturer or authorized distributors?
All TPS54519RTET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54519RTET meets industry standards.
7.What is the process for return or replacement of TPS54519RTET?
All TPS54519RTET units undergo pre-shipment inspection (PSI). If there is an issue with TPS54519RTET, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54519RTET part is unused and in its original packaging.
Return procedure for TPS54519RTET:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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