Texas Instruments TPS54620RHLT

Overview

TPS54620RHLT from Texas Instruments is a 4.5-V to 17-V input, 6-A synchronous step-down DC/DC converter in a 3.5 mm × 3.5 mm VQFN-14 package with exposed thermal pad. It integrates 26 mΩ high-side and 19 mΩ low-side MOSFETs, supports 200 kHz–1.6 MHz switching frequency via RT/CLK pin, delivers 0.8 V ±1% reference accuracy over temperature, and features monotonic start-up into prebiased outputs for reliable power sequencing in high-density point-of-load applications.

For engineers reviewing the TPS54620RHLT datasheet, TPS54620RHLT pinout, TPS54620RHLT application, or TPS54620RHLT equivalent, key selection considerations include its split-rail PVIN/VIN architecture (1.6 V–17 V on PVIN), integrated BOOT-PH UVLO (2.1 V threshold), PWRGD open-drain fault monitoring with 91–109% Vref window, and current-mode control enabling stable operation with small external components.

Technical Context

The TPS54620RHLT implements constant-frequency peak current-mode control with internal slope compensation to prevent subharmonic oscillation across full duty cycle range. Its transconductance error amplifier (1300 μA/V) compares VSENSE against the lower of SS/TR voltage or 0.8 V reference, driving COMP for PWM generation.

It supports dual-input rail operation: VIN powers control circuitry (4.5–17 V), while PVIN supplies the power stage (1.6–17 V), enabling flexible biasing in distributed systems. The device includes cycle-by-cycle high-side current limiting (8–11 A), bidirectional low-side current limiting (7–10 A sourcing, 2.3 A sinking), and thermal shutdown at 160–175°C with 10°C hysteresis.

Key Specifications

Pinout & Package

TPS54620RHLT uses a thermally enhanced 3.50 mm × 3.50 mm VQFN-14 package with exposed thermal pad (pin 15), requiring soldering for proper thermal performance and electrical grounding.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous step-down converter applications.

Compared with TPS54620RHLT, TPS54622RHLT sacrifices tracking and tighter reference for lower cost, while LMZ36002RKGR trades design flexibility and current capability for simplified layout and faster time-to-market - neither offers identical feature parity for high-current, sequenced PoL use cases.

Availability

TPS54620RHLT is available at Aetrix Electronics and suitable for high-density distributed power systems, point-of-load regulation in telecom infrastructure, and optical networking equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for TPS54620RHLT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in power management ICs for industrial, automotive, and communications markets.

The TPS54620RHLT belongs to TI's SWIFT™ synchronous buck converter family, designed specifically for high-efficiency, high-current point-of-load regulation in space-constrained applications where thermal performance and sequencing reliability are critical.

FAQ

What is the minimum input voltage supported by the TPS54620RHLT on the PVIN pin?

The TPS54620RHLT supports a minimum PVIN input voltage of 1.6 V, enabling operation from low-voltage intermediate rails such as 3.3 V or 5 V while keeping VIN at a higher voltage for control circuitry. This split-rail capability allows optimized efficiency in multi-stage power architectures. The TPS54620RHLT maintains full functionality-including current limiting and PWRGD-down to this 1.6 V PVIN level, provided VIN remains within its 4.5–17 V range.

How does the TPS54620RHLT achieve monotonic start-up into a prebiased output?

The TPS54620RHLT prevents reverse current during start-up by disabling low-side MOSFET sinking until the SS/TR pin voltage exceeds 1.4 V. This ensures the output capacitor is not discharged when the supply ramps up into an already charged rail. The TPS54620RHLT implements this behavior through internal logic that gates the low-side driver, making it suitable for hot-swap and multi-rail sequencing applications without external circuitry.

Can the TPS54620RHLT synchronize to an external clock, and what are the timing requirements?

Yes, the TPS54620RHLT synchronizes to an external clock applied to the RT/CLK pin, locking its switching frequency to the falling edge of the input clock. The device operates in CLK mode when the RT/CLK voltage exceeds 2 V (high threshold) and falls below 0.8 V (low threshold). The TPS54620RHLT supports external clocks from 200 kHz to 1.6 MHz, with a typical delay of 66 ns from CLK falling edge to PH rising edge at 500 kHz.

What is the purpose of the BOOT-PH UVLO function in the TPS54620RHLT?

The BOOT-PH UVLO in the TPS54620RHLT monitors the bootstrap capacitor voltage relative to the PH node, triggering a recharge cycle when the difference drops below 2.1–3 V. This ensures sufficient gate drive for the high-side MOSFET across all duty cycles, including 100% operation. The TPS54620RHLT relies on this function to maintain robust switching performance without external bootstrap supervision circuits.

Does the TPS54620RHLT support adjustable input undervoltage lockout, and how is it implemented?

Yes, the TPS54620RHLT supports adjustable input UVLO via the EN pin using two external resistors to form a voltage divider from PVIN or VIN. The internal EN pullup current (1.15 µA) and hysteresis current (3.4 µA) enable programmable thresholds with >500 mV recommended hysteresis. The TPS54620RHLT allows independent UVLO configuration on either rail, supporting complex power-up sequences in split-supply systems.