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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Voltage Regulators - DC DC Switching Regulators

Texas Instruments TPS54672PWPG4

Name: TPS54672PWPG4
Brand: Texas Instruments
SKU: TPS54672PWPG4
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: TPS54672PWPG4

Manufacturer:: Texas Instruments

Category:: Voltage Regulators - DC DC Switching Regulators

Package:: 28-PowerTSSOP (0.173", 4.40mm Width)

Datasheet:: TPS54672PWPG4.pdf

Description:: IC REG BUCK 6A 28HTSSOP

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Product details

Overview

TPS54672PWPG4 from Texas Instruments is a synchronous PWM bus termination regulator with integrated 30-mΩ high- and low-side N-MOSFETs, delivering up to 6-A continuous bidirectional output current for DDR memory VTT applications. It supports 3 V to 6 V input, tracks external reference voltage (0.2 V–1.75 V), and operates at fixed 350 kHz or adjustable 280–700 kHz switching frequency.

For engineers reviewing the TPS54672PWPG4 datasheet, TPS54672PWPG4 pinout, TPS54672PWPG4 application, or TPS54672PWPG4 equivalent, key selection considerations include its active termination capability for GTL/STL buses, ±6-A sink/source current handling, thermal shutdown at 150°C, internal 2.8-V bias regulator, and PowerPAD-enabled thermal performance in the 28-pin HTSSOP package.

Technical Context

The TPS54672PWPG4 implements a synchronous buck topology with adaptive dead-time control to prevent shoot-through, using internal high- and low-side MOSFETs with matched r_DS(on) (26–47 mΩ at 6 V). Its error amplifier features 5 MHz unity-gain bandwidth, 1.4 V/µs slew rate, and rail-to-rail input range-enabling precise tracking of REFIN across load transients.

Control architecture includes cycle-by-cycle peak current limiting (7–12 A trip point), under-voltage lockout (2.95 V start, 2.8 V stop), slow-start (0.25 V/ms), and open-drain STATUS output signaling UVLO, thermal shutdown, or bias instability. Frequency is set via RT pin resistor (68–180 kΩ) or left floating for 350 kHz default.

Key Specifications

Parameter	Value and Actual Design Meaning
Input Voltage Range	3.0 V to 6.0 V - supports DDR VDDQ rails and intermediate bus voltages without external regulation.
Continuous Output Current	±6 A - enables active termination of DDR, GTL, and STL buses with bidirectional current sourcing/sinking.
Switching Frequency	Fixed 350 kHz or adjustable 280–700 kHz - allows EMI optimization and inductor size trade-offs via RT resistor.
High-Side r_DS(on)	26–47 mΩ at VIN = 6 V - minimizes conduction loss during sourcing, critical for efficiency at high load currents.
Thermal Shutdown Threshold	150°C ±15°C - protects against sustained overload or poor PCB thermal design while allowing full 6-A operation with proper PowerPAD layout.
REFIN Input Range	0 V to 1.8 V - supports zero-duty-cycle operation during transients and compatibility with DAC-controlled references.
Error Amplifier Gain Bandwidth	3–5 MHz - enables stable loop compensation with wide L/C filter flexibility, including Type 3 networks for high phase margin.

Pinout & Package

The TPS54672PWPG4 is housed in a thermally enhanced 28-pin HTSSOP (PWP) PowerPAD™ package measuring 6.4 mm × 9.7 mm, with an exposed thermal pad soldered to AGND for efficient heat dissipation. The PowerPAD requires ≥12 thermal vias (8×0.013″ in pad area, 4×0.018″ under package) connected to a ≥3″×3″ 1-oz copper analog ground plane.

Pin/Terminal	Circuit Role	Design Meaning
AGND (Pin 1)	Analog ground reference	Return path for COMP, VBIAS, RT, and feedback divider; must be single-point connected to PGND to avoid noise coupling.
VSENSE (Pin 2)	Error amplifier inverting input	Monitors regulated output voltage; connects to VTT node via resistive divider for precision tracking.
COMP (Pin 3)	Error amplifier output	Drives external Type 2/3 compensation network; high slew rate (1.4 V/µs) supports fast transient response.
STATUS (Pin 4)	Open-drain fault indicator	Asserts low during UVLO, thermal shutdown, or VBIAS/REFIN instability-used for system power sequencing.
BOOT (Pin 5)	Bootstrap supply for high-side driver	Connects to PH via 0.022–0.1 µF ceramic capacitor; enables floating gate drive for synchronous rectification.
PH (Pins 6–14)	Phase node / switch-node junction	High-current connection point between internal MOSFETs and output inductor; must be routed with minimal loop area.
RT (Pin 28)	Oscillator frequency setting	Resistor to AGND sets frequency (280–700 kHz); floating defaults to 350 kHz-no external clock required.
ENA (Pin 27)	Enable control input	Logic-high (>1.4 V) enables operation; hysteresis (0.03 V) prevents noise-induced toggling near threshold.
REFIN (Pin 26)	Tracking reference input	High-impedance (≤250 nA bias) input accepts external voltage (0.2–1.75 V) for dynamic VTT adjustment.
VBIAS (Pin 25)	Internal bias regulator output	Supplies 2.7–2.9 V to internal circuitry; bypassed with 0.1–1.0 µF ceramic cap to AGND for stability.
VIN (Pins 20–24)	Main power input	Accepts 3–6 V; multiple pins reduce IR drop and improve current sharing-bypassed with 10 µF ceramic caps close to PGND.
PGND (Pins 15–19)	Power ground return	High-current return for MOSFETs and input/output capacitors; separate from AGND to isolate noise-sensitive analog paths.

Key Features

Feature	Design Value
Integrated dual MOSFETs	30-mΩ high- and low-side N-channel switches eliminate external FETs and drivers-reducing BOM count and board area by >30% vs discrete solutions.
Active bus termination	±6-A continuous bidirectional current capability enables precise DDR VTT regulation with <±1.5% cumulative accuracy across load and line variations.
Adaptive dead-time control	Prevents shoot-through by dynamically delaying high-side turn-on until low-side gate falls below 2 V and PH falls below 2 V-improving efficiency and reliability.
Thermally enhanced PowerPAD	28-pin HTSSOP package with exposed thermal pad achieves 18.2°C/W θ_JA with soldered pad-enables full 6-A operation without heatsink in industrial ambient conditions.
Wide REFIN tracking range	Supports 0.2 V to 1.75 V external reference with 6%–90% VIN tracking ratio-compatible with DAC outputs and memory controller VTTQ signals.

Applications

DDR Memory Termination	Active GTL/STL Bus Termination
Use Scenario: Regulating termination voltage (VTT) for DDR SDRAM modules in servers and workstations where tight voltage tolerance and fast transient response are required. IC Role / Device Role / Timing Role: Acts as a bidirectional synchronous buck converter that sources and sinks current to maintain VTT at half of VDDQ (e.g., 1.25 V) during read/write transitions. Use Value: Achieves ±1.5% regulation accuracy over −40°C to 85°C and ±6-A load steps, minimizing signal integrity degradation on high-speed memory buses.	Use Scenario: Providing active pull-up/pull-down termination for GTL+ and STL logic families in telecom backplanes and FPGA I/O interfaces. IC Role / Device Role / Timing Role: Functions as a programmable current sink/source to replace passive resistors, enabling dynamic impedance matching and reduced power dissipation. Use Value: Delivers 6-A peak sink current with 200-ns current-limit response, eliminating overshoot/undershoot during bus switching events.
DAC-Controlled High-Current Stage	Precision Point-of-Load Supply
Use Scenario: Serving as a high-bandwidth, high-current output stage controlled by a DAC in test equipment or programmable power supplies. IC Role / Device Role / Timing Role: Tracks DAC output voltage (via REFIN) with sub-mV offset and 1.4 V/µs slew rate, enabling rapid voltage programming across 0.2–1.75 V range. Use Value: Maintains <1.5% tracking error while sourcing/sinking up to 6 A, supporting calibration-grade accuracy in automated test systems.	Use Scenario: Delivering tightly regulated, low-noise power to sensitive analog circuits such as ADCs, DACs, or RF front-ends in medical or instrumentation designs. IC Role / Device Role / Timing Role: Provides a low-ripple, fast-transient point-of-load regulator with dedicated AGND/PGND separation and 5-MHz error amplifier bandwidth. Use Value: Enables 50° phase margin with Type 3 compensation and <50 mV AC-coupled output ripple during 2-A/10-µs load steps-critical for noise-sensitive signal chains.

DDR Memory Termination

Active GTL/STL Bus Termination

Use Scenario: Regulating termination voltage (VTT) for DDR SDRAM modules in servers and workstations where tight voltage tolerance and fast transient response are required.

IC Role / Device Role / Timing Role: Acts as a bidirectional synchronous buck converter that sources and sinks current to maintain VTT at half of VDDQ (e.g., 1.25 V) during read/write transitions.

Use Value: Achieves ±1.5% regulation accuracy over −40°C to 85°C and ±6-A load steps, minimizing signal integrity degradation on high-speed memory buses.

Use Scenario: Providing active pull-up/pull-down termination for GTL+ and STL logic families in telecom backplanes and FPGA I/O interfaces.

IC Role / Device Role / Timing Role: Functions as a programmable current sink/source to replace passive resistors, enabling dynamic impedance matching and reduced power dissipation.

Use Value: Delivers 6-A peak sink current with 200-ns current-limit response, eliminating overshoot/undershoot during bus switching events.

DAC-Controlled High-Current Stage

Precision Point-of-Load Supply

Use Scenario: Serving as a high-bandwidth, high-current output stage controlled by a DAC in test equipment or programmable power supplies.

IC Role / Device Role / Timing Role: Tracks DAC output voltage (via REFIN) with sub-mV offset and 1.4 V/µs slew rate, enabling rapid voltage programming across 0.2–1.75 V range.

Use Value: Maintains <1.5% tracking error while sourcing/sinking up to 6 A, supporting calibration-grade accuracy in automated test systems.

Use Scenario: Delivering tightly regulated, low-noise power to sensitive analog circuits such as ADCs, DACs, or RF front-ends in medical or instrumentation designs.

IC Role / Device Role / Timing Role: Provides a low-ripple, fast-transient point-of-load regulator with dedicated AGND/PGND separation and 5-MHz error amplifier bandwidth.

Use Value: Enables 50° phase margin with Type 3 compensation and <50 mV AC-coupled output ripple during 2-A/10-µs load steps-critical for noise-sensitive signal chains.

Equivalent & Alternatives

The following parts are listed as comparable options for similar active bus termination applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
TPS54673PWPR	Disables sink current during startup to prevent VTT undershoot; otherwise identical pinout, specs, and PowerPAD package.	Better suited for systems requiring strict VTT monotonicity during power-up sequences.	Select TPS54673PWPR when startup behavior must guarantee no initial sink current-TPS54672PWPG4 remains optimal for general-purpose DDR/GTL termination.
TPS54972PWPR	Higher 9-A peak current rating, 15-mΩ MOSFETs, and extended 4.5–20 V input range; same 28-pin PWP package.	Targets higher-power DDR4/LPDDR4 and multi-rail termination where >6-A sink/source is required.	Choose TPS54972PWPR for next-gen memory interfaces demanding >6-A capability; TPS54672PWPG4 offers cost and footprint advantage for standard DDR2/DDR3 VTT.

Compared with TPS54672PWPG4, TPS54673PWPR adds startup sink disable for improved monotonicity, while TPS54972PWPR extends current and input range for higher-power applications-neither is pin-compatible without layout revision due to differing thermal pad requirements and internal protection thresholds.

Availability

TPS54672PWPG4 is available at Aetrix Electronics and suitable for DDR memory termination, active GTL/STL bus termination, and DAC-controlled high-current output stages requiring stable component supply across industrial temperature ranges (−40°C to 85°C).

Supply support for TPS54672PWPG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion and power system design.

The TPS54672PWPG4 belongs to TI's SWIFT™ family of synchronous buck regulators, engineered specifically for high-current, high-accuracy active bus termination in memory and logic interface applications-emphasizing thermal performance, tracking fidelity, and system-level reliability.

FAQ

What is the maximum continuous bidirectional current capability of the TPS54672PWPG4?

The TPS54672PWPG4 delivers ±6 A continuous output current in both sourcing and sinking directions. This is validated across the full operating temperature range (−40°C to 85°C) and input voltage range (3 V to 6 V), with thermal shutdown protecting against sustained overload. Peak current limit is 7–12 A depending on input voltage, and the device maintains regulation accuracy within ±1.5% during bidirectional load transients.

How does the TPS54672PWPG4 achieve accurate tracking of an external reference voltage?

The TPS54672PWPG4 uses a high-performance voltage error amplifier with 1.5 mV max input offset, 5 MHz unity-gain bandwidth, and rail-to-rail input range (0 V to 2.85 V) to precisely compare VSENSE against REFIN. Its 1.4 V/µs slew rate and wide common-mode rejection (65 dB) ensure stable tracking across 0.2 V–1.75 V REFIN inputs, achieving ≤±1.5% cumulative regulation accuracy over line, load, and temperature.

What thermal design practices are required to sustain 6-A operation with the TPS54672PWPG4?

To sustain 6-A operation, the TPS54672PWPG4 requires soldering its exposed PowerPAD to a ≥3″×3″ 1-oz copper analog ground plane with ≥12 thermal vias (8×0.013″ in pad, 4×0.018″ under package). Layout must separate AGND and PGND traces, minimize PH loop area, and place input/output capacitors adjacent to respective pins. With this implementation, θ_JA is 18.2°C/W, enabling full load at 70°C ambient.

Can the TPS54672PWPG4 operate without an external frequency-setting resistor?

Yes-the TPS54672PWPG4 operates at a default fixed switching frequency of 350 kHz when the RT pin (Pin 28) is left floating. An external resistor (68–180 kΩ to AGND) is only required to adjust frequency between 280 kHz and 700 kHz. The internal oscillator exhibits ±10% variation over temperature, and external resistor tolerance directly impacts final frequency accuracy.

What protection features does the TPS54672PWPG4 include to ensure system reliability?

The TPS54672PWPG4 integrates cycle-by-cycle peak current limiting (7–12 A trip), thermal shutdown (150°C ±15°C with 10°C hysteresis), under-voltage lockout (2.95 V start, 2.8 V stop), and open-drain STATUS output signaling fault conditions. It also features adaptive dead-time control to prevent shoot-through and leading-edge blanking (100 ns) to suppress false current-limit triggering during MOSFET turn-on.

TPS54672PWPG4 Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: SWIFT™

Package/Case:: 28-PowerTSSOP (0.173", 4.40mm Width)

Packaging:: Tube

Product Status:: Discontinued at Digi-Key

Function:: Step-Down

Output Configuration:: Positive

Topology:: Buck

Output Type:: -

Number of Outputs:: 1

Voltage - Input (Min):: 3V

Voltage - Input (Max):: 6V

Voltage - Output (Min/Fixed):: -

Voltage - Output (Max):: -

Current - Output:: 6A

Frequency - Switching:: 350kHz

Synchronous Rectifier:: Yes

Operating Temperature:: -40°C ~ 125°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 28-HTSSOP

TPS54672PWPG4 FAQ

1.How can I place an order for TPS54672PWPG4 through Aetrix?

Please submit a Request for Quotation (RFQ) for TPS54672PWPG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TPS54672PWPG4 reliable?

The price and inventory of TPS54672PWPG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54672PWPG4 is usually 5 days.

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TPS54672PWPG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your TPS54672PWPG4 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TPS54672PWPG4?

For technical support, including TPS54672PWPG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54672PWPG4 requirements.

6.How does Aetrix verify that TPS54672PWPG4 is sourced from the original manufacturer or authorized distributors?

All TPS54672PWPG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54672PWPG4 meets industry standards.

7.What is the process for return or replacement of TPS54672PWPG4?

All TPS54672PWPG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS54672PWPG4, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TPS54672PWPG4 part is unused and in its original packaging.

Return procedure for TPS54672PWPG4:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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