Texas Instruments TPS54678RTER

Overview

TPS54678RTER from Texas Instruments is a 2.95-V to 6-V input, 6-A synchronous step-down DC/DC converter with integrated high- and low-side 12-mΩ MOSFETs, 0.6-V ±1% reference over –40°C to +150°C, hiccup current limiting, and power-good output - used for point-of-load regulation in FPGA and ASIC power rails.

For engineers reviewing the TPS54678RTER datasheet, TPS54678RTER pinout, TPS54678RTER application, or TPS54678RTER equivalent, key selection criteria include its 200-kHz to 2-MHz adjustable switching frequency, RT/CLK synchronization capability, prebias start-up support, thermal shutdown at 170°C, and WQFN-16 (3 mm × 3 mm) package with exposed thermal pad.

Technical Context

The TPS54678RTER implements constant-frequency peak-current-mode control with internal slope compensation to prevent subharmonic oscillation across 0–100% duty cycle. Its transconductance error amplifier (245 µA/V normal, 80 µA/V during soft-start) drives COMP to regulate VSENSE against a 0.6-V reference scaled by external resistor divider.

Switching is synchronized via PLL on the RT/CLK pin, supporting both resistor-set (200–2000 kHz) and external clock (300–2000 kHz) modes. The BOOT-PH UVLO (2.2 V) enables near-100% duty-cycle operation, while hiccup protection triggers after 512 overcurrent cycles and sustains 16,384 cycles before retry.

Key Specifications

Pinout & Package

TPS54678RTER is housed in a thermally enhanced 16-pin WQFN (RTE) package measuring 3.00 mm × 3.00 mm, with an exposed thermal pad that must be soldered to a PCB ground plane using multiple vias for optimal thermal performance (R_θJB = 14.6°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck converter applications.

Compared with TPS54628RTER and MP2315DJ-LF-Z, the TPS54678RTER uniquely combines 2.95-V minimum input, 0.6-V ±1% reference, RT/CLK synchronization, and hiccup current limiting - making it the only option among the three qualified for high-reliability, multi-rail, low-voltage FPGA/ASIC core supplies.

Availability

TPS54678RTER is available at Aetrix Electronics and suitable for FPGA power delivery, ASIC point-of-load regulation, and optical line card applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for TPS54678RTER includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion and automotive-grade reliability.

The TPS54678RTER belongs to TI's SWIFT™ synchronous buck converter family, designed specifically for high-current, low-voltage point-of-load applications in communications infrastructure, computing, and industrial systems demanding precision regulation and robust fault handling.

FAQ

What is the minimum input voltage supported by the TPS54678RTER?

The TPS54678RTER supports a minimum input voltage of 2.95 V, enabling direct operation from single-cell Li-ion batteries or low-dropout 3.3-V intermediate rails. This specification is guaranteed across the full operating temperature range (–40°C to +150°C) and is validated per TI's production test conditions in the SLVSBF3B datasheet.

Does the TPS54678RTER support synchronization to an external clock signal?

Yes, the TPS54678RTER supports external clock synchronization via the RT/CLK pin, accepting clock signals from 300 kHz to 2 MHz with PLL lock-in time under 40 µs. The device aligns its high-side switch turn-on edge to the falling edge of the external clock, eliminating beat frequencies in multi-converter systems.

How does the hiccup current protection work in the TPS54678RTER?

The TPS54678RTER enters hiccup mode after detecting 512 consecutive current-limit events; it then disables switching for 16,384 clock cycles before attempting automatic recovery. This behavior limits average power dissipation during sustained overloads and prevents thermal runaway - distinct from simple cycle-by-cycle limiting.

Can the TPS54678RTER start up safely when the output is prebiased?

Yes, the TPS54678RTER guarantees monotonic start-up under prebias conditions. During startup, the low-side FET briefly conducts each switching cycle to recharge the BOOT capacitor until the output voltage reaches the prebiased level, ensuring reliable high-side FET turn-on without output voltage reversal or overshoot.

What is the purpose of the AGND pin on the TPS54678RTER?

The AGND pin (Pin 5) serves as the dedicated analog ground reference for the error amplifier, voltage reference, and COMP circuitry. It must be electrically connected to the main GND plane near the device to minimize noise coupling into sensitive analog nodes - separating analog return paths from high-current power ground loops.