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Texas Instruments TPS54678RTET
- Part No.:
- TPS54678RTET
- Manufacturer:
- Texas Instruments
- Package:
- 16-WFQFN Exposed Pad
- Datasheet:
-
TPS54678RTET.pdf
- Description:
- IC REG BUCK ADJ 6A 16WQFN
- Quantity:
- Payment:
- Shipping:
Inventory:1,248
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Product details
Overview
TPS54678RTET from Texas Instruments is a 2.95-V to 6-V input, 6-A synchronous step-down DC/DC converter with integrated high- and low-side 12-mΩ MOSFETs, 0.6-V ±1% reference over –40°C to +150°C, hiccup current limiting, and power-good output - used for point-of-load regulation in FPGAs, ASICs, and DSPs.
For engineers reviewing the TPS54678RTET datasheet, TPS54678RTET pinout, TPS54678RTET application, or TPS54678RTET equivalent, key selection criteria include its 200-kHz–2-MHz adjustable switching frequency, prebias start-up capability, RT/CLK synchronization support, and thermal performance in the 3-mm × 3-mm WQFN package with exposed pad.
Technical Context
The TPS54678RTET implements constant-frequency peak-current-mode control with internal slope compensation to prevent subharmonic oscillation across full duty-cycle range. Its transconductance error amplifier (245 µA/V) compares VSENSE against either the 0.6-V reference or SS/TR voltage during soft-start.
It features a PLL-synchronized RT/CLK interface, BOOT-PH UVLO at 2.2 V enabling near-100% duty cycle operation, and hiccup protection triggered after 512 overcurrent cycles followed by 16,384-cycle recovery delay - all managed within a single monolithic WQFN die with integrated boot diode and thermal pad grounding.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.95 V to 6 V - supports single-supply rails from 3.3 V and 5 V systems without external LDO pre-regulation. |
| Continuous Output Current | 6 A - delivered via dual integrated 12-mΩ (typ) N-channel MOSFETs, minimizing conduction loss and external component count. |
| Reference Accuracy | 0.6 V ±1% over –40°C to +150°C - enables precise output regulation for core voltages of modern processors and FPGAs. |
| Switching Frequency | 200 kHz to 2 MHz - adjustable via RT resistor or external clock on RT/CLK pin, allowing optimization of size vs. efficiency. |
| Power-Good Threshold | 93% to 105% of VREF - open-drain PWRGD asserts low outside this window, supporting reliable system sequencing and fault detection. |
| Soft-Start Control | SS/TR pin with 47 µA/2.2 µA dual-stage charge current - enables monotonic startup into prebiased outputs and configurable ramp time. |
| Thermal Package | 16-pin WQFN (RTE), 3 mm × 3 mm with exposed thermal pad - achieves 4.1°C/W junction-to-case (bottom) resistance for high-power density layouts. |
Pinout & Package
TPS54678RTET is housed in a thermally enhanced 16-pin WQFN (RTE) package measuring 3.00 mm × 3.00 mm, with an exposed thermal pad electrically and thermally connected to GND. The pad must be soldered to a PCB ground plane using multiple vias for optimal thermal performance and electrical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pins 1, 2, 16) | Input power supply | Accepts 2.95–6 V; multiple pins reduce IR drop and improve current handling for 6-A operation. |
| GND (Pins 3, 4) | Power ground return | Direct connection to thermal pad; low-inductance path critical for switching noise suppression and thermal dissipation. |
| PH (Pins 10, 11, 12) | Half-bridge switch node | Source of high-side FET / drain of low-side FET; connects to inductor and BOOT capacitor; requires tight layout to minimize ringing. |
| BOOT (Pin 13) | High-side gate drive supply | Requires 0.1-µF X7R/X5R ceramic capacitor to PH; monitored by UVLO to disable high-side FET if <2.2 V. |
| VSENSE (Pin 6) | Feedback input | Inverting input of transconductance error amplifier; sets output voltage via resistor divider to 0.6 V reference. |
| COMP (Pin 7) | Error amplifier output | Drives PWM comparator; external RC network here provides loop compensation for stable regulation. |
| EN (Pin 15) | Enable / UVLO control | Internal 0.7-µA pullup; rising threshold = 1.3 V; supports programmable UVLO with resistor divider. |
| SS/TR (Pin 9) | Soft-start / tracking input | Charged by internal current sources (47 µA then 2.2 µA); controls output ramp rate and enables supply sequencing. |
| PWRGD (Pin 14) | Power-good status | Open-drain output active low when VOUT is outside 93–105% of nominal; supports system reset and sequencing logic. |
| RT/CLK (Pin 8) | Frequency setting / sync input | Configures switching frequency via resistor to GND or accepts external clock (300–2000 kHz) with 75-ns min pulse width. |
| AGND (Pin 5) | Analog ground reference | Must be tied to GND near device; separates analog feedback path from noisy power ground currents. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated dual MOSFETs | 12-mΩ (typ) high- and low-side RDS(on) enables >90% efficiency at 5 VIN/1.8 VOUT, 6 A, 500 kHz, eliminating external switches and drivers. |
| Hiccup overcurrent protection | Enters latched shutdown after 512 consecutive current-limit cycles, then recovers after 16,384 cycles - prevents thermal runaway under sustained overload. |
| Prebias start-up | Monotonic ramp into precharged output via controlled low-side FET conduction before VOUT reaches target - avoids reverse current or bus collapse. |
| Adjustable UVLO | EN pin supports resistor-divider programming of turn-on/off thresholds (e.g., 3.3 V startup with 2.45 V hysteresis), enhancing system-level brownout resilience. |
| Synchronization capability | RT/CLK pin accepts external clock (300–2000 kHz) with PLL lock-in time <40 µs - enables noise-sensitive multi-rail systems to avoid beat frequencies. |
Applications
| ASIC Core Power | FPGA I/O Bank Supply |
|---|---|
Use Scenario: Delivering tightly regulated 1.0 V or 1.2 V to high-performance ASIC cores with dynamic load steps up to 4 A/µs. IC Role / Device Role / Timing Role: Primary synchronous buck regulator providing point-of-load conversion with fast transient response and hiccup fault containment. Use Value: Integrated 12-mΩ MOSFETs and 0.6-V ±1% reference ensure <±15 mV output deviation under full load and temperature, meeting ASIC core voltage tolerance specs. |
Use Scenario: Powering FPGA I/O banks requiring 1.8 V or 3.3 V with sequencing relative to core and auxiliary rails. IC Role / Device Role / Timing Role: Secondary regulated supply synchronized via RT/CLK and sequenced using SS/TR and PWRGD signals. Use Value: SS/TR pin enables tracking or delayed ramp, while open-drain PWRGD provides clean enable signal to downstream regulators or FPGA configuration logic. |
| Optical Line Card DC/DC | Industrial PLC CPU Module |
Use Scenario: Generating 3.3 V and 1.8 V rails in space-constrained optical transceiver modules operating at 70°C ambient. IC Role / Device Role / Timing Role: High-density, thermally optimized buck converter leveraging 3-mm × 3-mm WQFN package and exposed thermal pad. Use Value: Junction-to-board thermal resistance of 14.6°C/W allows full 6-A output at 70°C ambient without forced air, reducing system cooling cost. |
Use Scenario: Providing robust 5 V and 3.3 V supplies in industrial PLC CPU modules subject to wide input variation and EMI. IC Role / Device Role / Timing Role: Input-flexible buck regulator with 2.95–6 V range, EN-based UVLO, and hiccup protection for unregulated 5 V or 3.3 V backplane inputs. Use Value: 200-kHz minimum switching frequency ensures stable operation with low-ESR bulk capacitors, improving reliability in harsh industrial environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS546B24RVFT | Higher 12-A rating, 3.0–18-V input, fixed 500-kHz frequency, no RT/CLK sync, larger 4-mm × 4-mm VQFN package. | Better suited for higher-current, wider-input applications where board area and synchronization are secondary. | Select TPS546B24RVFT only if >6-A output or >6-V input is required; not drop-in due to different pinout, footprint, and control interface. |
| MP2315GJ-Z | 6-A rating, 4.5–28-V input, 500-kHz fixed frequency, no PWRGD, no SS/TR, smaller 2-mm × 2-mm QFN, lower thermal performance (RθJA = 65°C/W). | Targeted at cost-sensitive, non-critical applications lacking sequencing or power-good monitoring requirements. | Choose MP2315GJ-Z only for simpler, lower-cost designs without hiccup protection, prebias start-up, or thermal constraints - not pin-compatible. |
Compared with TPS54678RTET, TPS546B24RVFT offers higher current and input range but sacrifices synchronization and compactness, while MP2315GJ-Z reduces size and cost but omits critical reliability features like PWRGD, hiccup protection, and thermal robustness - making TPS54678RTET optimal for precision, high-density, and safety-aware point-of-load designs.
Availability
TPS54678RTET is available at Aetrix Electronics and suitable for FPGA power delivery, ASIC core regulation, and industrial PLC CPU modules requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for TPS54678RTET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion and automotive-grade reliability.
The TPS54678RTET belongs to TI's SWIFT™ synchronous buck converter family, designed specifically for high-current, low-voltage point-of-load applications in communications infrastructure, computing, and industrial automation where thermal density and transient performance are critical.
FAQ
What is the maximum continuous output current supported by the TPS54678RTET?
The TPS54678RTET supports 6-A continuous output current under recommended operating conditions (TJ ≤ 150°C, proper PCB thermal design). This is enabled by its dual integrated 12-mΩ (typ) MOSFETs and 3-mm × 3-mm WQFN package with exposed thermal pad. Derating applies above 70°C ambient or with inadequate copper area.
Does the TPS54678RTET support synchronization to an external clock signal?
Yes, the TPS54678RTET supports external clock synchronization via its RT/CLK pin, accepting input clocks from 300 kHz to 2 MHz with a minimum pulse width of 75 ns. An internal PLL achieves lock-in within 40 µs, enabling noise-sensitive multi-rail systems to eliminate beat frequencies and meet EMI requirements.
How does the hiccup overcurrent protection work in the TPS54678RTET?
The TPS54678RTET enters hiccup mode after detecting 512 consecutive current-limit events, disabling switching and reducing power dissipation. It remains latched off for 16,384 switching cycles before attempting automatic recovery. This prevents thermal runaway during sustained overload while allowing self-recovery once the fault clears - a key safety feature absent in basic cycle-by-cycle limiters.
Can the TPS54678RTET start up into a prebiased output voltage?
Yes, the TPS54678RTET supports monotonic start-up into prebiased outputs. During startup, the low-side FET briefly conducts each cycle before VOUT reaches the target, ensuring the BOOT capacitor charges sufficiently to enable high-side FET turn-on - preventing reverse current flow and maintaining system stability without external circuitry.
What is the purpose of the SS/TR pin on the TPS54678RTET?
The SS/TR (Soft-Start/Tracking) pin on the TPS54678RTET controls output voltage ramp rate during power-up and enables supply sequencing or tracking with other rails. An external capacitor sets the rise time, while internal dual-stage current sources (47 µA then 2.2 µA) ensure repeatable, monotonic startup - critical for avoiding inrush current and meeting FPGA/ASIC power sequencing requirements.
TPS54678RTET Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SWIFT™
- Package/Case:
- 16-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.95V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 4.5V
- Current - Output:
- 6A
- Frequency - Switching:
- 200kHz ~ 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-WQFN (3x3)
TPS54678RTET FAQ
1.How can I place an order for TPS54678RTET through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54678RTET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54678RTET reliable?
The price and inventory of TPS54678RTET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54678RTET is usually 5 days.
3.What payment methods are accepted for TPS54678RTET?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54678RTET transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54678RTET?
TPS54678RTET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54678RTET order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54678RTET?
For technical support, including TPS54678RTET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54678RTET requirements.
6.How does Aetrix verify that TPS54678RTET is sourced from the original manufacturer or authorized distributors?
All TPS54678RTET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54678RTET meets industry standards.
7.What is the process for return or replacement of TPS54678RTET?
All TPS54678RTET units undergo pre-shipment inspection (PSI). If there is an issue with TPS54678RTET, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54678RTET part is unused and in its original packaging.
Return procedure for TPS54678RTET:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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