Texas Instruments TPS54680PWP
- Part No.:
- TPS54680PWP
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 28-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS54680PWP.pdf
- Description:
- IC REG CONV 1OUT 28HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS54680PWP from Texas Instruments is a 3-V to 6-V input, 6-A output synchronous buck PWM switcher with integrated high- and low-side MOSFETs (30 mΩ typical), fixed/adjustable switching frequency (350 kHz default, 280–700 kHz), and TRACKIN-enabled power-up/down sequencing for FPGA/DSP core-I/O rail coordination.
For engineers reviewing the TPS54680PWP datasheet, TPS54680PWP pinout, TPS54680PWP application, or TPS54680PWP equivalent, this device delivers precise voltage tracking, thermal shutdown protection, power good signaling, and PowerPAD™-enhanced thermal performance in a 28-pin HTSSOP package - critical for high-density point-of-load designs requiring tight regulation and sequencing control.
Technical Context
The TPS54680PWP implements a current-mode PWM control architecture with an internal error amplifier (90–110 dB open-loop gain, 3–5 MHz unity-gain bandwidth) and adaptive dead-time logic. Its TRACKIN pin enables external reference synchronization for coordinated startup/shutdown across multiple rails.
It integrates dual 30-mΩ MOSFET switches rated for 12-A peak current, supports adjustable soft-start via external capacitor on TRACKIN, and features a dedicated VBIAS LDO (2.70–2.90 V output) for internal biasing and optional external use - all within a thermally optimized 6.4 mm × 9.7 mm PWP PowerPAD™ package.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3.0 V to 6.0 V - supports standard 3.3 V and 5 V intermediate bus architectures without pre-regulation. |
| Continuous Output Current | 6 A - sufficient for powering high-performance DSPs, FPGAs, and ASICs at sub-2 V core voltages. |
| Switching Frequency | Fixed 350 kHz or adjustable 280–700 kHz - enables EMI optimization and inductor size trade-offs via RT-to-AGND resistor. |
| Voltage Reference Accuracy | ±1% (0.882–0.900 V) - ensures tight output regulation across temperature and load for precision digital supply rails. |
| Power Good Threshold | 90% of Vref with 3% hysteresis - provides reliable reset signaling for processors upon stable output establishment. |
| Thermal Shutdown Trip | 135–165°C with 10°C hysteresis - protects against sustained overload or inadequate PCB thermal design. |
| MOSFET rDS(on) | 30 mΩ (typical, VI = 6 V) - minimizes conduction loss and improves full-load efficiency up to 95% at 1.8 V/6 A. |
Pinout & Package
The TPS54680PWP is housed in a thermally enhanced 28-pin HTSSOP (PWP) PowerPAD™ package measuring 6.4 mm × 9.7 mm, featuring an exposed thermal pad soldered directly to the PCB for efficient heat dissipation - eliminating need for external heatsinks in most 6-A applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AGND (Pin 1) | Analog ground reference | Return path for compensation network, slow-start cap, VBIAS bypass, and RT resistor - must be tied to PowerPAD with single-point connection to PGND. |
| VSENSE (Pin 2) | Error amplifier inverting input | Connects to output voltage divider; senses regulated output and closes feedback loop for ±1% accuracy. |
| COMP (Pin 3) | Error amplifier output | Drives external Type-3 compensation network between COMP and VSENSE to stabilize control loop. |
| PWRGD (Pin 4) | Open-drain power-good indicator | Sinks current when VSENSE ≥ 90% Vref - used for processor reset or sequenced enable of downstream rails. |
| BOOT (Pin 5) | Bootstrap gate drive supply | Connects via 0.022–0.1 µF ceramic capacitor to PH to generate floating voltage for high-side MOSFET gate drive. |
| PH (Pins 6–14) | Phase node / switch-node output | Junction of internal high- and low-side FETs; connects directly to output inductor - requires minimal trace area to reduce EMI. |
| RT (Pin 28) | Oscillator frequency setting input | Resistor from RT to AGND sets switching frequency from 280 kHz to 700 kHz; open circuit selects 350 kHz default. |
| ENA (Pin 27) | Enable/disable control | Logic-high (>1.2 V) enables operation; logic-low (<0.82 V) disables PWM and places device in low-IQ state (~1.4 µA). |
| TRACKIN (Pin 26) | External tracking reference input | High-impedance input accepting external voltage ramp to synchronize startup/shutdown timing with other regulators. |
| VBIAS (Pin 25) | Internal bias regulator output | Provides 2.7–2.9 V regulated supply for internal circuits; bypassed with 0.1–1.0 µF ceramic cap to AGND. |
| VIN (Pins 20–24) | Main input power supply | Accepts 3–6 V input; each pin must be bypassed with 10 µF ceramic cap close to PGND for low-impedance high-frequency decoupling. |
| PGND (Pins 15–19) | Power ground return | High-current return for low-side FET and input/output capacitors - routed separately from AGND and connected only at PowerPAD. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 30-mΩ MOSFETs | Enables compact, high-efficiency 6-A buck conversion without external power switches - reduces BOM count and layout complexity. |
| TRACKIN-based sequencing | Supports simultaneous power-up/down of core and I/O rails by synchronizing TPS54680PWP output to external reference voltage slope. |
| PowerPAD™ thermal package | 28-pin HTSSOP with exposed copper pad achieves 18.2°C/W θJA (with solder), enabling 6-A operation without heatsink under typical PCB conditions. |
| Adjustable switching frequency | RT pin allows precise frequency tuning (280–700 kHz) to avoid noise-sensitive bands or optimize efficiency vs. size trade-offs. |
| Comprehensive protection suite | Includes overcurrent limiting (7.2–12 A trip), thermal shutdown (135–165°C), UVLO (2.95 V start), and power-good monitoring for system reliability. |
Applications
| FPGA Core Supply | DSP I/O Rail Sequencing |
|---|---|
Use Scenario: Delivering tightly regulated 0.9–1.2 V at up to 6 A to FPGA core logic during high-speed configuration and computation. IC Role / Device Role / Timing Role: Primary synchronous buck regulator with TRACKIN-synchronized startup and PWRGD-driven reset assertion. Use Value: Maintains ±1% output accuracy across load transients and temperature, ensuring FPGA functional integrity and timing closure. | Use Scenario: Generating 1.8–3.3 V I/O supply for FPGA banks or DSP peripherals with controlled timing relative to core rail. IC Role / Device Role / Timing Role: Secondary sequenced buck converter using TRACKIN input to match core rail ramp rate during power-up/down. Use Value: Prevents I/O voltage application before core stabilization, eliminating latch-up risk and meeting JEDEC JESD8-12A sequencing requirements. |
| Broadband Baseband Processing | Optical Line Card Power |
Use Scenario: Powering multi-core baseband processors in 5G wireless infrastructure where rapid load transients demand fast loop response. IC Role / Device Role / Timing Role: High-bandwidth point-of-load regulator with 3–5 MHz error amplifier GBW and adaptive dead-time control. Use Value: Achieves <100 mV undershoot during 2-A step load changes at 1.8 V, preserving signal integrity in RF front-end interfaces. | Use Scenario: Providing isolated, sequenced 1.2 V and 2.5 V supplies for optical transceiver modules in line cards with strict thermal constraints. IC Role / Device Role / Timing Role: Thermally robust buck converter leveraging PowerPAD™ and 12 thermal vias for continuous 6-A operation in confined 1U chassis. Use Value: Sustains full-rated output at 85°C ambient without derating, enabling higher port density in space-constrained optical networking hardware. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54616PWP | Fixed 3.3 V output; no TRACKIN pin; same PWP package and 6-A rating. | Lacks sequencing capability; suitable only for standalone non-sequenced rails. | Select when output voltage is fixed and inter-rail coordination is unnecessary. |
| TPS54672PWP | Active terminal variant with different enable behavior; identical electrical specs and pinout per SLVS429B footnote. | Same footprint and function but intended for specific TI reference designs with modified ENA logic. | Choose only if referenced in official TI design documentation for compatibility-critical deployments. |
Compared with TPS54680PWP, TPS54616PWP offers simpler fixed-output operation but forfeits TRACKIN-based sequencing, while TPS54672PWP maintains full functional equivalence but targets specialized TI evaluation platforms - making TPS54680PWP the optimal choice for custom sequencing-critical designs.
Availability
TPS54680PWP is available at Aetrix Electronics and suitable for FPGA power delivery, DSP I/O sequencing, broadband baseband processing, and optical line card power systems requiring stable component supply, long-term lifecycle support, and consistent parametric performance.
Supply support for TPS54680PWP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability DC/DC conversion solutions.
The TPS54680PWP belongs to TI's SWIFT™ family of integrated synchronous buck regulators, engineered specifically for high-current, low-voltage point-of-load applications demanding precise sequencing, thermal efficiency, and minimal board area.
FAQ
What is the maximum continuous output current supported by the TPS54680PWP?
The TPS54680PWP supports 6 A of continuous output current under recommended operating conditions (TJ ≤ 125°C, proper PCB thermal design). Its integrated 30-mΩ MOSFETs and PowerPAD™ package enable this rating without external heatsinking in typical 4-layer board layouts with adequate copper area and thermal vias.
Does the TPS54680PWP require an external resistor to set its switching frequency?
No - the TPS54680PWP operates at a default fixed frequency of 350 kHz when the RT pin is left open. An external resistor from RT to AGND is optional and used only to adjust frequency between 280 kHz and 700 kHz; the device functions fully without it.
How does the TRACKIN pin function in the TPS54680PWP?
The TRACKIN pin on the TPS54680PWP accepts an external voltage ramp to synchronize output voltage rise/fall with another regulator. When TRACKIN rises slower than the internal 25 V/ms slope, the TPS54680PWP output follows it - enabling precise power-up/down sequencing for core and I/O rails in FPGAs and DSPs.
What thermal design considerations apply to the TPS54680PWP package?
The TPS54680PWP uses a 28-pin PWP PowerPAD™ package requiring soldering of the exposed thermal pad to a large AGND copper area. TI recommends 8 × 0.013″ vias under the pad plus 4 × 0.018″ vias elsewhere, with a minimum 3″ × 3″ 1-oz copper plane for full 6-A operation at 85°C ambient.
Can the TPS54680PWP be used in applications requiring output voltages below 0.9 V?
No - the TPS54680PWP is specified for output voltages from 0.9 V to 3.3 V, as confirmed in TI's official ordering information. Its internal 0.891 V reference and feedback architecture are trimmed and validated only within this range; operation below 0.9 V is not guaranteed or characterized.
TPS54680PWP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SWIFT™
- Package/Case:
- 28-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Last Time Buy
- Applications:
- Converter, Distributed Power Systems
- Voltage - Input:
- 3V ~ 6V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.9V ~ 4.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-HTSSOP
TPS54680PWP FAQ
1.How can I place an order for TPS54680PWP through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54680PWP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54680PWP reliable?
The price and inventory of TPS54680PWP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54680PWP is usually 5 days.
3.What payment methods are accepted for TPS54680PWP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54680PWP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54680PWP?
TPS54680PWP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54680PWP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54680PWP?
For technical support, including TPS54680PWP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54680PWP requirements.
6.How does Aetrix verify that TPS54680PWP is sourced from the original manufacturer or authorized distributors?
All TPS54680PWP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54680PWP meets industry standards.
7.What is the process for return or replacement of TPS54680PWP?
All TPS54680PWP units undergo pre-shipment inspection (PSI). If there is an issue with TPS54680PWP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54680PWP part is unused and in its original packaging.
Return procedure for TPS54680PWP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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