Texas Instruments TPS546B24ARVFR
- Part No.:
- TPS546B24ARVFR
- Manufacturer:
- Texas Instruments
- Package:
- 40-PowerLFQFN
- Datasheet:
-
TPS546B24ARVFR.pdf
- Description:
- IC REG BUCK ADJ 20A 40LQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS546B24ARVFR from Texas Instruments is a 20-A, PMBus-enabled buck converter with integrated 5.5-mΩ/1.8-mΩ MOSFETs, operating from 2.95 V to 18 V input and delivering 0.25 V to 5.5 V output. It supports 2×–4× stacking for up to 80 A with precise current sharing (±10% at ≥10 A per device), differential remote sensing (<1% VOUT error from –40°C to +150°C), and operates in a 7-mm × 5-mm × 1.5-mm, 40-pin QFN package. It powers high-density ASIC/FPGA core rails in data center servers.
For engineers reviewing the TPS546B24ARVFR datasheet, TPS546B24ARVFR pinout, TPS546B24ARVFR application, or TPS546B24ARVFR equivalent, key selection considerations include its stackable PMBus configuration, 225 kHz–1.5 MHz selectable switching frequency, internal compensation options, AVIN/PVIN split-rail support, and back-channel communication enabling single-address control of multi-phase outputs.
Technical Context
The TPS546B24ARVFR implements fixed-frequency average current-mode control with input feedforward and programmable internal compensation (four transconductance, resistor, and capacitor settings). Its dual-input architecture separates AVIN (2.95–18 V) for analog control and PVIN (2.95–18 V) for power stage, with VDD5 optionally overdriven externally to reduce dissipation.
Back-channel communication (BCX_CLK/BCX_DAT) enables synchronized operation and shared address functionality across stacked devices. The PMBus 1.3 interface supports full telemetry-VOUT, IOUT, die temperature-and configurable fault responses (restart, latch-off, ignore)-with 1-MHz clock capability and MSEL/ADRSEL pin-strapping for boot-time configuration without firmware dependency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 20 A continuous per device; supports 2×–4× stacking for up to 80 A with ±10% current sharing accuracy at ≥10 A/device. |
| Input Voltage Range | PVIN: 2.95 V–18 V; AVIN: 2.95 V–18 V - enables split-rail noise isolation and flexible biasing. |
| Output Voltage Range | 0.25 V–5.5 V via PMBus VOUT_COMMAND; 0.5 V–5.5 V via pin-strap - supports low-voltage SoC cores and I/O rails. |
| Switching Frequency | 225 kHz–1.5 MHz (12 options); sync-in/sync-out capable - allows EMI optimization and phase interleaving. |
| Thermal Performance | RθJA = 25.3°C/W (JEDEC), RθJB = 8.5°C/W - enables high-power density on standard PCBs with thermal pad soldering. |
| Remote Sensing Accuracy | <1% VOUT error over –40°C to +150°C TJ - ensures stable regulation under load and thermal transients. |
| PMBus Telemetry | VOUT, IOUT, internal die temperature measured with ±2% VOUT, ±2 A IOUT (20 A), ±3°C temp accuracy - enables real-time system health monitoring. |
Pinout & Package
TPS546B24ARVFR uses a 40-pin LQFN-CLIP (RVF) package, 7.0 mm × 5.0 mm × 1.5 mm, 0.5-mm pitch, with exposed thermal pad internally connected to PGND. Thermal pad requires full-solder coverage for reliable thermal performance and electrical grounding.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGD/RST_B | Open-drain power-good / RESET# output | Configurable via PMBus; signals valid output or asserts system reset; internal pullup optional. |
| PMB_DATA / PMB_CLK | PMBus bidirectional data/clock | 1-MHz compliant interface for configuration, telemetry, and fault logging; SMBus alert support. |
| AVIN / PVIN | Analog controller / power stage inputs | Split-rail design isolates noise-sensitive control circuitry from high-current switching node. |
| VDD5 / BP1V5 | 5-V / 1.5-V internal regulator outputs | VDD5 powers gate drivers (bypass ≥4.7 µF); BP1V5 powers digital logic (bypass ≥1 µF); not for external loads. |
| VOSNS / GOSNS/SLAVE | Differential remote sense inputs | VOSNS+ and GOSNS− connect to load for <1% regulation; GOSNS pulled high indicates slave in stacked config. |
| VSHARE | Multi-phase current-sharing signal | Enables precise current balancing across stacked devices; must float in single-device operation. |
| SYNC | Frequency synchronization I/O | Configurable as SYNC IN or SYNC OUT via ADRSEL or PMBus; supports phase alignment across multiple converters. |
| BCX_DAT / BCX_CLK | Back-channel inter-device communication | Enables stacked TPS546B24ARVFR units to share one PMBus address and coordinate timing/fault response. |
Key Features
| Feature | Design Value |
|---|---|
| Stackable Architecture | 2×–4× stacking with back-channel communication allows unified PMBus address control and coordinated soft-start/stop for up to 80 A. |
| Programmable Compensation | Four selectable EA/GM settings (25–200 µS), parallel resistor (5–315 kΩ), and integrator capacitor (1.25–18.75 pF) eliminate external compensation components. |
| Differential Remote Sensing | Internal FB divider + VOSNS/GOSNS inputs achieve <1% output voltage error across –40°C to +150°C, critical for high-precision core rails. |
| AVS & Margining Support | PMBus AVS (adaptive voltage scaling) and margining commands enable dynamic VOUT adjustment and production test validation without hardware change. |
| Prebiased Output Start-up | Supports start-up into precharged output capacitors - prevents reverse current flow and enables hot-swap compatibility in modular systems. |
Applications
| Data Center Rack Servers | 5G Active Antenna Systems |
|---|---|
Use Scenario: High-density compute nodes requiring tightly regulated 0.8 V/20 A core supply with telemetry and dynamic voltage scaling. IC Role / Device Role / Timing Role: Primary PMBus-controlled buck converter delivering FPGA/ASIC core voltage with real-time current and temperature feedback. Use Value: Stackable architecture enables scalable 40–80 A solutions; differential sensing maintains <1% regulation despite PCB IR drop across long traces. |
Use Scenario: Remote radio unit (RRU) power subsystem needing compact, thermally robust 1.2 V/15 A supply with fault logging for field maintenance. IC Role / Device Role / Timing Role: Digitally managed DC/DC converter providing RF SoC core rail with overtemperature warning and latch-off fault response. Use Value: Integrated 5.5-mΩ/1.8-mΩ MOSFETs and 8.5°C/W RθJB enable >90% efficiency at 12 V input; PMBus telemetry reduces need for external sensors. |
| Medical Imaging CT Scanners | Automated Test Equipment (ATE) |
Use Scenario: High-reliability power for ASIC-based image reconstruction engines requiring stable 1.0 V/18 A with margining for production test. IC Role / Device Role / Timing Role: Precision-regulated buck converter supporting AVS during varying computational load; used with external 0.1% resistor dividers for calibration. Use Value: ±2% VOUT measurement accuracy and 244 µV LSB resolution enable closed-loop calibration; programmable soft-start avoids inrush-induced system resets. |
Use Scenario: Multi-rail power sequencer for mixed-signal test instrumentation requiring synchronized 1.8 V/12 A and 3.3 V/10 A supplies. IC Role / Device Role / Timing Role: Configurable buck converter used in parallel with other TPS546B24ARVFR units to generate independent, PMBus-synchronized rails. Use Value: SYNC IN/OUT and phase-interleaving error <9° below 1.1 MHz minimize input ripple; MSEL pin-strapping sets unique startup timing without firmware. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PMBus-enabled, high-current buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS546D24ARVFR | Same 40-pin RVF package, 20-A rating, but higher RDS(on): 6.2-mΩ/2.2-mΩ; supports identical PMBus stackability and pinout. | Lower efficiency at high load due to higher conduction loss; suitable where thermal margin exceeds requirement. | Select TPS546D24ARVFR only when cost sensitivity outweighs efficiency needs; verify thermal derating at 85°C ambient. |
| ISL9122AIRZ-T7A | 15-A buck with integrated FETs (7.5-mΩ/2.5-mΩ), 2.5–5.5 V input, no PMBus; uses I²C instead of PMBus; 3.5-mm × 3.5-mm WLCSP. | Lacks stacking, telemetry, and wide VIN range; targets space-constrained portable applications, not server-grade power. | Choose ISL9122AIRZ-T7A only for battery-powered or ultra-compact designs where digital configurability and high current are secondary. |
Compared with TPS546B24ARVFR, TPS546D24ARVFR trades 0.5% peak efficiency for lower cost in identical footprint, while ISL9122AIRZ-T7A sacrifices PMBus telemetry, stacking, and input flexibility for size reduction - making TPS546B24ARVFR the sole choice for scalable, telemetry-rich, high-current infrastructure power.
Availability
TPS546B24ARVFR is available at Aetrix Electronics and suitable for data center rack servers, 5G active antenna systems, and medical imaging equipment requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for TPS546B24ARVFR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion and digital power interfaces.
The TPS546B24ARVFR belongs to TI's high-current, PMBus-enabled buck converter product line, designed specifically for next-generation infrastructure applications demanding scalability, telemetry, and thermal resilience in dense PCB layouts.
FAQ
What is the maximum output current achievable with a single TPS546B24ARVFR?
A single TPS546B24ARVFR delivers up to 20 A continuous output current under recommended operating conditions (TJ ≤ 150°C, proper thermal layout). Its 7-mm × 5-mm QFN package with exposed thermal pad and RθJB = 8.5°C/W enables this high current density without external heatsinking in typical 4-layer board configurations. Derating applies above 85°C ambient.
Does the TPS546B24ARVFR support stacking with different part numbers?
The TPS546B24ARVFR supports stacking only with identical devices (TPS546B24A variants) and the TPS546D24A family. Back-channel communication (BCX_DAT/BCX_CLK) and shared PMBus addressing require matching register maps and timing behavior - mixing with non-B/D24A parts (e.g., TPS546A24) is not supported and may cause instability or telemetry corruption.
How does the TPS546B24ARVFR handle prebiased output conditions?
The TPS546B24ARVFR supports prebiased start-up by disabling the low-side FET during soft-start initiation, preventing reverse current flow into a precharged output capacitor. This behavior is enabled by default and requires no PMBus command or pin strap - ensuring safe hot-swap and in-system programming scenarios without external circuitry.
Can the TPS546B24ARVFR operate without a PMBus host controller?
Yes. The TPS546B24ARVFR supports full pin-strap configuration: output voltage (VSEL), switching frequency (MSEL1), soft-start time (MSEL2), and PMBus address (ADRSEL) are all set at power-on using resistor dividers to BP1V5. PMBus is optional for runtime reconfiguration or telemetry; basic operation requires only EN/UVLO assertion and proper input/output filtering.
What thermal pad soldering requirements apply to the TPS546B24ARVFR?
The TPS546B24ARVFR's exposed thermal pad must be soldered with ≥90% coverage using a 9×9 array of 0.3-mm-diameter thermal vias filled or capped, connected to a solid inner-layer ground plane. Inadequate solder coverage increases RθJB beyond 8.5°C/W, risking thermal shutdown at >15 A load - TI's SLVUEE9 layout guide specifies minimum stencil aperture (50% area ratio) and reflow profile (peak 245°C).
TPS546B24ARVFR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 40-PowerLFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.95V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 20A
- Frequency - Switching:
- 225kHz ~ 1.5MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-LQFN-CLIP (7x5)
TPS546B24ARVFR FAQ
1.How can I place an order for TPS546B24ARVFR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS546B24ARVFR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS546B24ARVFR reliable?
The price and inventory of TPS546B24ARVFR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS546B24ARVFR is usually 5 days.
3.What payment methods are accepted for TPS546B24ARVFR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS546B24ARVFR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS546B24ARVFR?
TPS546B24ARVFR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS546B24ARVFR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS546B24ARVFR?
For technical support, including TPS546B24ARVFR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS546B24ARVFR requirements.
6.How does Aetrix verify that TPS546B24ARVFR is sourced from the original manufacturer or authorized distributors?
All TPS546B24ARVFR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS546B24ARVFR meets industry standards.
7.What is the process for return or replacement of TPS546B24ARVFR?
All TPS546B24ARVFR units undergo pre-shipment inspection (PSI). If there is an issue with TPS546B24ARVFR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS546B24ARVFR part is unused and in its original packaging.
Return procedure for TPS546B24ARVFR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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