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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Special Purpose Regulators

Texas Instruments TPS54872PWPRG4

Name: TPS54872PWPRG4
Brand: Texas Instruments
SKU: TPS54872PWPRG4
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: TPS54872PWPRG4

Manufacturer:: Texas Instruments

Category:: Special Purpose Regulators

Package:: 28-PowerTSSOP (0.173", 4.40mm Width)

Datasheet:: TPS54872PWPRG4.pdf

Description:: IC REG CONV DDR 1OUT 28HTSSOP

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Product details

Overview

TPS54872PWPRG4 from Texas Instruments is a synchronous-buck PWM converter optimized for DDR memory termination and high-current point-of-load regulation, featuring 30-mΩ high-side/low-side MOSFETs, 8-A continuous source/sink capability, 350 kHz fixed or 280–700 kHz adjustable switching frequency, and external reference tracking (0.2 V to 1.75 V) for precise VTT/VTTQ generation in DDR2/DDR3 systems.

For engineers reviewing the TPS54872PWPRG4 datasheet, TPS54872PWPRG4 pinout, TPS54872PWPRG4 application, or TPS54872PWPRG4 equivalent, key selection criteria include its 28-pin HTSSOP PowerPAD package with dual ground planes, integrated thermal shutdown (150°C trip), cycle-by-cycle overcurrent protection (9–11 A), and support for active GTL/SSTL termination in high-speed logic interfaces.

Technical Context

The TPS54872PWPRG4 implements a voltage-mode synchronous buck architecture with an internal high-performance error amplifier (90–110 dB open-loop gain, 3–5 MHz unity-gain bandwidth), adaptive dead-time control to prevent shoot-through, and a bootstrap-driven high-side gate driver using an external BOOT-to-PH capacitor. Its PWM comparator features 70–85 ns propagation delay and supports fast transient response via type-2/type-3 compensation networks.

It integrates under-voltage lockout (UVLO start at 3.80 V, hysteresis 0.14 V), internal slow-start (2.6–4.1 ms), and a 2.70–2.90 V internal bias regulator (VBIAS) capable of supplying external circuitry. The device operates across −40°C to 125°C junction temperature and supports both sourcing and sinking output current without external components.

Key Specifications

Parameter	Value and Actual Design Meaning
Input Voltage Range	4.0 V to 6.0 V - Matches standard 5-V input rails; UVLO prevents startup below 3.8 V.
Continuous Output Current	±8 A - Supports bidirectional DDR termination with no external current-sense or sink FETs.
Switching Frequency	Fixed 350 kHz or adjustable 280–700 kHz - Set via RT resistor; enables EMI optimization and size tradeoffs.
Power MOSFET rDS(on)	30 mΩ (VI = 4.5 V) - Enables >90% efficiency at 5-V input / 1.25-V output / 8-A load (Fig. 12).
Reference Input Range	0.2 V to 1.75 V - Tracks half-VDDQ for DDR VTT; overrides internal 0.8-V reference above 1.75 V.
Thermal Shutdown	135–165°C trip, 10°C hysteresis - Protects against sustained overload; auto-recovery after cooldown.
Quiescent Current	11–23.5 mA (active), 1–1.4 mA (shutdown) - Minimizes standby power in always-on termination rails.

Pinout & Package

TPS54872PWPRG4 uses a thermally enhanced 28-pin HTSSOP (PWP) PowerPAD package (6.4 mm × 9.7 mm), with exposed thermal pad soldered to AGND plane for low-junction-to-ambient thermal impedance (14.4°C/W with solder).

Pin/Terminal	Circuit Role	Design Meaning
AGND (Pin 1)	Analog ground reference	Return for COMP, REFIN, RT, VBIAS, and compensation network; must connect to PowerPAD.
VSENSE (Pin 2)	Error amplifier inverting input	Connects to output voltage divider; sets regulation point relative to REFIN or internal 0.8-V reference.
COMP (Pin 3)	Error amplifier output	Drives external type-2/type-3 compensation network between COMP and VSENSE.
STATUS (Pin 4)	Open-drain power-good flag	Asserts low during UVLO, VBIAS undervoltage, or thermal shutdown; requires pull-up.
BOOT (Pin 5)	Bootstrap supply for high-side driver	Connects 0.022–0.1 µF ceramic capacitor to PH; enables floating gate drive for N-channel high-side FET.
PH (Pins 6–14)	Phase node (switching node)	Junction of internal high-side/low-side MOSFETs; connects directly to output inductor with minimal loop area.
RT (Pin 28)	Oscillator frequency set	Resistor to AGND selects 280–700 kHz; floating defaults to 350 kHz.
ENA (Pin 27)	Enable control input	Logic-high (>1.2 V) enables operation; logic-low (<0.9 V) disables with 1.4 mA shutdown current.
REFIN (Pin 26)	External tracking reference	High-impedance input (60–250 nA bias) for DDR VTT tracking; overrides internal reference below 1.75 V.
VBIAS (Pin 25)	Internal bias regulator output	Supplies 2.7–2.9 V to internal circuitry; bypass with 0.1–1.0 µF ceramic cap to AGND.
VIN (Pins 20–24)	Main power input	Accepts 4–6 V; each pin carries portion of input current; bypass individually with 10-µF ceramic caps to PGND.
PGND (Pins 15–19)	Power ground return	High-current return for low-side FET and input/output capacitors; separate from AGND except at single-point PowerPAD tie.

Key Features

Feature	Design Value
Integrated 30-mΩ MOSFETs	Eliminates need for external power switches, reducing BOM count and PCB area in DDR termination designs.
Bidirectional ±8-A operation	Supports both sourcing and sinking current without external components-critical for DDR VTT dynamic load balancing.
External reference tracking (0.2–1.75 V)	Enables precise VTT = ½ VDDQ tracking for DDR2/DDR3 compliance without external DAC or op-amp.
Adaptive dead-time control	Prevents shoot-through by sequencing high-side/low-side turn-on based on gate voltage thresholds (≤2 V).
PowerPAD thermal interface	Reduces thermal resistance by >50% vs. standard HTSSOP; enables full 8-A operation without heatsink.
Cycle-by-cycle overcurrent protection	Detects high-side current within 200 ns and blanks leading edge for noise immunity-no external sense resistor required.

Applications

DDR Memory Termination	Active GTL/SSTL Termination
Use Scenario: Providing matched termination voltage (VTT) for DDR2/DDR3 memory buses operating at 1.25 V or 1.5 V with dynamic current reversal. IC Role / Device Role / Timing Role: Synchronous buck converter acting as bidirectional point-of-load regulator, sourcing/sinking up to 8 A while tracking half-VDDQ. Use Value: Maintains <±5 mV load regulation (Fig. 11) and <0.03%/A line regulation (Table 3), ensuring signal integrity across memory data strobes.	Use Scenario: Supplying controlled termination voltage for high-speed logic families including GTL+, SSTL_18, and SSTL_2 in FPGA I/O banks and ASIC interfaces. IC Role / Device Role / Timing Role: Precision tracking regulator delivering stable VTT referenced to local I/O supply, supporting fast edge rates and low-noise margins. Use Value: Delivers <10 mVpp output ripple (Fig. 13) and 2-A-to-6-A transient response within ±20 mV (Fig. 14), preventing logic-level misreads.
DAC-Controlled High-Current Stage	Precision Point-of-Load Supply
Use Scenario: Replacing discrete op-amp + pass-FET solutions in programmable current sources for test equipment or analog front-ends. IC Role / Device Role / Timing Role: Voltage-controlled current sink/source where REFIN accepts DAC output to set output level dynamically. Use Value: Achieves 0.25 V/ms slow-start slope and <1.4 mA shutdown current-enabling clean power sequencing and low-power standby modes.	Use Scenario: Delivering tightly regulated 1.25-V or 1.5-V supply to high-performance DSPs, FPGAs, or ASIC cores requiring low-noise, high-transient-response power. IC Role / Device Role / Timing Role: Primary synchronous buck regulator with integrated MOSFETs, compensation flexibility, and thermal robustness. Use Value: Provides >95% peak efficiency (Fig. 10) and 85°C ambient operation at full load (Fig. 17), reducing system cooling requirements.

DDR Memory Termination

Active GTL/SSTL Termination

Use Scenario: Providing matched termination voltage (VTT) for DDR2/DDR3 memory buses operating at 1.25 V or 1.5 V with dynamic current reversal.

IC Role / Device Role / Timing Role: Synchronous buck converter acting as bidirectional point-of-load regulator, sourcing/sinking up to 8 A while tracking half-VDDQ.

Use Value: Maintains <±5 mV load regulation (Fig. 11) and <0.03%/A line regulation (Table 3), ensuring signal integrity across memory data strobes.

Use Scenario: Supplying controlled termination voltage for high-speed logic families including GTL+, SSTL_18, and SSTL_2 in FPGA I/O banks and ASIC interfaces.

IC Role / Device Role / Timing Role: Precision tracking regulator delivering stable VTT referenced to local I/O supply, supporting fast edge rates and low-noise margins.

Use Value: Delivers <10 mVpp output ripple (Fig. 13) and 2-A-to-6-A transient response within ±20 mV (Fig. 14), preventing logic-level misreads.

DAC-Controlled High-Current Stage

Precision Point-of-Load Supply

Use Scenario: Replacing discrete op-amp + pass-FET solutions in programmable current sources for test equipment or analog front-ends.

IC Role / Device Role / Timing Role: Voltage-controlled current sink/source where REFIN accepts DAC output to set output level dynamically.

Use Value: Achieves 0.25 V/ms slow-start slope and <1.4 mA shutdown current-enabling clean power sequencing and low-power standby modes.

Use Scenario: Delivering tightly regulated 1.25-V or 1.5-V supply to high-performance DSPs, FPGAs, or ASIC cores requiring low-noise, high-transient-response power.

IC Role / Device Role / Timing Role: Primary synchronous buck regulator with integrated MOSFETs, compensation flexibility, and thermal robustness.

Use Value: Provides >95% peak efficiency (Fig. 10) and 85°C ambient operation at full load (Fig. 17), reducing system cooling requirements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck regulator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
TPS54672PWPR	Same SWIFT family, 6-A output rating, identical pinout and feature set except lower current limit (7–9 A) and higher rDS(on) (40 mΩ typical).	Targeted at lower-current DDR termination or PoL applications where 6-A suffices; not suitable for 8-A DDR3L VTT peak loads.	Select TPS54672PWPR only when design margin allows ≤6-A continuous output and thermal budget permits higher conduction loss.
TPS54372PWPR	3-A version with same package and control architecture; lacks PH pin multiplicity (single PH), reduced thermal capability (7.5°C/W dissipation rating).	Intended for low-power logic termination or auxiliary rails-not viable for DDR main VTT due to insufficient current and thermal headroom.	Choose TPS54372PWPR only for non-DDR applications such as I²C bus termination or low-current FPGA I/O banks.

Compared with TPS54672PWPR and TPS54372PWPR, the TPS54872PWPRG4 delivers 33% higher continuous current and 25% lower MOSFET conduction loss-making it the sole SWIFT-family option qualified for full-spec DDR3 VTT operation at 8 A with 125°C junction temperature.

Availability

TPS54872PWPRG4 is available at Aetrix Electronics and suitable for DDR memory termination, active GTL/SSTL logic termination, and precision point-of-load power supplies requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for TPS54872PWPRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion and power system design.

The TPS54872PWPRG4 belongs to TI's SWIFT™ family of integrated synchronous buck regulators, designed specifically for high-current, low-voltage point-of-load applications in memory subsystems and high-speed digital logic interfaces.

FAQ

What is the maximum continuous output current capability of the TPS54872PWPRG4?

The TPS54872PWPRG4 supports ±8 A continuous output current in both sourcing and sinking directions. This bidirectional capability is achieved using integrated 30-mΩ high-side and low-side MOSFETs and is validated across −40°C to 125°C junction temperature with proper PCB thermal design per the PowerPAD layout guidelines in the datasheet. Peak current limit is specified at 9–11 A.

Does the TPS54872PWPRG4 require external MOSFETs for DDR VTT termination?

No, the TPS54872PWPRG4 does not require external MOSFETs for DDR VTT termination. It integrates matched high-side and low-side N-channel MOSFETs with 30-mΩ typical rDS(on), enabling full ±8-A bidirectional operation from a single IC. This eliminates external pass devices, simplifies layout, and reduces total solution size compared to discrete op-amp + FET approaches.

How is the switching frequency configured on the TPS54872PWPRG4?

The TPS54872PWPRG4 switching frequency is configured via the RT pin: leaving RT floating selects the internally set 350 kHz frequency, while connecting a resistor from RT to AGND adjusts frequency from 280 kHz to 700 kHz. For example, a 71.5-kΩ resistor sets 700 kHz. The relationship follows f_SW ≈ 500 kHz × (100 kΩ / R), with tolerance dependent on resistor accuracy and temperature drift.

Can the TPS54872PWPRG4 track a variable reference voltage for DDR applications?

Yes, the TPS54872PWPRG4 accepts an external reference voltage on the REFIN pin ranging from 0.2 V to 1.75 V. In DDR applications, this allows direct tracking of half-VDDQ (e.g., 1.25 V VTT from 2.5 V VDDQ). When REFIN exceeds 1.75 V, the internal 0.8-V reference takes precedence. The high-impedance input (60–250 nA bias) minimizes loading on external DAC or resistor-divider sources.

What thermal management features does the TPS54872PWPRG4 include?

The TPS54872PWPRG4 includes thermal shutdown with 135–165°C trip point and 10°C hysteresis, plus a thermally enhanced 28-pin HTSSOP PowerPAD package. When soldered to a 3″×3″ 1-oz copper analog ground plane with ≥12 thermal vias, it achieves 14.4°C/W junction-to-ambient thermal impedance-enabling full 8-A operation at 85°C ambient without external heatsinks.

TPS54872PWPRG4 Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: SWIFT™

Package/Case:: 28-PowerTSSOP (0.173", 4.40mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Applications:: Converter, DDR

Voltage - Input:: 4V ~ 6V

Number of Outputs:: 1

Voltage - Output:: 0.2V ~ 3.3V

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 28-HTSSOP

TPS54872PWPRG4 FAQ

1.How can I place an order for TPS54872PWPRG4 through Aetrix?

Please submit a Request for Quotation (RFQ) for TPS54872PWPRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TPS54872PWPRG4 reliable?

The price and inventory of TPS54872PWPRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54872PWPRG4 is usually 5 days.

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Once your TPS54872PWPRG4 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TPS54872PWPRG4?

For technical support, including TPS54872PWPRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54872PWPRG4 requirements.

6.How does Aetrix verify that TPS54872PWPRG4 is sourced from the original manufacturer or authorized distributors?

All TPS54872PWPRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54872PWPRG4 meets industry standards.

7.What is the process for return or replacement of TPS54872PWPRG4?

All TPS54872PWPRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS54872PWPRG4, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TPS54872PWPRG4 part is unused and in its original packaging.

Return procedure for TPS54872PWPRG4:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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