Texas Instruments TPS548A28RWWR
- Part No.:
- TPS548A28RWWR
- Manufacturer:
- Texas Instruments
- Package:
- 21-PowerVFQFN
- Datasheet:
-
TPS548A28RWWR.pdf
- Description:
- IC REG BUCK ADJ 15A 21VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:5,014
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS548A28RWWR from Texas Instruments is a 2.7-V to 16-V input, 15-A synchronous buck converter with differential remote sense, integrated 10.2-mΩ/3.1-mΩ MOSFETs, D-CAP3™ control, and a 3-V internal LDO. It delivers ±1% output voltage accuracy (0.6 V–5.5 V) over –40°C to +125°C and supports hiccup current limiting for robust server power delivery.
For engineers reviewing the TPS548A28RWWR datasheet, TPS548A28RWWR pinout, TPS548A28RWWR application, or TPS548A28RWWR equivalent, key selection considerations include its adaptive on-time D-CAP3 architecture, programmable 600/800/1000 kHz switching frequency, remote-sense-enabled load regulation, and 4-mm × 3-mm 21-pin VQFN-HR (RWW) package optimized for high-density data center point-of-load designs.
Technical Context
The TPS548A28RWWR implements D-CAP3™ control with emulated current sensing-eliminating external compensation while enabling stable operation with all-ceramic output capacitors. Its adaptive on-time modulation dynamically adjusts switching frequency during load transients to maintain ultra-fast response without sacrificing light-load efficiency.
It integrates dual power MOSFETs (10.2-mΩ HS / 3.1-mΩ LS), a 3-V internal LDO with UVLO monitoring, and differential remote sense circuitry referenced to a ±1% 0.6-V internal reference. Fault protection includes hiccup-mode overcurrent, latch-off overvoltage, and thermal shutdown at 150°C with 30°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V–16 V (supports 15 A with external VCC bias ≥3.13 V) |
| Output Voltage Range | 0.6 V–5.5 V (±1% accuracy over full –40°C to +125°C junction range) |
| Max Output Current | 15 A continuous (with external VCC bias); 12 A with internal LDO only) |
| Switching Frequency | 600 / 800 / 1000 kHz (pin-selectable via MODE resistor) |
| Integrated MOSFETs | 10.2-mΩ high-side + 3.1-mΩ low-side (reduces conduction loss, eliminates external FETs) |
| Control Architecture | D-CAP3™ with adaptive on-time (enables fast transient response, no external compensation required) |
| Remote Sense | Differential VSNS+/VSNS− inputs (enables accurate load regulation in high-current PCB traces) |
| Package | VQFN-HR (RWW), 4.0 mm × 3.0 mm, 21-pin (thermal performance: RθJA = 49.5°C/W, RθJB = 11.2°C/W) |
Pinout & Package
VQFN-HR (RWW) 4.0 mm × 3.0 mm, 21-pin thermally enhanced package with exposed thermal pad; designed for high-power density and low-inductance layout in space-constrained server and accelerator applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (BOOT) | High-side gate driver boost supply | Connects bootstrap capacitor between BOOT and SW to drive HS FET; requires low-ESR ceramic capacitor |
| 2 (AGND) | Analog ground reference | Reference for internal control circuits; must be isolated from PGND to minimize noise coupling |
| 3 (TRIP) | Valley current limit setting | Resistor-to-AGND sets OCL threshold (4.0 kΩ–14.7 kΩ); enables precise 15.1–21.4 A valley current limit |
| 4 (MODE) | Frequency & mode selection | Resistor-to-AGND selects FCCM/Skip mode and 600/800/1000 kHz switching frequency |
| 5 (SS/REFIN) | Soft-start timing / external reference input | Capacitor-to-VSNS− sets soft-start time (min 1.5 ms); DC voltage overrides internal 0.6-V reference for tracking |
| 6 (VSNS−) | Remote sense return | Return path for differential remote sensing; short to AGND for single-ended configuration |
| 7 (FB) | Feedback input | Resistor divider from VOUT to VSNS− sets output voltage; 1–40 nA leakage ensures precision |
| 8 (EN) | Enable control | Logic-level input (1.22 V threshold); internal 6.5-MΩ pull-down enables default disable state |
| 9 (PGOOD) | Open-drain power-good status | Indicates regulated output (±7.5% window); 1.06–1.40 ms startup delay, 0.5–5 µs fault response |
| 10, 21 (VIN) | Main input power supply | Dual VIN pins reduce IR drop and thermal stress; decouple close to PGND with multiple ceramic caps |
| 11–18 (PGND) | Power ground | Eight dedicated PGND pins minimize parasitic inductance; ≥6 vias per pin required for thermal and EMI performance |
| 19 (VCC) | Internal 3-V LDO output / external bias input | Supplies internal circuitry and gate drivers; bypass with 2.2-µF ceramic cap; accepts 3.13–5.3 V external bias |
| 20 (SW) | Switch node | Connects to output inductor; high dv/dt node requiring tight layout and minimal loop area |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP3™ adaptive on-time control | Enables ultra-fast load-step response (<1 µs) and stable all-ceramic capacitor operation without compensation network |
| Differential remote sensing | Compensates for PCB trace IR drop to maintain ±1% output regulation at load point under 15-A dynamic loads |
| Programmable hiccup current limit | Configurable valley current limit (15.1–21.4 A) via TRIP pin resistor; prevents thermal runaway during sustained overload |
| Auto-skip Eco-mode™ | Improves light-load efficiency by entering discontinuous conduction mode below ~1 A, reducing switching losses |
| Prebiased startup capability | Allows safe start-up into precharged output rails without reverse current flow or output overshoot |
| Integrated 3-V LDO with external bias option | Reduces power loss by enabling external 3.3–5.3 V bias on VCC pin-critical for high-efficiency 12-V input systems |
Applications
| Rack Server Point-of-Load | Hardware Accelerator Power |
|---|---|
Use Scenario: Delivering tightly regulated 0.8–1.2 V at up to 15 A to ASIC/FPGA cores in 1U/2U rack servers with strict thermal envelope constraints. IC Role / Device Role / Timing Role: Primary synchronous buck regulator with remote sense feedback and adaptive D-CAP3 control for sub-100-ns transient response. Use Value: Maintains ±1% output accuracy across temperature and load, enabling reliable high-frequency core operation without derating. | Use Scenario: Powering AI inference accelerators (e.g., PCIe add-in cards) requiring rapid current slew rates and low-noise 3.3 V or 5.0 V auxiliary rails. IC Role / Device Role / Timing Role: High-efficiency buck converter with programmable soft-start and prebiased startup for hot-plug compatibility. Use Value: Eliminates output voltage undershoot/overshoot during card insertion, preventing logic faults in host system enumeration. |
| Data Center Switch ASIC Supply | Industrial PC CPU Core Rail |
Use Scenario: Generating 0.75–1.1 V core voltage for multi-core switch ASICs in top-of-rack (ToR) switches with >100 A total board power. IC Role / Device Role / Timing Role: High-current POL regulator with hiccup OCP and thermal shutdown to survive short-circuit events in dense backplane environments. Use Value: Self-protecting fault behavior (hiccup vs latch-off) allows automatic recovery after transient shorts-reducing system downtime. | Use Scenario: Providing 1.0–1.35 V at 12 A to embedded x86 or ARM CPUs in fanless industrial PCs operating from 12 V DC input. IC Role / Device Role / Timing Role: Compact, thermally robust buck converter with 4×3 mm footprint and low RθJB (11.2°C/W) for passive cooling. Use Value: Enables full 12-A operation at 70°C ambient without forced airflow-meeting EN 60950-1 safety and thermal requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54JB20RQAR | 12-A rated, same RWW package and pinout; lower current capability, identical D-CAP3 control and remote sense | Suitable for lower-power server modules or cost-sensitive designs where 12-A peak suffices | Select when board space and layout reuse are critical but full 15-A capability is not required |
| MP2964GQH-Z | 15-A rating, 3.3-V fixed internal LDO, no external VCC bias option; uses different current-mode control | Better suited for industrial applications with stable 12-V input and no need for VCC bias flexibility | Choose when simplified bias architecture is preferred and D-CAP3-specific transient performance is not mandatory |
Compared with TPS548A28RWWR, TPS54JB20RQAR offers pin-compatible downrating for cost optimization, while MP2964GQH-Z trades D-CAP3's ultra-fast transient response for simpler current-mode control and fixed-bias operation-making each alternative optimal for distinct thermal, layout, or control-loop priorities.
Availability
TPS548A28RWWR is available at Aetrix Electronics and suitable for rack servers, hardware accelerators, and data center switches requiring stable component supply, long-term lifecycle support, and RoHS-compliant manufacturing.
Supply support for TPS548A28RWWR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-reliability power conversion solutions.
The TPS548A28RWWR belongs to TI's D-CAP3™ synchronous buck converter product line, engineered specifically for high-current, low-voltage point-of-load regulation in next-generation data center and AI infrastructure where efficiency, density, and transient response are critical.
FAQ
What is the minimum input voltage required for TPS548A28RWWR to operate with its internal VCC LDO enabled?
The TPS548A28RWWR requires a minimum input voltage of 3.0 V to enable its internal 3-V LDO and initiate normal operation. Below this threshold, the VCC UVLO circuit prevents startup-even if EN is asserted-ensuring stable bias for internal circuitry and gate drivers before switching begins. This specification is confirmed in Section 6.3 Recommended Operating Conditions of the official datasheet.
How does the TRIP pin on TPS548A28RWWR set the overcurrent protection threshold?
The TRIP pin on TPS548A28RWWR sets the valley current limit using an external resistor to AGND. With KOCL = 60,000 A·Ω, a 10-kΩ resistor yields a nominal 6-A limit, while the specified 4.0–14.7 kΩ range configures valley current limits from 15.1 A to 21.4 A. The TPS548A28RWWR datasheet Table 6-5 and Section 7.3.9 confirm this linear relationship and recommend ±1% tolerance resistors for accuracy.
Can TPS548A28RWWR be used with only ceramic output capacitors?
Yes, TPS548A28RWWR fully supports all-ceramic output capacitors due to its D-CAP3™ control architecture, which eliminates the need for external phase compensation. This is explicitly stated in the Features list and Section 7.3.3 of the datasheet. The control loop remains stable across wide capacitance and ESR ranges typical of X5R/X7R MLCCs, simplifying design and reducing bill-of-materials cost.
What is the purpose of the SS/REFIN pin on TPS548A28RWWR, and how is it configured for tracking applications?
The SS/REFIN pin on TPS548A28RWWR serves dual functions: soft-start timing (via capacitor to VSNS−) and external reference input. For tracking, a DC voltage applied to SS/REFIN directly replaces the internal 0.6-V reference-enabling synchronized ramp-up with master supplies. This is documented in Table 5-1 and Section 7.3.4, where the device continuously monitors SS/REFIN as the control loop reference, supporting precise multi-rail sequencing in complex systems.
Does TPS548A28RWWR support prebiased startup, and how is it implemented?
Yes, TPS548A28RWWR supports prebiased startup, allowing safe operation when the output rail is already charged before enable. Internal circuitry prevents reverse current flow through the low-side FET during startup, eliminating output voltage overshoot or undershoot. This capability is verified in Section 8.1 Application Information and Figure 8-2 of the datasheet, making TPS548A28RWWR suitable for hot-swap and modular power architectures.
TPS548A28RWWR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 21-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 16V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 15A
- Frequency - Switching:
- 600kHz, 800kHz, 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 21-VQFN-HR (4x3)
TPS548A28RWWR FAQ
1.How can I place an order for TPS548A28RWWR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS548A28RWWR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS548A28RWWR reliable?
The price and inventory of TPS548A28RWWR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS548A28RWWR is usually 5 days.
3.What payment methods are accepted for TPS548A28RWWR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS548A28RWWR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS548A28RWWR?
TPS548A28RWWR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS548A28RWWR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS548A28RWWR?
For technical support, including TPS548A28RWWR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS548A28RWWR requirements.
6.How does Aetrix verify that TPS548A28RWWR is sourced from the original manufacturer or authorized distributors?
All TPS548A28RWWR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS548A28RWWR meets industry standards.
7.What is the process for return or replacement of TPS548A28RWWR?
All TPS548A28RWWR units undergo pre-shipment inspection (PSI). If there is an issue with TPS548A28RWWR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS548A28RWWR part is unused and in its original packaging.
Return procedure for TPS548A28RWWR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS548A28RWWR Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

