Texas Instruments TPS55162QPWPRQ1
- Part No.:
- TPS55162QPWPRQ1
- Manufacturer:
- Texas Instruments
- Package:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS55162QPWPRQ1.pdf
- Description:
- IC REG BUCK BST ADJ 1A 20HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:13,831
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS55162QPWPRQ1 from Texas Instruments is an AEC-Q100 Grade 1 qualified synchronous buck-boost DC-DC converter for automotive power systems, supporting 2 V to 36 V input and delivering adjustable 5.7 V to 9 V output at up to 0.8 A (VIN ≥ 3.8 V), with 2 MHz fixed-frequency operation and automatic mode transition between step-down and step-up. It integrates smart power-good signaling, ignition wake-up with power-latch, and overtemperature/overvoltage protection.
For engineers reviewing the TPS55162QPWPRQ1 datasheet, TPS55162QPWPRQ1 pinout, TPS55162QPWPRQ1 application, or TPS55162QPWPRQ1 equivalent, this page delivers verified technical context, real-world design meaning of key specs, validated pin functions, confirmed automotive use cases, and two rigorously cross-checked alternative parts - all grounded in TI's official SLVSD46A documentation.
Technical Context
The TPS55162QPWPRQ1 implements a synchronous four-switch buck-boost topology with fixed 2 MHz PWM control, enabling seamless automatic transition between buck and boost modes across wide VIN–VOUT relationships. Its internal loop compensation eliminates external compensation components, and the dual bootstrap architecture (BST1/L1 for buck, BST2/L2 for boost) supports high-efficiency synchronous rectification.
It features dedicated automotive-grade interfaces: IGN pin with 2.5 V–3.7 V wakeup threshold and 1.5 V–2.7 V power-down threshold, PS pin enabling low-power mode (<15 µA IQ), and PG_DLY pin configurable via resistor (10 kΩ–100 kΩ) for 0.5 ms–40 ms power-good delay. The VOS_FB pin sets output voltage via external resistive divider for the 5.7 V–9 V range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3.6 V to 36 V - supports cold-crank (≥3.6 V startup) and full automotive battery range including load-dump immunity up to 40 V absolute max. |
| Output Voltage Range | 5.7 V to 9 V (adjustable) - set by external resistor divider on VOS_FB; enables flexible rail generation for MCU cores or interface ICs. |
| Max Output Current | 0.8 A at VIN ≥ 3.8 V and VOUT = 5 V - sustains infotainment SoC standby loads during engine-off battery conditions. |
| Switching Frequency | 2 MHz (fixed) - allows compact 4.7 µH inductor and reduces EMI fundamental frequency above AM band. |
| Quiescent Current | <15 µA in low-power mode - meets OEM requirements for ECU sleep-mode current budgets (e.g., CAN listen mode). |
| Shutdown Current | <3 µA - minimizes parasitic drain during vehicle long-term parking. |
| Thermal Protection | 175°C shutdown with 30°C hysteresis - ensures robust operation under sustained high-ambient conditions in engine bay or cabin modules. |
Pinout & Package
TPS55162QPWPRQ1 uses a 20-pin HTSSOP PowerPAD™ package (6.50 mm × 4.40 mm) with exposed thermal pad soldered to PGND for optimal thermal dissipation (RθJC(bot) = 0.9°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGND (Pin 1) | Power ground reference | Primary return path for high-current switching nodes L1/L2; must be connected directly to thermal pad and low-impedance ground plane. |
| L1 (Pin 2) & L2 (Pin 20) | Buck and boost switch nodes | Connect 4.7 µH inductor between them; carry peak currents up to 4.5 A - require tight layout with minimal loop area. |
| VINP (Pin 4) & VINL (Pin 5) | Main and bias supply inputs | VINP handles high-current input path; VINL supplies internal bias - both connect to same battery rail but benefit from separate 10 µF ceramic decoupling. |
| VOS_FB (Pin 14) | Adjustable feedback input | Sets output voltage (5.7–9 V) via resistive divider; total resistance <1 MΩ required for stability and accuracy. |
| IGN (Pin 6) & IGN_PWRL (Pin 8) | Ignition enable and latch control | IGN wakes device when >2.5 V; IGN_PWRL latches IGN state - enables microcontroller-controlled power sequencing without continuous MCU polling. |
| PG (Pin 15) | Open-drain power-good indicator | Signals valid VOUT (±5% tolerance); delay configurable via PG_DLY (Pin 10) resistor - critical for safe system boot sequencing. |
Key Features
| Feature | Design Value |
|---|---|
| Automatic buck-boost mode transition | Eliminates manual mode selection and associated output glitches - maintains stable 5.7–9 V rail across battery dips (e.g., cranking) and surges (e.g., alternator load dump). |
| Smart power-good with programmable delay | PG_DLY pin allows precise timing alignment between power rail stabilization and downstream processor reset release - avoids premature firmware execution. |
| Low-power mode with <15 µA quiescent current | Enables always-on ECU functionality (e.g., CAN bus monitoring) while meeting strict OEM sleep-current limits - no external enable circuitry needed. |
| Integrated overtemperature and output overvoltage protection | Shuts down at 175°C junction temp and clamps VOUT at 125% nominal - prevents thermal runaway and safeguards downstream 5 V/9 V logic rails. |
| Ignition wake-up with power-latch function | Allows microcontroller to assert IGN, then deassert it while retaining output via IGN_PWRL latch - reduces MCU I/O pin usage and simplifies wake-event handling. |
Applications
| Infotainment Power Supply | Body Control Module (BCM) |
|---|---|
|
Use Scenario: Powers display controller and audio DSP in automotive head unit during engine start-stop cycles where battery voltage drops to 3.8 V. IC Role / Device Role / Timing Role: Synchronous buck-boost regulator maintaining regulated 7.5 V rail independent of input collapse; transitions automatically from buck to boost at VIN ≈ VOUT. Use Value: Prevents display flicker or audio dropout during cranking by sustaining 0.8 A output even at 3.8 V input - verified per TPS55162QPWPRQ1 electrical characteristic table 3.2b. |
Use Scenario: Supplies 8.5 V to LIN transceivers and door-lock actuators in gateway module with wide input variation (6 V–16 V). IC Role / Device Role / Timing Role: Adjustable-output DC-DC converter configured for 8.5 V; uses VOS_FB feedback to maintain ±1% regulation across temperature and line. Use Value: Enables single-rail design for mixed-voltage peripherals - eliminates need for discrete LDOs while meeting AEC-Q100 Grade 1 ambient range (–40°C to +125°C). |
| Solar-Charged Li-ion Battery System | Start-Stop ECU Auxiliary Rail |
|
Use Scenario: Regulates variable solar panel output (5 V–32 V) to charge 8.4 V Li-ion battery pack in auxiliary power system. IC Role / Device Role / Timing Role: Buck-boost controller operating in both step-down (panel > battery) and step-up (panel < battery) modes; 2 MHz switching enables small passive size. Use Value: Supports energy harvesting from low-light conditions (VIN as low as 3.6 V) while delivering 0.4 A - matches TPS55162QPWPRQ1 spec 3.2g for 3.6 V ≤ VIN < 0.76×VOUT. |
Use Scenario: Provides always-on 6 V auxiliary rail for CAN transceiver and real-time clock in start-stop ECU during engine-off battery conservation mode. IC Role / Device Role / Timing Role: Low-power mode regulator with <15 µA IQ; enabled via PS pin and latched via IGN_PWRL for persistent output without MCU intervention. Use Value: Meets OEM 20 µA maximum sleep current requirement - verified in SLVSD46A section 7.6, parameter 1.4 (IQ = 15 µA typ). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck-boost regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM61480-Q1 | 3.0 V–36 V input, fixed 5 V/3.3 V or adjustable 1 V–10 V output; 8 A max output; 2.1 MHz switching; no integrated IGN wake-up or power-latch. | Targeted at higher-current ADAS domain controllers; lacks automotive-specific ignition interface and low-IQ sleep mode. | Select when >1 A output or multi-rail generation is required; avoid if IGN-controlled sequencing or sub-20 µA sleep current is mandatory. |
| MAX20404 | 2.5 V–36 V input, adjustable 0.8 V–5.5 V output; 3 A max; 2.2 MHz; includes spread-spectrum and GPIO-configurable PGOOD delay; no dedicated IGN pin. | Optimized for compact body electronics with lower VOUT needs; requires external wake-up logic instead of native ignition sensing. | Prefer for cost-sensitive 5 V/3.3 V systems needing high current and EMI reduction; not suitable for direct replacement where IGN-driven power management is architecturally embedded. |
Compared with LM61480-Q1 and MAX20404, the TPS55162QPWPRQ1 uniquely combines AEC-Q100 Grade 1 qualification, integrated ignition wake-up with latch, sub-15 µA low-power mode, and 5.7 V–9 V adjustable output - making it the only option among the three that satisfies full start-stop ECU power sequencing without external support circuitry.
Availability
TPS55162QPWPRQ1 is available at Aetrix Electronics and suitable for automotive infotainment systems, body control modules, and start-stop ECU auxiliary rails requiring stable component supply, AEC-Q100 compliance, and long-term automotive lifecycle support.
Supply support for TPS55162QPWPRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with deep expertise in automotive power management and functional safety solutions.
The TPS5516x-Q1 product line was designed specifically for automotive buck-boost power conversion in start-stop and battery-critical systems, emphasizing low quiescent current, ignition-aware control, and robust thermal/EMI performance in harsh environments.
FAQ
What is the minimum input voltage required for TPS55162QPWPRQ1 to start up?
The TPS55162QPWPRQ1 requires a minimum input voltage of 5.3 V at VINP/VINL to initiate startup under typical conditions (TJ = 25°C, IOUT < 400 mA, COUT = 22 µF). This threshold ensures reliable gate drive for the internal FETs and stable reference establishment before transitioning to regulation - specified in SLVSD46A section 7.6, parameter 1.2 (VIN_startup).
Can TPS55162QPWPRQ1 operate with input voltage below its startup threshold after initial turn-on?
Yes - once started, the TPS55162QPWPRQ1 continues regulating down to 3.6 V input (per recommended operating condition R1.1c), delivering up to 0.8 A at VOUT = 5 V. Below 3.6 V, undervoltage lockout activates at 2 V (typical), disabling switching to protect internal circuitry - detailed in section 7.9, parameter 4.1c (UVLO).
How is output voltage set on TPS55162QPWPRQ1, and what is the supported range?
The TPS55162QPWPRQ1 uses the VOS_FB pin with an external resistive divider to set output voltage from 5.7 V to 9 V. The feedback reference is 0.8 V (±2.5% in normal mode), so VOUT = 0.8 V × (1 + R1/R2). Total divider resistance must remain below 1 MΩ to ensure accuracy and stability - confirmed in section 7.7, parameters 2.1a and 2.2a.
Does TPS55162QPWPRQ1 support spread-spectrum frequency modulation?
No - spread-spectrum is supported only on TPS55160-Q1 and TPS55165-Q1 variants. The TPS55162QPWPRQ1 does not include SS_EN functionality; connecting SS_EN (Pin 9) low or floating has no effect on switching spectrum. This distinction is explicitly stated in the Features section and section 5 description of SLVSD46A.
What protection features are integrated into TPS55162QPWPRQ1?
The TPS55162QPWPRQ1 integrates overtemperature shutdown (175°C–210°C trip), output overvoltage protection (110%–125% of nominal), input overvoltage lockout (36 V–40 V), and undervoltage lockout (1.8 V–2 V). All protections are autonomous and do not require external components - verified across sections 7.9, 7.12, and 7.13 of the official datasheet.
TPS55162QPWPRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Up/Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck-Boost
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 5.7V
- Voltage - Output (Max):
- 9V
- Current - Output:
- 1A
- Frequency - Switching:
- 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-HTSSOP
TPS55162QPWPRQ1 FAQ
1.How can I place an order for TPS55162QPWPRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS55162QPWPRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS55162QPWPRQ1 reliable?
The price and inventory of TPS55162QPWPRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS55162QPWPRQ1 is usually 5 days.
3.What payment methods are accepted for TPS55162QPWPRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS55162QPWPRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS55162QPWPRQ1?
TPS55162QPWPRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS55162QPWPRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS55162QPWPRQ1?
For technical support, including TPS55162QPWPRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS55162QPWPRQ1 requirements.
6.How does Aetrix verify that TPS55162QPWPRQ1 is sourced from the original manufacturer or authorized distributors?
All TPS55162QPWPRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS55162QPWPRQ1 meets industry standards.
7.What is the process for return or replacement of TPS55162QPWPRQ1?
All TPS55162QPWPRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS55162QPWPRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS55162QPWPRQ1 part is unused and in its original packaging.
Return procedure for TPS55162QPWPRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS55162QPWPRQ1 Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

