My Inquiry
My Account
Texas Instruments TPS55165QPWPTQ1
- Part No.:
- TPS55165QPWPTQ1
- Manufacturer:
- Texas Instruments
- Package:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS55165QPWPTQ1.pdf
- Description:
- IC REG BUCK BST 5V/12V 20HTSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:497
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS55165QPWPTQ1 from Texas Instruments is an AEC-Q100 Grade 1 qualified synchronous buck-boost DC-DC converter for automotive power systems, delivering fixed 5-V or 12-V output at up to 1-A load (VIN ≥ 5.3 V), operating across 2-V to 36-V input, and featuring 2-MHz fixed-frequency PWM control with automatic mode transition between step-down and step-up.
For engineers reviewing the TPS55165QPWPTQ1 datasheet, TPS55165QPWPTQ1 pinout, TPS55165QPWPTQ1 application, or TPS55165QPWPTQ1 equivalent, this page provides verified technical context, validated pin functions, confirmed automotive-grade thermal and ESD specifications, and real-world implementation constraints including IGN wake-up thresholds, low-power mode quiescent current (<15 µA), and PG delay configurability.
Technical Context
The TPS55165QPWPTQ1 implements a single-inductor, four-switch synchronous buck-boost topology with overlap control that enables seamless, loss-minimized transitions between buck and boost modes as input voltage crosses the output setpoint. Its internal gate drivers support 2-MHz switching with integrated bootstrap circuits (BST1/L1 and BST2/L2) and quiet VREG_Q feedback for stable high-side FET biasing.
It integrates functional safety support via documentation for ISO 26262 ASIL-B system integration, includes dual-level overvoltage protection (input OVLO at 36–40 V and output OVP at 110–125% of nominal), and features programmable power-good assertion with resistor-configurable delay (0.5–40 ms via PG_DLY) and latch-enabled ignition wake-up (IGN/IGN_PWRL) for start-stop battery profiles.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2 V to 36 V (for 5-V output); supports cold-crank (2.3 V) and load-dump (36 V) automotive transients |
| Output Voltage | Fixed 5 V or 12 V (selected by VOS_FB pin connection to GND or VREG); ±2% tolerance over temp/load |
| Max Output Current | 1 A at VIN ≥ 5.3 V / VOUT = 5 V; 800 mA at VIN ≥ 14 V / VOUT = 12 V; maintains regulation down to 150 mA at VIN = 4 V |
| Switching Frequency | 2 MHz (fixed, forced PWM); enables use of compact 4.7-µH inductor and reduces EMI fundamental frequency |
| Quiescent Current | <15 µA in low-power mode (PS = high); supports <100-µA system standby requirements for infotainment modules |
| Shutdown Current | <3 µA (VIN = 12 V); minimizes battery drain during vehicle off-state |
| Thermal Resistance | RθJA = 35.4°C/W (HTSSOP-20 PowerPAD™); requires thermal pad soldered to PGND for safe 1-A operation at TA = 125°C |
Pinout & Package
TPS55165QPWPTQ1 is housed in a 20-pin HTSSOP PowerPAD™ package (6.50 mm × 4.40 mm) with exposed thermal pad requiring solder connection to PGND for thermal management and EMI reduction.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGND (Pin 1) | Power ground reference | Main return path for high-current switch nodes (L1/L2) and output capacitor; must be low-impedance plane under thermal pad |
| L1 (Pin 2) & L2 (Pin 20) | Buck and boost switch nodes | Connect ends of single 4.7-µH inductor; define buck (L1–VINP) and boost (L2–VOUT) power paths; require tight layout to minimize ringing |
| BST1 (Pin 3) & BST2 (Pin 19) | Bootstrap supplies | Drive high-side FET gates; each requires dedicated 100-nF ceramic capacitor to respective switch node (L1/L2) |
| VINP (Pin 4) & VINL (Pin 5) | Main and bias input supplies | VINP handles full input current; VINL powers internal bias circuitry - both connect to same battery rail but need separate 10-µF input caps |
| VOS_FB (Pin 14) | Output voltage selection | GND = 5 V output; VREG = 12 V output; no external resistor divider needed - eliminates feedback network error sources |
| PG_DLY (Pin 10) | Power-good delay configuration | Resistor (10 kΩ–100 kΩ) sets PG assertion delay from 0.5 ms to 40 ms; open = default 2-ms delay; critical for MCU reset timing coordination |
| IGN (Pin 6) & IGN_PWRL (Pin 8) | Ignition wake-up and latch control | IGN high (>3.1 V) wakes device; IGN_PWRL high latches IGN state - enables microcontroller-controlled power retention during cranking |
Key Features
| Feature | Design Value |
|---|---|
| Automatic buck-boost mode transition | Eliminates output discontinuity and efficiency dip when VIN crosses VOUT; no external control logic required |
| Selectably enabled spread spectrum (SS_EN) | Reduces peak radiated EMI by >10 dB at 2-MHz fundamental; disabled by pulling SS_EN low (default enabled when open) |
| Smart power-good with configurable delay | Open-drain PG pin asserts only after output settles within ±5% tolerance; delay prevents false resets during startup transients |
| Low-power mode with sub-15-µA IQ | Enables always-on ECU subsystems (e.g., CAN listen mode) while meeting OEM 100-µA total-system standby limits |
| AEC-Q100 Grade 1 qualification | Validated for –40°C to +125°C ambient operation, HBM ±2-kV, CDM ±500-V - suitable for under-hood and infotainment applications |
Applications
| Infotainment Power Supply | Body Control Module (BCM) |
|---|---|
|
Use Scenario: Powering head-unit SoC, display backlight, and audio amplifier from unstable 9–16-V automotive battery during engine start-stop cycles. IC Role / Device Role / Timing Role: Primary buck-boost regulator maintaining stable 5-V rail despite 2.3-V crank dips and 36-V load dumps. Use Value: Enables uninterrupted operation without brownout resets; 2-MHz switching allows small 4.7-µH inductor and 22-µF output cap to fit tight PCB space. |
Use Scenario: Supplying 12-V actuators (door locks, window motors) and 5-V microcontrollers from shared vehicle battery with wide VIN variation. IC Role / Device Role / Timing Role: Dual-output-capable regulator (5 V/12 V select) providing isolated, regulated rails with independent PG signaling. Use Value: Eliminates need for separate buck and boost ICs; smart PG delay (via PG_DLY) synchronizes MCU boot with actuator enable timing. |
| Solar Charge Controller Interface | Li-ion Battery Pack Management |
|
Use Scenario: Regulating variable solar panel output (8–32 V) to charge 12-V lead-acid or 5-V USB-PD battery banks in automotive auxiliary systems. IC Role / Device Role / Timing Role: Wide-input buck-boost converter interfacing unregulated PV source to constant-voltage battery charging stage. Use Value: Maintains >85% efficiency across full input range; spread-spectrum mode suppresses EMI coupling into sensitive battery sensing lines. |
Use Scenario: Powering fuel-gauge ICs, protection circuits, and BLE radios from partially discharged Li-ion cells (2.8–4.2 V per cell) in multi-cell packs. IC Role / Device Role / Timing Role: Step-up regulator generating stable 5-V rail from single-cell or two-cell inputs below 5 V. Use Value: Delivers 400 mA at VIN = 2.3 V - sufficient for low-power telemetry during deep discharge; shutdown current <3 µA preserves pack energy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck-boost regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM61480-Q1 | 3.5-V to 36-V input; adjustable 1-V to 18-V output; 3.5-A max; no fixed 5/12-V option; no IGN wake-up | Requires external feedback resistors; better for high-current, programmable-rail designs; lacks automotive ignition interface | Choose LM61480-Q1 when >1-A output or adjustable VOUT is required; avoid if fixed 5/12-V and cranking-aware wake-up are mandatory. |
| MAX20012AATP/V+T | 3.5-V to 36-V input; fixed 5-V output; 2.5-A max; 2.1-MHz switching; integrated MOSFETs; no spread spectrum | Higher current capability; smaller 16-pin TQFN; lacks PG delay config and VOS_FB-based voltage selection | Choose MAX20012AATP/V+T for space-constrained, high-current 5-V apps where PG timing flexibility and dual-output selection are not needed. |
Compared with LM61480-Q1 and MAX20012AATP/V+T, TPS55165QPWPTQ1 uniquely combines fixed 5/12-V selection via VOS_FB, cranking-tolerant 2-V startup, ignition-latch wake-up, and resistor-programmable PG delay - making it optimal for cost-sensitive, functionally focused automotive modules requiring minimal external components and precise power sequencing.
Availability
TPS55165QPWPTQ1 is available at Aetrix Electronics and suitable for automotive infotainment systems, body electronics modules, and industrial battery-powered equipment requiring stable component supply across extended temperature and voltage ranges.
Supply support for TPS55165QPWPTQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive ICs, with decades of automotive qualification expertise and broad AEC-Q100 product coverage.
The TPS5516x-Q1 family was designed specifically for automotive power systems subject to wide input transients - delivering reliable, low-quiescent-current buck-boost conversion for start-stop, infotainment, and gateway applications.
FAQ
What is the minimum input voltage required for TPS55165QPWPTQ1 to start up and regulate 5 V?
The TPS55165QPWPTQ1 requires a minimum input voltage of 5.3 V at VINP/VINL to initiate startup and deliver regulated 5-V output with 400-mA load and 22-µF output capacitance. Below this threshold, the device remains in undervoltage lockout (UVLO) until VIN rises above 2 V (typical UVLO release point), but full regulation is not achieved until VIN ≥ 5.3 V. This ensures robust operation during battery cranking events.
How does TPS55165QPWPTQ1 select between 5-V and 12-V output configurations?
The TPS55165QPWPTQ1 selects output voltage using the VOS_FB pin (Pin 14): connecting VOS_FB directly to GND sets VOUT to 5 V (±2%), while connecting VOS_FB to VREG (Pin 12) sets VOUT to 12 V (±2%). No external resistors are needed - this hardware-selectable dual-output capability simplifies design and improves accuracy versus resistor-divider-based adjustable regulators.
Can TPS55165QPWPTQ1 operate in low-power mode while maintaining 1-A output capability?
No. In low-power mode (PS pin = high), the TPS55165QPWPTQ1 reduces switching activity to achieve <15-µA quiescent current, but output current capability is limited to 50 mA (per datasheet Section 7.8, parameter IOUT_PS). Full 1-A output is only available in normal mode (PS = low), where the device operates in continuous 2-MHz PWM. Low-power mode is intended for standby, not active regulation.
What is the purpose of the IGN_PWRL pin on TPS55165QPWPTQ1, and how is it used?
The IGN_PWRL pin (Pin 8) enables power-latch functionality: when driven high, it latches the IGN pin state so that the device remains enabled even if IGN drops momentarily (e.g., during engine cranking dips). This prevents unintended shutdown during transient battery sags. The latch is cleared only when IGN falls below its power-down threshold (~2.1 V) while IGN_PWRL is low.
Does TPS55165QPWPTQ1 include overtemperature protection, and what is its trip point?
Yes. The TPS55165QPWPTQ1 includes overtemperature shutdown protection with a typical trip threshold of 192.5°C (range: 175–210°C) and hysteresis of 30°C. When junction temperature exceeds the threshold, the device disables switching and holds VOUT in regulation until temperature falls below (trip point – 30°C), then resumes normal operation. This protects against thermal runaway in sealed enclosures or high-ambient conditions.
TPS55165QPWPTQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Up/Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck-Boost
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3.6V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 5V, 12V
- Voltage - Output (Max):
- -
- Current - Output:
- 1A
- Frequency - Switching:
- 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-HTSSOP
TPS55165QPWPTQ1 FAQ
1.How can I place an order for TPS55165QPWPTQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS55165QPWPTQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS55165QPWPTQ1 reliable?
The price and inventory of TPS55165QPWPTQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS55165QPWPTQ1 is usually 5 days.
3.What payment methods are accepted for TPS55165QPWPTQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS55165QPWPTQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS55165QPWPTQ1?
TPS55165QPWPTQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS55165QPWPTQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS55165QPWPTQ1?
For technical support, including TPS55165QPWPTQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS55165QPWPTQ1 requirements.
6.How does Aetrix verify that TPS55165QPWPTQ1 is sourced from the original manufacturer or authorized distributors?
All TPS55165QPWPTQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS55165QPWPTQ1 meets industry standards.
7.What is the process for return or replacement of TPS55165QPWPTQ1?
All TPS55165QPWPTQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS55165QPWPTQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS55165QPWPTQ1 part is unused and in its original packaging.
Return procedure for TPS55165QPWPTQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS55165QPWPTQ1 Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
