Texas Instruments TPS55383PWPRG4
- Part No.:
- TPS55383PWPRG4
- Manufacturer:
- Texas Instruments
- Package:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS55383PWPRG4.pdf
- Description:
- IC REG BUCK ADJ 3A DL 16HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS55383PWPRG4 from Texas Instruments is a dual non-synchronous buck converter IC with integrated 85-mΩ high-side MOSFETs per channel, supporting 4.5–28-V input and delivering up to 3-A output current per channel at 300 kHz switching frequency. It features independent enable pins (EN1/EN2), 180° out-of-phase PWM outputs, and external compensation via COMP1/COMP2 for flexible loop tuning in multi-rail power systems.
For engineers reviewing the TPS55383PWPRG4 datasheet, TPS55383PWPRG4 pinout, TPS55383PWPRG4 application, or TPS55383PWPRG4 equivalent, key selection considerations include its dual-channel current-mode control architecture, three-level overcurrent protection on Channel 2 (via ILIM2), ratiometric/sequential startup modes (SEQ pin configurable), and thermal shutdown at +148°C - all in a thermally enhanced 16-pin HTSSOP PowerPAD™ package.
Technical Context
The TPS55383PWPRG4 implements current-mode control with pulse-by-pulse overcurrent protection on both channels: Channel 1 fixed at 4.5 A, Channel 2 selectable (1.5 A / 3.0 A / 4.5 A) via ILIM2 pin connection. Its internal 0.8-V ±1.75% reference and dual error amplifiers (gM = 220–420 µS) support wide-range output voltage setting (0.8 V to 90% of VIN) with user-defined compensation networks.
Startup sequencing is determined by the SEQ pin state (BP/GND/floating), enabling ratiometric, master-slave sequential, or independent operation. The BP regulator (5.25 V ±5%) powers bootstrap circuits for both high-side FETs, while UVLO (4.1 V turn-on, 600 mV hysteresis) ensures reliable power-up across temperature (–40°C to +125°C).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 28 V - supports wide industrial and automotive supply rails without pre-regulation. |
| Switching Frequency | 300 kHz - balances efficiency, EMI, and component size for mid-power DC/DC designs. |
| Output Current (per channel) | Up to 3 A - enables dual 3-A rails or 6-A multiphase configuration with shared input. |
| Feedback Reference Voltage | 0.8 V ±1.75% - sets precise output regulation point; allows 0.8 V to 25.2 V output with resistor divider. |
| Overcurrent Protection (CH1) | 4.5 A typical - hard limit prevents MOSFET failure under sustained overload or short-circuit. |
| Thermal Shutdown Threshold | +148°C - protects against junction overheating during transient overload or poor PCB thermal design. |
| Soft Start Time | 2.1 ms typical - limits inrush current during power-up, reducing stress on input capacitors and source. |
| Package | 16-pin HTSSOP with exposed thermal pad - enables high-power dissipation (θJA = 40°C/W) with standard reflow assembly. |
Pinout & Package
TPS55383PWPRG4 is housed in a 16-pin PowerPAD™ HTSSOP (PWP) package with an exposed thermal pad on the bottom side, requiring direct connection to PCB ground plane for optimal thermal performance and electrical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVDD1 (Pin 1) | Power input for CH1 high-side MOSFET | Must be bypassed locally with ≥10-µF low-ESR ceramic capacitor; independent of PVDD2 for dual-supply operation. |
| BOOT1 (Pin 2) | Bootstrap supply for CH1 high-side gate driver | Connects via 22–82-nF capacitor to SW1; internal switch charges it from BP during CH1 off-time. |
| SW1 (Pin 3) | Switch node for CH1 | Drives external inductor; requires snubber to suppress ringing due to fast MOSFET transitions. |
| GND (Pin 4) | Signal and power ground reference | Connected directly to thermal pad; forms return path for control circuitry and power stage currents. |
| SEQ (Pin 12) | Startup sequencing mode selector | Configures ratiometric (floating), CH2→CH1 (tied to BP), or CH1→CH2 (tied to GND) power-up sequence. |
| ILIM2 (Pin 11) | Channel 2 overcurrent threshold select | Three levels: GND = 1.5 A, floating = 3.0 A, BP = 4.5 A - enables asymmetric load optimization. |
| FB1/FB2 (Pins 7, 10) | Voltage feedback inputs | Each regulates its output to 0.8 V reference; resistor dividers set output voltage; bias current ≤50 nA. |
| COMP1/COMP2 (Pins 8, 9) | Error amplifier outputs | External R-C compensation network connects here to stabilize loop response across load/line variations. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 180° out-of-phase PWM outputs | Reduces input ripple current by ~70% vs. in-phase operation, easing input capacitor sizing and EMI filtering. |
| Configurable startup sequencing (SEQ pin) | Eliminates need for external sequencers in DSP/FPGA power supplies requiring strict rail-ordering (e.g., core before I/O). |
| Three-level OCP on Channel 2 (ILIM2) | Allows downsizing of CH2 magnetics and MOSFETs when load current is lower than CH1, improving cost and efficiency. |
| External compensation (COMP1/COMP2) | Enables loop optimization for diverse output filter topologies (LC, LC-LC, ceramic-only) and load transient profiles. |
| Integrated 85-mΩ high-side MOSFETs | Removes need for external switches and gate drivers, reducing BOM count and layout complexity in space-constrained designs. |
| 2.1-ms internal soft start | Prevents output overshoot and inrush-induced voltage droop on shared input rails during cold-start conditions. |
Applications
| Set-Top Box Power Rails | Digital TV Core/I/O Supplies |
|---|---|
Use Scenario: Dual-rail power delivery for MPEG decoder SoC requiring 1.2-V core and 3.3-V I/O with controlled startup order. IC Role / Device Role / Timing Role: Primary dual-output DC/DC controller managing independent soft-start timing and voltage sequencing via SEQ pin. Use Value: Eliminates discrete sequencing ICs; SEQ pin tied to GND ensures 1.2-V core powers before 3.3-V I/O, preventing latch-up. |
Use Scenario: Compact power solution for LCD panel controller with 5-V analog and 1.8-V digital rails. IC Role / Device Role / Timing Role: Dual-channel buck converter operating in ratiometric mode (SEQ floating) for simultaneous rail ramp-up. Use Value: 300-kHz switching enables small 2.2-µH inductors; integrated MOSFETs reduce board area by >35% vs. controller+MOSFET solution. |
| Industrial DSP Power Supply | Consumer Audio Amplifier Bias Rails |
Use Scenario: High-reliability power for TI C6000 DSP requiring 1.4-V core and 3.3-V peripheral supply with overcurrent fault isolation. IC Role / Device Role / Timing Role: Dual-channel regulator with independent EN1/EN2 enables selective shutdown and fault recovery per rail. Use Value: ILIM2 pin set to GND configures CH2 (3.3-V) for 1.5-A OCP, matching peripheral load while protecting CH1 (1.4-V/3-A) at full rating. |
Use Scenario: Dual-symmetric bias supply for Class-D audio amplifier needing ±12-V rails from single 24-V input. IC Role / Device Role / Timing Role: Two-channel buck used in inverting configuration (with external charge pump) to generate negative rail. Use Value: 28-V max input accommodates wide-input 24-V industrial bus; thermal shutdown prevents damage during speaker short-circuit events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS55386PWPR | 600-kHz switching frequency; identical pinout and feature set except oscillator frequency. | Better suited for compact designs requiring smaller magnetics; higher switching loss at full load. | Select TPS55386PWPR when board space is constrained and efficiency at light-to-moderate loads is prioritized. |
| LM5119MT/NOPB | Two-phase synchronous buck controller (external MOSFETs); no integrated high-side FETs; supports up to 65-V input. | Targeted at higher-voltage industrial applications; requires more external components but offers greater flexibility. | Choose LM5119MT/NOPB when input exceeds 28 V or synchronous rectification is required for >90% efficiency at high load. |
Compared with TPS55383PWPRG4, TPS55386PWPR offers higher frequency for smaller passives but reduced full-load efficiency, while LM5119MT/NOPB trades integration for wider input range and synchronous operation - making TPS55383PWPRG4 optimal for cost-sensitive, 4.5–28-V dual-rail systems needing minimal external parts.
Availability
TPS55383PWPRG4 is available at Aetrix Electronics and suitable for set-top box power rails, digital TV core/I/O supplies, industrial DSP power supplies, consumer audio amplifier bias rails, and embedded multi-rail systems requiring stable component supply across production lifecycles.
Supply support for TPS55383PWPRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability power conversion ICs.
The TPS55383PWPRG4 belongs to TI's non-synchronous dual-buck converter product line, designed specifically for cost-effective, space-efficient dual-rail power delivery in consumer, industrial, and broadcast electronics where simplicity and thermal robustness are critical.
FAQ
What is the maximum input voltage supported by the TPS55383PWPRG4?
The TPS55383PWPRG4 supports an absolute maximum input voltage of 30 V on PVDD1 and PVDD2 pins, with recommended operation from 4.5 V to 28 V. Exceeding 30 V risks permanent damage per Absolute Maximum Ratings. For continuous 28-V operation, ensure thermal design maintains junction temperature below +125°C using the HTSSOP PowerPAD™ thermal pad.
How does the ILIM2 pin configure overcurrent protection on Channel 2 of the TPS55383PWPRG4?
The ILIM2 pin on the TPS55383PWPRG4 selects one of three Channel 2 overcurrent thresholds: grounded = 1.5 A, floating = 3.0 A, or tied to BP = 4.5 A. This is achieved via internal 150-kΩ resistors forming a divider between BP and GND. The setting directly scales the current-sense comparator threshold, allowing optimized external component selection for asymmetric loads without compromising fault protection integrity.
Can the TPS55383PWPRG4 operate with different input voltages on PVDD1 and PVDD2?
Yes, the TPS55383PWPRG4 supports dual-supply operation: PVDD1 powers only the CH1 high-side MOSFET, while PVDD2 powers control circuitry, EN1/EN2 pull-ups, and the CH2 high-side MOSFET. This allows independent input sources (e.g., 12 V for CH1, 24 V for CH2), provided each stays within 4.5–28 V and UVLO is satisfied on PVDD2 to enable the device.
What is the purpose of the SEQ pin on the TPS55383PWPRG4, and how does it affect startup behavior?
The SEQ pin on the TPS55383PWPRG4 determines output startup sequencing: tied to BP enables CH2→CH1 sequential startup (~400 µs delay), tied to GND enables CH1→CH2, and floating configures ratiometric (simultaneous) startup. This eliminates external sequencing ICs in FPGA/DSP power supplies where rail ordering prevents latch-up or ensures proper initialization sequence.
Does the TPS55383PWPRG4 require external compensation components, and where are they connected?
Yes, the TPS55383PWPRG4 requires external compensation networks connected to COMP1 (Pin 8) and COMP2 (Pin 9). Each network consists of a series RC from COMPx to GND, tuning the error amplifier's loop response. This allows optimization for specific output filter characteristics (e.g., ceramic vs. electrolytic capacitors) and load transient requirements, unlike fixed-compensation converters.
TPS55383PWPRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 28V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 26.6V
- Current - Output:
- 3A
- Frequency - Switching:
- 310kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-HTSSOP
TPS55383PWPRG4 FAQ
1.How can I place an order for TPS55383PWPRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS55383PWPRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS55383PWPRG4 reliable?
The price and inventory of TPS55383PWPRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS55383PWPRG4 is usually 5 days.
3.What payment methods are accepted for TPS55383PWPRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS55383PWPRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS55383PWPRG4?
TPS55383PWPRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS55383PWPRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS55383PWPRG4?
For technical support, including TPS55383PWPRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS55383PWPRG4 requirements.
6.How does Aetrix verify that TPS55383PWPRG4 is sourced from the original manufacturer or authorized distributors?
All TPS55383PWPRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS55383PWPRG4 meets industry standards.
7.What is the process for return or replacement of TPS55383PWPRG4?
All TPS55383PWPRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS55383PWPRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS55383PWPRG4 part is unused and in its original packaging.
Return procedure for TPS55383PWPRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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