Texas Instruments TPS562219ADDFR
- Part No.:
- TPS562219ADDFR
- Manufacturer:
- Texas Instruments
- Package:
- SOT-23-8 Thin, TSOT-23-8
- Datasheet:
-
TPS562219ADDFR.pdf
- Description:
- IC REG BUCK ADJ 2A TSOT23-8
- Quantity:
- Payment:

- Shipping:

Inventory:8,900
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Product details
Overview
TPS562219ADDFR from Texas Instruments is a 2-A synchronous step-down DC-DC converter in an 8-pin SOT-23 (DDF) package, featuring D-CAP2™ control mode, 650-kHz fixed switching frequency, 4.5 V to 17 V input range, and 0.76 V to 7 V adjustable output voltage. It integrates 133-mΩ high-side and 80-mΩ low-side MOSFETs and delivers 1% feedback voltage accuracy for powering core logic in digital consumer electronics.
For engineers reviewing the TPS562219ADDFR datasheet, TPS562219ADDFR pinout, TPS562219ADDFR application, or TPS562219ADDFR equivalent, key selection criteria include its D-CAP2™ transient response capability, pre-biased soft-start support, power-good signaling, cycle-by-cycle overcurrent protection, and thermal shutdown with hiccup-mode recovery - all critical for compact, reliable point-of-load regulation.
Technical Context
The TPS562219ADDFR employs adaptive on-time D-CAP2™ control, combining internal compensation with pseudo-fixed 650-kHz operation to enable stable regulation using low-ESR ceramic or polymer output capacitors without external loop compensation. Its valley-current sensing OCL circuit monitors low-side FET VDS during off-time for accurate current limiting.
It operates exclusively in continuous conduction mode (CCM), reducing light-load output ripple versus discontinuous modes. The device supports startup into pre-biased outputs and features non-latching UVLO (3.75 V threshold), OVP (125% × VFBTH), UVP (65% × VFBTH), and thermal shutdown at 155°C with 35°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 2 A continuous - sufficient for powering SoC cores, DDR memory termination, or FPGA I/O banks in space-constrained designs. |
| Input Voltage Range | 4.5 V to 17 V - compatible with 5 V, 12 V, and 15 V intermediate bus rails in digital TV, STB, and networking equipment. |
| Switching Frequency | 650 kHz - enables use of small 2.2 µH inductors and <68 µF ceramic output capacitance while maintaining EMI manageability. |
| Feedback Accuracy | ±1% at 25°C - ensures tight output regulation across load and line variations, critical for sensitive digital supply domains. |
| Shutdown Current | <10 µA - minimizes standby power loss in always-on subsystems such as remote control receivers or HDMI hot-plug detection circuits. |
| RDS(on) (HS/Low-Side) | 133 mΩ / 80 mΩ - reduces conduction losses at 2 A, supporting >90% peak efficiency at 12 VIN/1.05 VOUT. |
| Soft-Start Control | Adjustable via external capacitor on SS pin - prevents inrush current and enables controlled ramp-up into pre-biased outputs. |
Pinout & Package
TPS562219ADDFR uses an 8-pin SOT-23 (DDF) package measuring 1.6 mm × 2.9 mm, optimized for high-density PCB layouts and thermal performance with RθJA = 106.1°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 1) | Power and signal ground reference | Common return path for controller logic, low-side FET source, and feedback network - must be connected at single-point to minimize noise coupling into VFB. |
| SW (Pin 2) | Switch node | Connection between high- and low-side MOSFETs; carries high di/dt switching waveform - requires tight layout with minimal loop area to reduce EMI. |
| VIN (Pin 3) | Main input supply | Drain terminal of high-side FET; accepts 4.5–17 V; requires local 10 µF + 0.1 µF ceramic decoupling adjacent to pin. |
| PG (Pin 4) | Power good open-drain output | Asserts high after 1.7× soft-start time when VOUT reaches ±10% of target; sinks up to 1 mA - used for sequencing or system reset assertion. |
| SS (Pin 5) | Soft-start timing control | Charged by internal 6 µA current source; external capacitor sets ramp time - enables smooth startup and pre-biased output compatibility. |
| VFB (Pin 6) | Feedback input | Monitors output via resistor divider; 0.765 V reference enables precise output setting (e.g., 1.05 V with 3.74 kΩ/10 kΩ divider). |
| EN (Pin 7) | Enable control | Active-high logic input; threshold 1.6 V high / 0.6 V low; internal 225–900 kΩ pull-down enables simple microcontroller or sequencer control. |
| VBST (Pin 8) | Bootstrap supply | Provides gate drive voltage for high-side FET; requires 0.1 µF ceramic capacitor between VBST and SW - critical for proper high-side turn-on. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP2™ control mode | Enables stable operation with ultra-low-ESR ceramic capacitors and eliminates need for external compensation components - simplifies design and reduces BOM count. |
| Pre-biased soft-start | Allows safe startup into existing output voltage without reverse current flow - essential for hot-swap or multi-rail sequencing applications. |
| Power good (PG) output | Open-drain signal confirms regulation within ±10% tolerance after soft-start - provides reliable system-level power sequencing feedback. |
| Cycle-by-cycle overcurrent limit | Valley-current detection on low-side FET provides fast, accurate current limiting without sense resistors - improves reliability under short-circuit conditions. |
| Hiccup-mode UVP recovery | Enters timed restart cycle upon undervoltage fault instead of latching off - enables autonomous recovery after transient load or input dips. |
Applications
| Digital TV Power Supply | High Definition Blu-ray Disc™ Player |
|---|---|
Use Scenario: Supplies 1.05 V core voltage to main SoC and 3.3 V I/O rail to HDMI interface in slim-profile flat-panel TV chassis. IC Role / Device Role / Timing Role: Primary point-of-load regulator delivering 2 A at 1.05 V with fast transient response to handle video decode bursts. Use Value: D-CAP2™ control maintains <20 mVpp output ripple during 0.5–1.5 A load steps at 500 mA/µs slew rate - preserving signal integrity in high-speed video interfaces. | Use Scenario: Powers laser driver IC and audio DSP in portable Blu-ray players where board space and thermal dissipation are constrained. IC Role / Device Role / Timing Role: Compact 2-A buck converter operating from 12 V battery-derived input to generate 1.8 V DSP core supply. Use Value: 8-pin SOT-23 (DDF) footprint and 106.1°C/W thermal resistance enable full 2 A operation without heatsinking in sealed enclosures. |
| Networking Home Terminal | Digital Set Top Box (STB) |
Use Scenario: Regulates 1.2 V CPU core and 1.5 V memory interface rails in DOCSIS 3.1 cable modems with strict EMI requirements. IC Role / Device Role / Timing Role: High-efficiency, low-noise buck converter supporting burst-mode Ethernet traffic with minimal voltage droop. Use Value: 650-kHz switching frequency allows optimal filter component selection to meet FCC Class B conducted EMI limits without added shielding. | Use Scenario: Generates 3.3 V USB peripheral rail and 1.05 V tuner SoC supply in cost-sensitive STB designs with dual-board stacking. IC Role / Device Role / Timing Role: Dual-output capable via feedback divider tuning; supports multiple voltage domains from single compact regulator. Use Value: Adjustable soft-start and PG output enable clean power-up sequencing across baseband, RF, and HDMI subsystems - eliminating boot failures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS563219ADDFR | 3-A rated; lower RDS(on) (68 mΩ HS / 39 mΩ LS); identical pinout and control architecture | Supports higher current loads (e.g., multi-core processors) but draws more quiescent current in light-load CCM | Select when >2 A output current or lower conduction loss at full load is required; verify thermal margin with RθJA = 87.0°C/W. |
| MP2315GJ-Z | 2-A, 4.5–28 V input, 650-kHz, but uses current-mode control and lacks PG output or pre-biased soft-start | Suitable for industrial inputs up to 28 V but requires external compensation and offers no power-good signaling | Choose for wider input range where sequencing and fault reporting are not required; validate stability with ceramic output caps. |
Compared with TPS562219ADDFR, TPS563219ADDFR delivers higher current with identical layout and control features, while MP2315GJ-Z extends input voltage range at the cost of reduced integration and sequencing capability - making TPS562219ADDFR optimal for cost- and space-sensitive 2-A consumer applications requiring full feature set.
Availability
TPS562219ADDFR is available at Aetrix Electronics and suitable for digital TV power supplies, HD Blu-ray player subsystems, and networking home terminals requiring stable component supply, consistent parametric performance, and long-term production continuity.
Supply support for TPS562219ADDFR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability power conversion solutions.
The TPS56x219A product line was designed specifically for space-constrained, high-efficiency point-of-load regulation in consumer digital electronics - emphasizing ease of use, minimal external components, and robust protection features.
FAQ
What is the maximum input voltage rating for the TPS562219ADDFR?
The TPS562219ADDFR has an absolute maximum input voltage rating of 19 V on the VIN pin and 25 V on the VBST pin. Its recommended operating input voltage range is 4.5 V to 17 V. Exceeding 17 V continuously may trigger UVLO release but risks long-term reliability; operation above 19 V violates absolute maximum ratings and can cause permanent damage to the TPS562219ADDFR.
Does the TPS562219ADDFR support startup into a pre-biased output?
Yes, the TPS562219ADDFR supports pre-biased soft-start. When enabled, it monitors the VFB voltage and delays switching until the internal reference exceeds the present feedback level - preventing reverse current flow and ensuring monotonic ramp-up. This behavior is inherent to the TPS562219ADDFR's control architecture and requires no external circuitry.
What is the purpose of the VBST pin on the TPS562219ADDFR?
VBST (Pin 8) supplies the bootstrap voltage for the high-side MOSFET gate driver. A 0.1 µF ceramic capacitor must be placed between VBST and SW to generate the ~5.5 V gate drive above SW potential. Without proper VBST decoupling, the high-side FET fails to turn on fully, causing excessive heating and potential failure of the TPS562219ADDFR.
How does the power good (PG) signal behave during TPS562219ADDFR operation?
The PG pin is an open-drain output that goes high after 1.7× the soft-start time when VFB rises to ≥90% of the target voltage, and pulls low when VFB falls ≤85% of target. It sinks up to 1 mA and requires an external pull-up resistor. This precise windowed monitoring enables reliable power sequencing in systems using the TPS562219ADDFR.
Can the TPS562219ADDFR operate in discontinuous conduction mode (DCM)?
No, the TPS562219ADDFR operates exclusively in continuous conduction mode (CCM) across its entire load range. This design choice reduces light-load output voltage ripple compared to DCM and ensures predictable 650-kHz switching behavior - a key characteristic confirmed in the TPS562219ADDFR datasheet and functional description.
TPS562219ADDFR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- D-CAP2™
- Package/Case:
- SOT-23-8 Thin, TSOT-23-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 17V
- Voltage - Output (Min/Fixed):
- 0.76V
- Voltage - Output (Max):
- 7V
- Current - Output:
- 2A
- Frequency - Switching:
- 650kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TSOT-23-8
TPS562219ADDFR FAQ
1.How can I place an order for TPS562219ADDFR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS562219ADDFR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS562219ADDFR reliable?
The price and inventory of TPS562219ADDFR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS562219ADDFR is usually 5 days.
3.What payment methods are accepted for TPS562219ADDFR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS562219ADDFR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS562219ADDFR?
TPS562219ADDFR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS562219ADDFR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS562219ADDFR?
For technical support, including TPS562219ADDFR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS562219ADDFR requirements.
6.How does Aetrix verify that TPS562219ADDFR is sourced from the original manufacturer or authorized distributors?
All TPS562219ADDFR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS562219ADDFR meets industry standards.
7.What is the process for return or replacement of TPS562219ADDFR?
All TPS562219ADDFR units undergo pre-shipment inspection (PSI). If there is an issue with TPS562219ADDFR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS562219ADDFR part is unused and in its original packaging.
Return procedure for TPS562219ADDFR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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