Texas Instruments TPS563219ADDFT
- Part No.:
- TPS563219ADDFT
- Manufacturer:
- Texas Instruments
- Package:
- SOT-23-8 Thin, TSOT-23-8
- Datasheet:
-
TPS563219ADDFT.pdf
- Description:
- IC REG BUCK ADJ 3A TSOT23-8
- Quantity:
- Payment:

- Shipping:

Inventory:990
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Product details
Overview
TPS563219ADDFT from Texas Instruments is a 3-A synchronous step-down DC-DC converter in an 8-pin SOT-23 (DDF) package, featuring D-CAP2™ mode control, 650-kHz fixed switching frequency, 4.5 V to 17 V input range, and 0.76 V to 7 V adjustable output voltage. It integrates 68-mΩ high-side and 39-mΩ low-side MOSFETs, supports pre-biased startup, and delivers power-good signaling for FPGA core rail regulation in compact consumer electronics.
For engineers reviewing the TPS563219ADDFT datasheet, TPS563219ADDFT pinout, TPS563219ADDFT application, or TPS563219ADDFT equivalent, key selection criteria include verified 3-A continuous output capability, confirmed 8-pin SOT-23 (DDF) package dimensions (1.6 × 2.9 mm), D-CAP2™ transient response performance with ceramic output capacitors, and functional compatibility with TPS563219A reference designs.
Technical Context
The TPS563219ADDFT employs adaptive on-time D-CAP2™ control architecture that eliminates external compensation while maintaining stability with ultra-low-ESR ceramic output capacitors. Its internal one-shot timer sets on-time proportional to VIN and inversely proportional to VOUT, enabling pseudo-fixed 650-kHz operation across input and load variations.
It operates exclusively in continuous conduction mode (CCM), reducing light-load output ripple versus discontinuous mode. Protection includes cycle-by-cycle overcurrent limiting via valley-current sensing, hiccup-mode under-voltage protection, non-latch OVP/UVLO, and thermal shutdown at 155°C with 35°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output current | 3 A continuous - supports full-rated load without derating in 8-pin SOT-23 with proper PCB thermal layout |
| Input voltage range | 4.5 V to 17 V - compatible with 5 V, 12 V, and 15 V intermediate bus systems |
| Output voltage range | 0.76 V to 7 V - set by external resistor divider; 1% VFB accuracy enables precise core voltage regulation |
| Switching frequency | 650 kHz - fixed nominal frequency simplifies EMI filter design and enables compact magnetics |
| High-side RDS(on) | 68 mΩ at 25°C - reduces conduction loss at 3-A load; enables >90% efficiency at 1.05 V/3 A, 12 VIN |
| Low-side RDS(on) | 39 mΩ at 25°C - minimizes synchronous rectification loss and improves light-load efficiency |
| Shutdown current | <10 µA - enables ultra-low-power system standby modes without external enable sequencing |
| Soft-start time | Adjustable via external capacitor on SS pin - prevents inrush current during power-up of sensitive loads |
Pinout & Package
TPS563219ADDFT is housed in an 8-pin SOT-23 package (DDF variant), measuring 1.60 mm × 2.90 mm with standard SOT lead pitch and thermal pad exposed on bottom per TI packaging specification.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND | Power and signal ground reference | Common return for low-side FET source, controller logic, and feedback network; single-point grounding critical for VFB accuracy |
| SW | Power switch node | Connection between high- and low-side FETs; requires low-inductance routing to minimize switching noise and EMI |
| VIN | Main input supply | Drain of high-side FET; must be decoupled with ≥10 µF ceramic + 0.1 µF high-frequency cap near pin |
| PG | Open-drain power-good indicator | Asserts after 1.7× soft-start time when VOUT is within ±10% of target; used for downstream power sequencing |
| SS | Soft-start timing control | Current-sink pin (6 µA typ); external capacitor to GND sets ramp time and controls inrush current |
| VFB | Feedback input | Monitors output via resistor divider; 0.765 V reference enables precise output voltage setting with 1% tolerance resistors |
| EN | Enable control | Active-high logic input (1.6 V threshold); internal 450 kΩ pull-down allows direct MCU GPIO control without external bias |
| VBST | Bootstrap supply for high-side gate drive | Requires 0.1 µF ceramic capacitor to SW; enables efficient high-side FET turn-on without external charge pump |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP2™ control mode | Enables stable operation with ceramic or polymer output capacitors-no external compensation required, reducing BOM count and layout complexity |
| Pre-biased output startup | Allows safe ramp-up into existing output voltage (e.g., hot-swap or multi-rail sequencing), preventing reverse current flow into powered loads |
| Integrated 68-mΩ / 39-mΩ FETs | Eliminates need for external power switches; achieves 3-A output in minimal 8-pin SOT-23 footprint with verified thermal performance |
| Power-good (PG) open-drain output | Provides system-level power sequencing confirmation with ±10% window and 1.7× soft-start delay-replaces discrete supervisor ICs |
| Cycle-by-cycle overcurrent protection | Valley-current sensing on low-side FET ensures accurate current limiting; hiccup mode prevents thermal runaway during sustained overload |
| 650-kHz switching frequency | Enables use of small 1.5–4.7 µH inductors and 20–68 µF ceramic output caps-ideal for space-constrained consumer and networking applications |
Applications
| Digital TV Power Supply | High Definition Blu-ray Disc™ Player |
|---|---|
Use Scenario: Powers SoC core voltage (1.05 V @ 3 A) and memory I/O rails in slim-profile digital television mainboards. IC Role / Device Role / Timing Role: Primary buck regulator delivering tightly regulated, low-noise DC from 12 V intermediate bus. Use Value: D-CAP2™ fast transient response maintains <20 mVpp output ripple during dynamic video decode bursts without added bulk capacitance. | Use Scenario: Supplies 1.2 V @ 2.5 A to BD-ROM controller ASIC and 3.3 V @ 1.5 A to servo motor driver in portable Blu-ray players. IC Role / Device Role / Timing Role: Dual-output capable via secondary regulator; TPS563219ADDFT handles highest-current rail with minimal footprint. Use Value: 8-pin SOT-23 package enables placement adjacent to SoC; 650-kHz switching avoids audible noise in battery-powered playback mode. |
| Networking Home Terminal | Digital Set Top Box (STB) |
Use Scenario: Regulates 1.8 V @ 3 A for Wi-Fi 6 baseband processor and 5 V @ 1 A for USB 3.0 PHY in residential gateway devices. IC Role / Device Role / Timing Role: Main processor rail converter with PG signal coordinating firmware boot sequence and peripheral initialization. Use Value: Verified 3-A capability with integrated FETs eliminates thermal bottlenecks in sealed plastic enclosures; <10 µA shutdown current extends standby battery life. | Use Scenario: Delivers 1.05 V @ 3 A to broadcast demodulator SoC and 3.3 V @ 2 A to HDMI transmitter in cable/satellite STBs. IC Role / Device Role / Timing Role: Core voltage regulator synchronized to system enable signal; PG output triggers FPGA configuration. Use Value: Pre-biased startup prevents backfeed into partially powered subsystems during warm reboot; hiccup-mode OCP avoids latch-up during cable insertion transients. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS563219A | Same silicon die and electrical specs; ADDFT denotes DDF (SOT-23-8) tape-and-reel packaging variant | No functional difference; identical pinout, thermal profile, and performance curves | Select TPS563219A for non-tape-and-reel procurement (e.g., sample quantities or cut-tape); TPS563219ADDFT is production-optimized for automated assembly |
| MP2333HG-33 | 3-A rated, but uses constant-on-time control (not D-CAP2™); 2.5-V to 6-V input only; different pinout and no PG output | Limited to low-input applications; lacks power-good signaling and pre-bias startup support | Use only if input is strictly ≤6 V and PG sequencing is unnecessary; requires PCB redesign due to incompatible pin mapping |
Compared with TPS563219A, the TPS563219ADDFT offers identical functionality in optimized packaging for volume SMT lines, whereas MP2333HG-33 trades D-CAP2™ flexibility and system integration for lower cost in narrow-input applications-making TPS563219ADDFT the preferred choice for 4.5–17 V, 3-A, PG-enabled designs.
Availability
TPS563219ADDFT is available at Aetrix Electronics and suitable for digital TV power supplies, HD Blu-ray player SoC rails, and networking home terminal core voltage regulation requiring stable component supply, consistent parametric performance, and long-term industrial availability.
Supply support for TPS563219ADDFT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 90 years of innovation in high-reliability power conversion solutions.
The TPS56x219A product line delivers highly integrated, easy-to-use synchronous buck regulators targeting space-constrained consumer, computing, and networking applications where minimal external components and fast transient response are critical.
FAQ
What is the maximum continuous output current of the TPS563219ADDFT?
The TPS563219ADDFT is rated for 3 A continuous output current under recommended operating conditions (TA = –40°C to 85°C, proper PCB thermal design). This is validated by TI's electrical characteristics table, where DC current limit is specified as 3.5–4.2–5.3 A across temperature, with 3 A representing the guaranteed minimum continuous output in typical applications.
Does the TPS563219ADDFT support startup into a pre-biased output voltage?
Yes, the TPS563219ADDFT supports pre-biased soft start. When the output capacitor is already charged at startup, the device delays switching until its internal reference voltage exceeds the feedback voltage (VFB), preventing reverse current flow and ensuring controlled ramp-up-confirmed in Section 7.3.2 of the SLVSDT2 datasheet.
What package type and dimensions does the TPS563219ADDFT use?
The TPS563219ADDFT uses an 8-pin SOT-23 package designated DDF, with nominal body dimensions of 1.60 mm × 2.90 mm. This matches TI's standardized SOT-23-8 footprint and includes an exposed thermal pad on the bottom per the mechanical drawing in the datasheet's Section 12.
How does the D-CAP2™ control mode benefit designs using the TPS563219ADDFT?
D-CAP2™ control in the TPS563219ADDFT enables stable operation with ultra-low-ESR ceramic output capacitors without external compensation components. It provides fast transient response-demonstrated in Figure 25 of SLVSDT2-with <200 µs recovery from 0.5 A to 1.5 A load steps-reducing required output capacitance and improving dynamic regulation in SoC and FPGA applications.
Is the TPS563219ADDFT pin-compatible with the TPS562219A series?
No, the TPS563219ADDFT is not pin-compatible with the TPS562219A series. Although both share the same 8-pin SOT-23 (DDF) package and pinout, the TPS562219A is rated for 2 A with higher RDS(on) FETs (133 mΩ / 80 mΩ), making it unsuitable as a drop-in replacement for 3-A loads. Electrical validation confirms distinct current-limit thresholds and thermal profiles.
TPS563219ADDFT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- D-CAP2™
- Package/Case:
- SOT-23-8 Thin, TSOT-23-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 17V
- Voltage - Output (Min/Fixed):
- 0.76V
- Voltage - Output (Max):
- 7V
- Current - Output:
- 3A
- Frequency - Switching:
- 650kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TSOT-23-8
TPS563219ADDFT FAQ
1.How can I place an order for TPS563219ADDFT through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS563219ADDFT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS563219ADDFT reliable?
The price and inventory of TPS563219ADDFT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS563219ADDFT is usually 5 days.
3.What payment methods are accepted for TPS563219ADDFT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS563219ADDFT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS563219ADDFT?
TPS563219ADDFT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS563219ADDFT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS563219ADDFT?
For technical support, including TPS563219ADDFT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS563219ADDFT requirements.
6.How does Aetrix verify that TPS563219ADDFT is sourced from the original manufacturer or authorized distributors?
All TPS563219ADDFT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS563219ADDFT meets industry standards.
7.What is the process for return or replacement of TPS563219ADDFT?
All TPS563219ADDFT units undergo pre-shipment inspection (PSI). If there is an issue with TPS563219ADDFT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS563219ADDFT part is unused and in its original packaging.
Return procedure for TPS563219ADDFT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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