Texas Instruments TPS563249DDCT
- Part No.:
- TPS563249DDCT
- Manufacturer:
- Texas Instruments
- Package:
- SOT-23-6 Thin, TSOT-23-6
- Datasheet:
-
TPS563249DDCT.pdf
- Description:
- IC REG BUCK ADJ 3A SOT23
- Quantity:
- Payment:

- Shipping:

Inventory:909
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS563249DDCT from Texas Instruments is a 3-A synchronous step-down DC-DC converter in a 6-pin SOT-23-THIN (DDC) package, featuring D-CAP3™ mode control, 1.4-MHz fixed switching frequency, 4.5–17-V input range, and 0.6–7-V adjustable output voltage. It integrates 70-mΩ high-side and 30-mΩ low-side MOSFETs and delivers up to 90% peak efficiency at 12-V input and 3-A load for point-of-load power in compact networking equipment.
For engineers reviewing the TPS563249DDCT datasheet, TPS563249DDCT pinout, TPS563249DDCT application, or TPS563249DDCT equivalent, key selection criteria include its forced continuous conduction mode (FCCM) operation, 1% VFB accuracy at 25°C, startup from pre-biased output, hiccup-mode overcurrent protection, and thermal shutdown with 160°C threshold - all critical for reliable 3.3-V/3-A rail generation in space-constrained embedded systems.
Technical Context
The TPS563249DDCT employs adaptive on-time D-CAP3™ control with internal ripple injection, enabling stable regulation using ultra-low-ESR ceramic or polymer output capacitors without external compensation. Its one-shot timer sets on-time proportional to VIN and inversely proportional to VOUT, maintaining pseudo-fixed 1.4-MHz frequency across input and load variations.
It operates exclusively in Forced Continuous Conduction Mode (FCCM), sustaining fixed frequency down to zero load while supporting negative inductor current during light-load conditions. Protection includes cycle-by-cycle valley-detect overcurrent (with 3.1–4.7 A low-side source limit), non-latching UVP (65% VOUT threshold), and thermal shutdown with 25°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 3 A continuous - supports full-rated load without derating in typical PCB layouts with adequate thermal relief. |
| Input Voltage Range | 4.5 V to 17 V - compatible with 5-V, 12-V, and 15-V intermediate bus architectures. |
| Switching Frequency | 1.4 MHz (±150 kHz) - enables use of sub-2-mm-height inductors and reduces EMI filter size. |
| Feedback Voltage Accuracy | ±1% at 25°C (594–606 mV) - ensures tight output regulation across temperature and line/load conditions. |
| Shutdown Current | <10 µA - minimizes system standby power in always-on applications like surveillance cameras. |
| Thermal Shutdown Threshold | 160°C with 25°C hysteresis - provides robust thermal protection while allowing recovery without manual reset. |
| Soft-Start Time | 1.7 ms fixed - prevents inrush current and ensures monotonic VOUT ramp during power-up. |
Pinout & Package
SOT-23-THIN (DDC) package, 1.6 mm × 2.9 mm body size, 0.95 mm max height, thermally enhanced pad on underside for improved heat dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 1) | Power and signal ground reference | Common return path for low-side FET source and controller ground; feedback resistor divider must connect to this pin at single-point star ground. |
| SW (Pin 2) | Switch node | Connection between high- and low-side FETs; requires low-inductance routing to minimize ringing and EMI. |
| VIN (Pin 3) | Input supply | Drain of high-side FET and primary input power connection; must be decoupled with ≥10-µF ceramic capacitor placed adjacent to pin. |
| VFB (Pin 4) | Feedback input | Monitors output voltage via resistor divider; 600-mV reference enables precise VOUT setting (e.g., 3.3 V with 45.3k/10k divider). |
| EN (Pin 5) | Enable control | Active-high logic input (1.27–1.34 V threshold); tie to VIN for always-on operation or drive with MCU GPIO for sequencing. |
| VBST (Pin 6) | Bootstrap supply | Provides gate drive voltage for high-side FET; requires 0.1-µF ceramic capacitor connected directly between VBST and SW pins. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP3™ control architecture | Enables stable operation with ceramic output capacitors only - eliminates need for external compensation network and simplifies layout. |
| Integrated 70-mΩ / 30-mΩ FETs | Reduces external component count and conduction losses; supports 3-A output with minimal thermal overhead in SOT-23 package. |
| Forced CCM at light load | Maintains constant 1.4-MHz switching frequency under all load conditions - avoids audible noise and simplifies EMI filtering. |
| Pre-biased output startup | Allows safe power-up into existing VOUT bias (e.g., hot-swap or multi-rail sequencing) without reverse current or output collapse. |
| Hiccup-mode overcurrent protection | Shuts down for 25 ms after OCL detection then auto-restarts - protects against sustained overload while preserving downstream circuitry. |
Applications
| Wireless Router Power Rail | Surveillance Camera Core Supply |
|---|---|
Use Scenario: Generating 3.3-V/3-A core voltage for Wi-Fi 6 baseband ICs and RF front-end modules in compact residential routers. IC Role / Device Role / Timing Role: Primary buck regulator delivering regulated PoL voltage with fast transient response to handle bursty packet processing loads. Use Value: D-CAP3™ control achieves <5% output deviation during 0→3-A load steps, reducing required output capacitance by ~30% versus voltage-mode controllers. |
Use Scenario: Providing stable 1.2-V/2-A supply to image signal processors (ISP) in IP security cameras operating in wide-temperature industrial environments. IC Role / Device Role / Timing Role: Compact, thermally robust DC-DC converter enabling fanless enclosure design with –40°C to 125°C junction rating. Use Value: FCCM operation eliminates frequency shift at standby, ensuring consistent EMI profile during motion-triggered wake/sleep cycles. |
| Set-Top Box SoC Core | Broadband Modem PHY Supply |
Use Scenario: Delivering 0.9-V/3-A core voltage to ARM-based SoCs in cable and satellite set-top boxes with strict standby power budgets. IC Role / Device Role / Timing Role: High-efficiency step-down regulator supporting dynamic voltage scaling (DVS) and deep-sleep modes. Use Value: <10-µA shutdown current and 1.7-ms soft-start meet ENERGY STAR® and CEERP Tier-2 standby requirements. |
Use Scenario: Powering 5-V/2-A analog front-end (AFE) and DSL/DOCSIS PHY circuits in broadband modems subject to input ripple from upstream AC/DC converters. IC Role / Device Role / Timing Role: Input-ripple tolerant buck converter with integrated high- and low-side FETs minimizing board area. Use Value: 17-V absolute maximum VIN rating accommodates 15-V nominal bus with 2-V transients, eliminating need for upstream TVS clamping. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS563201DDCR | Same 3-A rating and D-CAP3™ control, but 4.5–17-V input and 0.6–7-V output; differs in pinout (EN on Pin 3, VFB on Pin 4) and lacks pre-bias startup. | Not suitable for hot-swap or multi-rail sequencing where output pre-bias is present; requires PCB redesign due to swapped EN/VFB pins. | Select TPS563201DDCR only when pre-bias startup is unnecessary and layout allows pin reassignment. |
| MP2332HGTL-Z | 3-A, 4.5–17-V input, but uses constant-on-time (COT) control; 1.2% VFB accuracy vs. 1%; no hiccup-mode OCP - latches off on overcurrent. | Requires external UVLO hysteresis and latch-reset circuitry for safety-critical applications; lower VFB accuracy impacts tight-tolerance rails. | Choose MP2332HGTL-Z only if latch-off behavior is acceptable and system-level fault handling is implemented externally. |
Compared with TPS563249DDCT, TPS563201DDCR offers identical performance but incompatible pin mapping and missing pre-bias support, while MP2332HGTL-Z trades hiccup protection and startup flexibility for marginally tighter VFB tolerance - making TPS563249DDCT optimal for compact, robust, and sequenced PoL designs.
Availability
TPS563249DDCT is available at Aetrix Electronics and suitable for wireless routers, surveillance cameras, set-top boxes, and broadband modems requiring stable component supply with guaranteed long-term sourcing.
Supply support for TPS563249DDCT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-efficiency DC-DC conversion.
The TPS563249DDCT belongs to TI's D-CAP3™ family of easy-to-use synchronous buck regulators, designed specifically for space-constrained, high-transient applications in networking, consumer, and industrial equipment where minimal external components and fast load-step response are essential.
FAQ
What is the recommended input capacitor configuration for TPS563249DDCT?
The TPS563249DDCT requires a minimum 10-µF ceramic input capacitor placed adjacent to the VIN and GND pins, plus an optional 0.1-µF high-frequency ceramic capacitor (C3) from VIN to GND. This dual-capacitor arrangement suppresses both bulk and high-frequency input ripple, preventing instability and ensuring reliable operation across the full 4.5–17-V input range. The TPS563249DDCT datasheet specifies these values based on measured ESR and ESL performance under worst-case transient conditions.
Does TPS563249DDCT support output voltage sequencing with other power rails?
Yes, TPS563249DDCT supports controlled sequencing via its active-high EN pin, which has a precise 1.27–1.34-V rising threshold and 1.08–1.15-V falling threshold. When driven by a dedicated supervisor IC or microcontroller GPIO, the TPS563249DDCT can be enabled after upstream rails stabilize. Its ability to start from a pre-biased output further enables flexible power-up sequences in multi-rail systems without risk of reverse current.
What is the maximum achievable efficiency of TPS563249DDCT and at what conditions?
The TPS563249DDCT achieves up to 90% peak efficiency at 12-V input, 3.3-V output, and 3-A load, as verified in TI's SLVSE54A datasheet Figure 15. Efficiency remains above 85% across 1–3-A loads at 12-V input and drops to ~80% at 0.5-A due to fixed switching losses dominating at light load - a direct consequence of its Forced Continuous Conduction Mode (FCCM) architecture.
Can TPS563249DDCT operate with ceramic output capacitors only?
Yes, TPS563249DDCT is explicitly designed for ceramic-only output capacitors thanks to its D-CAP3™ control architecture with internal ripple injection. The datasheet confirms stable operation with 10–44 µF total ceramic capacitance (e.g., Murata GRM31CR61A226KE19), eliminating the need for electrolytic or polymer capacitors and their associated ESR dependency or aging effects.
What thermal derating guidance applies to TPS563249DDCT in a standard 2-layer PCB?
On a standard 2-layer PCB with 1-oz copper and no thermal vias, the TPS563249DDCT's junction-to-board thermal resistance (RθJB = 31.2°C/W) limits continuous 3-A operation above ~60°C ambient. TI recommends adding ≥4 thermal vias under the exposed pad and expanding GND copper area to reduce RθJB below 20°C/W - enabling full 3-A output up to 85°C ambient, as validated in the device's thermal characterization data.
TPS563249DDCT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- D-CAP3™
- Package/Case:
- SOT-23-6 Thin, TSOT-23-6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 17V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 7V
- Current - Output:
- 3A
- Frequency - Switching:
- 1.4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-THIN
TPS563249DDCT FAQ
1.How can I place an order for TPS563249DDCT through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS563249DDCT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS563249DDCT reliable?
The price and inventory of TPS563249DDCT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS563249DDCT is usually 5 days.
3.What payment methods are accepted for TPS563249DDCT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS563249DDCT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS563249DDCT?
TPS563249DDCT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS563249DDCT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS563249DDCT?
For technical support, including TPS563249DDCT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS563249DDCT requirements.
6.How does Aetrix verify that TPS563249DDCT is sourced from the original manufacturer or authorized distributors?
All TPS563249DDCT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS563249DDCT meets industry standards.
7.What is the process for return or replacement of TPS563249DDCT?
All TPS563249DDCT units undergo pre-shipment inspection (PSI). If there is an issue with TPS563249DDCT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS563249DDCT part is unused and in its original packaging.
Return procedure for TPS563249DDCT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS563249DDCT Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
