Texas Instruments TPS56720PWPR
- Part No.:
- TPS56720PWPR
- Manufacturer:
- Texas Instruments
- Package:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS56720PWPR.pdf
- Description:
- IC REG BUCK ADJ 7A 20HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS56720 from Texas Instruments is a 7A synchronous step-down DC-DC converter with D-CAP2™ control, 4.5V–17V input range, 0.6V–1.87V programmable output voltage via I²C or resistor divider, and 500kHz switching frequency. It powers SoC core rails in media processors and high-density power distribution systems.
For engineers reviewing the TPS56720 datasheet, TPS56720 pinout, TPS56720 application, or TPS56720 equivalent, key selection criteria include its 7A continuous output current, I²C-based voltage scaling (VID), adaptive on-time D-CAP2™ transient response, thermal shutdown at 160°C, and HTSSOP-20 PowerPAD™ package compatibility with 1.0µH–2.2µH inductors.
Technical Context
The TPS56720 implements D-CAP2™ adaptive on-time control-combining constant on-time operation with internal ripple-based feedback-to achieve fast load-transient response without external compensation. Its dual N-channel MOSFETs feature 30mΩ/24mΩ high-side/low-side RDS(on) at 12V input, enabling high efficiency across 0–7A load range.
It supports dual regulation modes: external (via VFB resistor divider) and internal (I²C VID programming). The I²C interface enables dynamic voltage scaling, Eco-mode™ enable/disable, hiccup-mode protection control, and real-time PGOOD monitoring-all configurable over standard 400kHz SCL clock with Schmitt-triggered SDA/SCL inputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5V to 17V - supports wide industrial and consumer supply rails including 5V, 12V, and 15V bus systems. |
| Output Current | 7A continuous - sufficient for mid-tier SoC core supplies (e.g., ARM Cortex-A7x, video DSPs) without derating at 125°C junction. |
| Output Voltage Range | 0.6V to 1.87V in 10mV steps - matches modern processor VCORE requirements with ±1% accuracy over line/load/temperature. |
| Switching Frequency | 500kHz typical - balances EMI performance, inductor size (optimized for 1.0µH–2.2µH), and light-load efficiency in Eco-mode™. |
| RDS(on) (HS/LS) | 30mΩ / 24mΩ - low conduction loss enables >92% peak efficiency at 5A/1.1V out with 12V input and ceramic output capacitors. |
| I²C Interface | Standard-mode (400kHz), 7-bit address with A0/A1 pins - allows up to 4 devices on same bus for multi-rail voltage scaling in compact layouts. |
| Thermal Protection | 160°C shutdown with 23°C hysteresis - prevents permanent damage during sustained overload or poor airflow conditions. |
Pinout & Package
TPS56720 is housed in a 20-pin HTSSOP (PWP) package with exposed thermal PowerPAD™ (6.50 mm × 4.40 mm body), requiring soldered thermal pad connection to PCB ground plane for thermal management.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN | Enable input | Active-high logic control; ≥1.85V enables converter, ≤0.6V disables with 200µA shutdown current. |
| SDA, SCL, A0, A1 | I²C interface and address pins | Support VID programming, status readback, and configuration; A0/A1 set 7-bit slave address (01101xx). |
| VIN | 5.5V LDO input | Powers internal 5.5V regulator (VREG5); must be ≥4.5V and bypassed with ≥2.0µF ceramic capacitor. |
| PVIN (7,8) | Main power input | Connects to high-side MOSFET drains; accepts full 4.5V–17V input; requires local 10µF+ ceramic decoupling. |
| PGND (9,10) | Power ground return | Low-side MOSFET source return and current-sense reference; must be routed separately from signal GND. |
| SW (11–13) | Switch node | Drain-source connection point of integrated FETs; connects to external inductor and bootstrap capacitor (VBST–SW). |
| VBST | Bootstrap supply | Charges high-side gate driver; requires 0.1µF ceramic capacitor between VBST and SW per TI layout guidelines. |
| PGOOD | Open-drain power-good flag | Asserts low when VOUT deviates >±15% from target; used for system sequencing and fault reporting. |
| VREG5 | 5.5V linear regulator output | Supplies internal circuitry and optional external bias; requires ≥2.0µF ceramic bypass to GND; not for external loading. |
| GND | Signal ground | Reference for SS, VFB, and analog circuits; must tie to PGND at single-point star ground near IC. |
| SS | Soft-start timing | Capacitor-to-GND sets monotonic startup time; internal 6µA charge current enables precise ramp control. |
| VOUT | Output voltage sense | Direct connection to power rail; used only in internal VID mode (VFB tied to output in external mode). |
| VFB | Feedback input | Resistor-divider input for external regulation; 0.6V reference enables accurate output setting independent of VID. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP2™ Adaptive On-Time Control | Eliminates external compensation components while maintaining stability with ultra-low-ESR ceramic output capacitors and enabling <10µs load-step response. |
| I²C-Based Voltage Scaling (VID) | 7-bit DAC programmability (0.6V–1.87V @ 10mV steps) allows dynamic core voltage adjustment for DVFS in media processors and SoCs. |
| Eco-mode™ Light-Load Efficiency | Automatic pulse-skipping below ~1A load maintains >85% efficiency at 10mA, reducing quiescent current to 920µA typical. |
| Monotonic Pre-Biased Soft-Start | SS pin capacitor ensures controlled output ramp even when powered into pre-biased rail-critical for hot-swap and multi-rail sequencing. |
| Integrated Dual-N FETs (30mΩ/24mΩ) | Reduces BOM count and layout area vs discrete solutions; optimized RDS(on) ratio minimizes conduction loss across 0–7A range. |
| Hiccup-Mode Overcurrent Protection | Configurable via I²C to limit fault duration and prevent thermal runaway during short-circuit or overload events. |
Applications
| Media Processor Core Supply | SoC Power Management Unit |
|---|---|
|
Use Scenario: Powers ARM-based media SoCs (e.g., TI AM57x, NXP i.MX8M) in digital TVs and STBs requiring dynamic voltage scaling during video decode/encode. IC Role / Device Role / Timing Role: Primary VCORE regulator with I²C-controlled VID updates synchronized to CPU frequency transitions. Use Value: Enables >20% active power reduction via real-time voltage/frequency scaling without external PMIC or sequencer. |
Use Scenario: Delivers stable 0.85V/1.1V dual-core rails in automotive infotainment head units with strict thermal and EMI constraints. IC Role / Device Role / Timing Role: High-efficiency buck converter with monotonic soft-start and PGOOD signaling for safe multi-rail power-up sequencing. Use Value: Eliminates need for discrete gate drivers and external current-sense amplifiers-reducing solution size by 35% vs controller+FET approach. |
| High-Density Server DDR Memory Rail | Industrial FPGA Core Supply |
|
Use Scenario: Supplies 1.2V DDR4 memory subsystems in compact edge servers where board space and thermal density are critical. IC Role / Device Role / Timing Role: Compact, thermally robust 7A regulator with PowerPAD™ thermal path and 500kHz fixed-frequency operation. Use Value: Achieves 93% peak efficiency at 6A with 1.5µH inductor, reducing heat generation by 40% vs legacy 300kHz solutions. |
Use Scenario: Powers Xilinx Artix-7 or Intel Cyclone V FPGA cores in programmable logic controllers requiring reliable cold-start and brownout immunity. IC Role / Device Role / Timing Role: Synchronous buck with UVLO (3.45V–4.2V), thermal shutdown (160°C), and hiccup-mode OCP for harsh environments. Use Value: Ensures deterministic reset behavior during voltage sags and eliminates latch-up risk under sustained overload conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS56520PWPR | 5A rated output, 44mΩ/32mΩ RDS(on), identical pinout and I²C interface. | Lower current capability suits lower-power SoCs (e.g., Cortex-A53) or auxiliary rails. | Select when design load stays ≤5A and thermal margin is constrained-reduces cost without sacrificing VID or D-CAP2™ features. |
| TPS56920PWPR | 9A rated output, 26mΩ/19mΩ RDS(on), same 20-pin HTSSOP package and register map. | Higher current headroom for future-proofing or higher ambient temperature operation. | Choose for designs targeting ≥8A peak loads or requiring extended lifetime at 125°C junction-same layout, no redesign needed. |
Compared with TPS56520PWPR, the TPS56720PWPR delivers 40% higher output current with 32% lower conduction loss, while retaining identical footprint and firmware compatibility; versus TPS56920PWPR, it trades 2A headroom for lower gate charge and reduced EMI sensitivity in noise-sensitive video processing stages.
Availability
TPS56720PWPR is available at Aetrix Electronics and suitable for media processors, SoC power management units, and high-density server memory rails requiring stable component supply, long-term lifecycle support, and consistent electrical performance across production batches.
Supply support for TPS56720PWPR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC-DC conversion and system-level power architecture.
The TPS56720 belongs to TI's TPS56x20 family of D-CAP2™ synchronous buck converters-designed specifically for dynamic voltage scaling in media processors, SoCs, and high-density power distribution systems where fast transient response and minimal external components are critical.
FAQ
What is the maximum continuous output current of the TPS56720PWPR?
The TPS56720PWPR delivers 7A continuous output current under recommended operating conditions (TJ ≤ 125°C, proper PCB thermal design). This rating is validated across the full 4.5V–17V input range and 0.6V–1.87V output range, with derating required above 125°C junction temperature per thermal metrics θJA = 36.8°C/W.
Does the TPS56720PWPR support both I²C-based and resistor-divider-based output voltage configuration?
Yes, the TPS56720PWPR supports dual regulation modes: internal VID control via I²C (0.6V–1.87V in 10mV steps) and external regulation using a resistor divider on the VFB pin. In VID mode, VFB connects directly to VOUT; in external mode, VOUT is tied to the output rail and SDA/SCL are grounded per TI SLVSCB6E Section 8.1.
What package type and thermal requirements apply to the TPS56720PWPR?
The TPS56720PWPR uses a 20-pin HTSSOP (PWP) package with exposed PowerPAD™ thermal pad (6.50 mm × 4.40 mm). The pad must be soldered to a dedicated PCB copper pour connected to GND for effective heat dissipation; TI specifies θJA = 36.8°C/W and θJCbot = 1.4°C/W when properly implemented.
How does the D-CAP2™ control architecture improve transient response in the TPS56720PWPR?
The TPS56720PWPR's D-CAP2™ control uses adaptive on-time modulation with internal ripple injection-enabling sub-10µs load-step response without external compensation. Unlike traditional voltage-mode controllers, it senses output ripple directly at the switch node, eliminating phase-margin concerns and supporting ceramic capacitors down to 10µF for tight regulation.
Can the TPS56720PWPR be used in applications requiring power-good sequencing with other rails?
Yes, the TPS56720PWPR provides an open-drain PGOOD output that asserts low when VOUT falls outside ±15% of target. This signal can drive enable inputs of downstream regulators or microcontroller GPIOs for precise power sequencing-verified in TI's typical application circuit (SLVSCB6E Figure 2) with monotonic soft-start and pre-biased start-up support.
TPS56720PWPR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SWIFT™, D-CAP2™, Eco-Mode™
- Package/Case:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable (Programmable)
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 17V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 1.87V
- Current - Output:
- 7A
- Frequency - Switching:
- 500kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-HTSSOP
TPS56720PWPR FAQ
1.How can I place an order for TPS56720PWPR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS56720PWPR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS56720PWPR reliable?
The price and inventory of TPS56720PWPR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS56720PWPR is usually 5 days.
3.What payment methods are accepted for TPS56720PWPR?
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TPS56720PWPR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS56720PWPR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS56720PWPR?
For technical support, including TPS56720PWPR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS56720PWPR requirements.
6.How does Aetrix verify that TPS56720PWPR is sourced from the original manufacturer or authorized distributors?
All TPS56720PWPR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS56720PWPR meets industry standards.
7.What is the process for return or replacement of TPS56720PWPR?
All TPS56720PWPR units undergo pre-shipment inspection (PSI). If there is an issue with TPS56720PWPR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS56720PWPR part is unused and in its original packaging.
Return procedure for TPS56720PWPR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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