Texas Instruments TPS56921PWPR
- Part No.:
- TPS56921PWPR
- Manufacturer:
- Texas Instruments
- Package:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS56921PWPR.pdf
- Description:
- IC REG BUCK ADJ 9A 20HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,539
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Product details
Overview
TPS56921PWPR from Texas Instruments is a 17 V, 9 A synchronous step-down DC/DC converter with integrated 26 mΩ/19 mΩ MOSFETs, I²C-compatible VID control (0.72–1.48 V in 10 mV steps), and peak current-mode control operating from 200 kHz to 1.6 MHz. It supports monotonic startup into pre-biased outputs and delivers ±1.5% output voltage accuracy over temperature for SoC core power applications.
For engineers reviewing the TPS56921PWPR datasheet, TPS56921PWPR pinout, TPS56921PWPR application, or TPS56921PWPR equivalent, key selection considerations include its dual regulation modes (external resistor divider or I²C VID), hiccup-mode overcurrent protection, thermal shutdown with 10°C hysteresis, and HTSSOP-20 PowerPAD™ package for high-density power delivery.
Technical Context
The TPS56921PWPR implements fixed-frequency peak current-mode control with internal slope compensation to prevent subharmonic oscillation across 0–100% duty cycle. Its error amplifier features 1300 µA/V transconductance and drives the COMP pin for loop compensation.
It supports two regulation architectures: external mode (VSENSE feedback with resistor divider, min 0.8 V) and internal mode (I²C VID control via SDA/SCL/A0/A1, 0.72–1.48 V). The RT/CLK pin enables either resistor-programmed switching frequency (200 kHz–1.6 MHz) or synchronization to an external clock's falling edge.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | PVIN: 1.6–17 V; VIN: 4.5–17 V - enables split-rail operation for optimized control and power-stage biasing |
| Output Current | 9 A continuous - supports high-current SoC and FPGA core rails without external MOSFETs |
| Output Voltage Accuracy | ±1.5% over –40°C to 125°C with VID control - ensures stable CPU/GPU voltage under thermal stress |
| Switching Frequency | 200 kHz to 1.6 MHz - allows trade-off between inductor size (high fSW) and efficiency (low fSW) |
| MOSFET RDS(on) | HS: 26 mΩ typ @ 6 V BOOT-PH; LS: 19 mΩ typ - enables >90% efficiency at 12 VIN/1.1 VOUT, 5 A |
| Protection Features | Hiccup-mode OCP (11.5–22 A HS limit), thermal shutdown (150–170°C), BOOT-PH UVLO (2.1–3 V) - prevents latch-up during overload or thermal fault |
| I²C Interface | 400 kHz compliant, 7-bit address (0x6D default), 2-pin address selection (A0/A1) - enables dynamic voltage scaling in multi-core systems |
Pinout & Package
TPS56921PWPR is housed in a thermally enhanced 20-pin HTSSOP package with exposed PowerPAD™ thermal pad (Pin 21), requiring solder connection to PCB ground plane for optimal thermal performance (θJCbot = 2.1°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| COMP (1) | Error amplifier output | Connect RC network here for Type II/III compensation; sets loop bandwidth and phase margin |
| SS (2) | Soft-start control | Capacitor here sets VREF ramp time; also enables power sequencing and prevents inrush into pre-biased loads |
| EN (3) | Enable input | 1.21–1.26 V rising threshold; internal 1.15 µA pull-up allows floating-enable or resistor-divider UVLO configuration |
| PH (4–6) | Power switch node | Three parallel pins reduce parasitic inductance; connects to inductor and BOOT capacitor anode |
| BOOT (7) | High-side gate drive supply | Bootstrap capacitor between BOOT–PH supplies gate voltage; monitored by BOOT-PH UVLO for low-voltage recharge |
| PWRGD (8) | Open-drain power-good flag | Asserts low if VSENSE < 92% or > 106% of VREF - used for system power sequencing and fault reporting |
| A0/A1 (9–10) | I²C address LSB/MSB | Set via GND/floating to configure one of four device addresses (0x6D, 0x6E, 0x6F, 0x7D) on shared bus |
| SDA/SCL (11–12) | I²C bidirectional data/clock | 400 kHz standard-mode interface; supports dynamic VID updates and telemetry readback |
| RT/CLK (13) | Frequency control/sync input | Resistor-to-GND sets fSW; external clock sync aligns switching to system timing domain |
| GND (14–15) | Signal & low-side return | Dual pins minimize ground bounce; must connect to PowerPAD™ and system ground plane |
| PVIN (16–17) | Power-switch input | Supplies HS/LS MOSFETs; supports down to 1.6 V for low-input applications |
| VIN (18) | Control-circuit input | Supplies bias for logic, oscillator, and error amp; requires 4.5–17 V for proper operation |
| VSENSE (19) | Feedback input | Inverting input of gm amplifier; monitors output via resistor divider or internal DAC in VID mode |
| VOUT (20) | VID output voltage sense | Must connect to converter output when using I²C mode; clamps max VOUT to 3.3 V |
| PowerPAD™ (21) | Thermal & electrical ground | Exposed copper pad; mandatory solder connection to PCB ground for thermal dissipation and EMI reduction |
Key Features
| Feature | Design Value |
|---|---|
| Integrated dual MOSFETs | Eliminates external high-side/low-side drivers and discrete FETs - reduces BOM count and layout area by ≥6 components |
| I²C VID programmability | Enables real-time voltage scaling for DVFS in processors - avoids manual resistor changes or firmware reflash |
| Monotonic pre-biased startup | Prevents reverse current flow during power-up - critical for hot-swap and multi-rail sequencing in telecom systems |
| Hiccup-mode overcurrent protection | Limits average power during sustained overload - reduces thermal stress vs. latch-off, enabling safe recovery after fault clearance |
| Adjustable soft-start via SS pin | Capacitor-based ramp control eliminates need for external timers - simplifies sequencing with multiple power rails |
Applications
| SoC Core Power | Digital TV Mainboard |
|---|---|
Use Scenario: Supplying 1.1 V/6 A core voltage to ARM-based application processors in set-top boxes. IC Role / Device Role / Timing Role: Primary buck regulator delivering dynamically scaled voltage via I²C commands from system controller. Use Value: ±1.5% output accuracy and 9 A capability ensure stable processor operation across temperature; VID control enables energy-efficient DVFS. | Use Scenario: Generating 1.2 V/5 A for video decoder SoCs in 4K digital TVs with strict EMI limits. IC Role / Device Role / Timing Role: High-efficiency synchronous buck converter with programmable 500 kHz–1 MHz switching to meet CISPR-32 conducted emission targets. Use Value: Integrated MOSFETs and PowerPAD™ reduce thermal resistance (θJA = 26°C/W), enabling fanless enclosure design. |
| High-Density Server PSU | Industrial FPGA Power |
Use Scenario: Providing 0.85 V/8 A to Xilinx Zynq MPSoC in compact server mezzanine cards. IC Role / Device Role / Timing Role: Compact, thermally robust point-of-load regulator supporting fast transient response for burst-mode workloads. Use Value: Peak current-mode control and 150 ns minimum on-time support low-duty-cycle operation at 12 V input, minimizing solution size. | Use Scenario: Delivering 1.0 V/7 A to Intel Agilex FPGA cores in industrial automation controllers with wide ambient temperature range. IC Role / Device Role / Timing Role: Robust buck converter with –40°C to 125°C operation, thermal hiccup protection, and I²C telemetry for predictive maintenance. Use Value: ±1% reference voltage stability and 10°C thermal hysteresis ensure reliable startup and sustained operation in uncooled enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS568215RNNR | 8 A rating, 4.5–18 V input, no I²C interface, fixed 500 kHz fSW | Lacks VID programmability; suited for static-voltage rails where dynamic scaling is unnecessary | Select when cost sensitivity outweighs need for voltage agility and board space permits larger external compensation components |
| MP2964GQKT-Z | 9 A, 4.5–16 V, PMBus 1.3 interface, digital loop compensation, 3.3 V VOUT clamp not enforced | Supports full telemetry (V/I/T), adaptive loop tuning, and higher VOUT (>3.3 V) in digital mode | Choose for systems requiring real-time monitoring, closed-loop optimization, or >3.3 V output with digital control |
Compared with TPS56921PWPR, TPS568215RNNR offers lower cost and simpler layout but forfeits I²C-based voltage agility, while MP2964GQKT-Z adds digital intelligence and wider VOUT flexibility at the expense of higher complexity and BOM cost.
Availability
TPS56921PWPR is available at Aetrix Electronics and suitable for SoC core power, digital TV mainboards, high-density server PSUs, and industrial FPGA power applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for TPS56921PWPR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management IC design.
The TPS56921PWPR belongs to TI's SWIFT™ synchronous buck converter product line, engineered for high-current, space-constrained applications demanding I²C programmability, robust protection, and thermal efficiency in consumer, computing, and industrial power systems.
FAQ
What is the maximum output voltage supported by TPS56921PWPR in I²C VID mode?
The TPS56921PWPR supports a maximum output voltage of 1.48 V in I²C VID mode, adjustable in precise 10 mV steps from 0.72 V to 1.48 V. When using VID control, the VOUT pin must be connected to the converter output, which enforces a hard 3.3 V upper limit on the regulated rail - though practical VID operation remains within the 0.72–1.48 V range per datasheet specification. This makes TPS56921PWPR ideal for low-voltage SoC and FPGA core supplies.
How does the TPS56921PWPR handle startup into a pre-biased output?
The TPS56921PWPR ensures monotonic startup into pre-biased outputs by disabling low-side MOSFET conduction until the SS pin voltage exceeds 1.4 V. This prevents reverse current flow from the output capacitor into the converter during power-up. The behavior is inherent to the control logic and requires no external circuitry - a key reliability feature for hot-swap and multi-rail systems where downstream rails may already be energized when TPS56921PWPR is enabled.
What thermal performance can be expected from the TPS56921PWPR in a standard 4-layer PCB?
In a standard 4-layer PCB per JEDEC JESD51-7 (3″ × 3″, 2 oz copper, 21 thermal vias under PowerPAD™), the TPS56921PWPR achieves θJA = 26°C/W and θJCbot = 2.1°C/W. At 9 A load and 12 V input, typical junction temperature rise is ~65°C above ambient - well within the –40°C to 125°C operating range. Proper soldering of the PowerPAD™ to a solid ground plane is mandatory to realize these values; insufficient thermal relief will degrade performance significantly.
Can the TPS56921PWPR operate with only PVIN powered and VIN floating?
No - the TPS56921PWPR requires a valid voltage on the VIN pin (4.5–17 V) to power its internal control circuitry, including the oscillator, error amplifier, and I²C interface. PVIN (1.6–17 V) supplies only the power switches. If VIN is left floating or below 4.5 V, the device will not initialize, regardless of PVIN status. Both rails must be present and within spec for normal operation; VIN cannot be omitted or replaced by PVIN.
What protection mechanisms does the TPS56921PWPR implement against overvoltage conditions?
The TPS56921PWPR implements overvoltage protection via its PWRGD comparator and control logic: when VSENSE exceeds 106% of the internal reference, PWRGD asserts low and the high-side MOSFET is immediately disabled. Recovery occurs only after VSENSE falls below 104% of VREF, preventing output overshoot during load dump or transient events. This hardware-level OV response operates independently of I²C commands and functions in both external and internal regulation modes.
TPS56921PWPR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SWIFT™
- Package/Case:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Last Time Buy
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable (Programmable)
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 17V
- Voltage - Output (Min/Fixed):
- 0.72V
- Voltage - Output (Max):
- 1.48V
- Current - Output:
- 9A
- Frequency - Switching:
- 200kHz ~ 1.6MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-HTSSOP
TPS56921PWPR FAQ
1.How can I place an order for TPS56921PWPR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS56921PWPR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS56921PWPR reliable?
The price and inventory of TPS56921PWPR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS56921PWPR is usually 5 days.
3.What payment methods are accepted for TPS56921PWPR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS56921PWPR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS56921PWPR?
TPS56921PWPR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS56921PWPR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS56921PWPR?
For technical support, including TPS56921PWPR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS56921PWPR requirements.
6.How does Aetrix verify that TPS56921PWPR is sourced from the original manufacturer or authorized distributors?
All TPS56921PWPR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS56921PWPR meets industry standards.
7.What is the process for return or replacement of TPS56921PWPR?
All TPS56921PWPR units undergo pre-shipment inspection (PSI). If there is an issue with TPS56921PWPR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS56921PWPR part is unused and in its original packaging.
Return procedure for TPS56921PWPR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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