Texas Instruments TPS57114MRTETEP

Overview

TPS57114MRTETEP from Texas Instruments is a radiation-hardened, 2.95-V to 6-V input, 3.5-A synchronous step-down DC/DC converter with integrated 12-mΩ high-side and low-side N-channel MOSFETs, 0.8-V ±1% reference over –55°C to 125°C, and 200-kHz to 2-MHz adjustable switching frequency. It delivers point-of-load regulation for FPGAs and microprocessors in aerospace power systems.

For engineers reviewing the TPS57114MRTETEP datasheet, TPS57114MRTETEP pinout, TPS57114MRTETEP application, or TPS57114MRTETEP equivalent, key selection criteria include its EN-controlled UVLO threshold (2.45 V), PWRGD open-drain output with 93–107% voltage window, RT/CLK synchronization capability, and thermally enhanced 3-mm × 3-mm WQFN-16 package with exposed thermal pad.

Technical Context

The TPS57114MRTETEP implements peak-current mode control with internal slope compensation to ensure stability at duty cycles >50%, enabling robust transient response and simplified loop compensation. Its integrated boot regulator supports near 100% duty-cycle operation as long as BOOT–PH remains above 2.2 V.

It features a transconductance error amplifier (245 µS normal, 79 µS during slow start), programmable soft-start via SS/TR pin, and frequency foldback during overcurrent or startup to limit inductor current. The device includes thermal shutdown (168°C) with 20°C hysteresis and overvoltage protection that disables the high-side switch when VSENSE exceeds 109% of nominal.

Key Specifications

Pinout & Package

TPS57114MRTETEP is housed in a thermally enhanced 3.00 mm × 3.00 mm, 16-pin WQFN package with an exposed thermal pad (PowerPAD™) requiring direct connection to PCB ground plane via multiple vias for optimal thermal performance and electrical stability.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck converter applications.

Compared with TPS57114MRTET and LM61480RQRR, the TPS57114MRTETEP uniquely combines radiation-hardened construction, military-grade temperature range (–55°C to 125°C), and integrated power-good with precise 2% hysteresis - making it the sole option for space-qualified point-of-load regulation where reliability and traceability are mandatory.

Availability

TPS57114MRTETEP is available at Aetrix Electronics and suitable for avionics power distribution, satellite payload regulation, and defense radar signal processing requiring stable component supply across extended product lifecycles and rigorous environmental qualification.

Supply support for TPS57114MRTETEP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-reliability technologies, with decades of heritage in space-grade and military-qualified components.

The TPS57114MRTETEP belongs to TI's SWIFT™ family of high-efficiency synchronous buck converters designed specifically for demanding aerospace, defense, and medical applications requiring extended temperature operation, radiation tolerance, and full traceability.

FAQ

What is the absolute maximum input voltage rating for the TPS57114MRTETEP?

The TPS57114MRTETEP has an absolute maximum input voltage rating of 7 V on the VIN pin. Exceeding this voltage, even momentarily, may cause permanent damage. The recommended operating range remains 2.95 V to 6 V per datasheet Section 8.3. Operation at 7 V is strictly prohibited and not supported by TI's reliability testing or qualification for the TPS57114MRTETEP.

Does the TPS57114MRTETEP support external clock synchronization, and what are the timing requirements?

Yes, the TPS57114MRTETEP supports external clock synchronization via the RT/CLK pin. It accepts CLK signals from 300 kHz to 2 MHz, with minimum pulse duration of 80 ns and defined high/low thresholds (1.6–2.5 V and 0.4–0.6 V). The PLL achieves lock within 42 µs, and the delay from CLK falling edge to PH rising edge is 90 ns at 500 kHz - critical for deterministic multi-phase timing in radar or imaging systems.

How does the PWRGD output of the TPS57114MRTETEP behave during undervoltage and overvoltage faults?

The PWRGD output of the TPS57114MRTETEP is an open-drain signal that goes low when VSENSE falls below 93% or rises above 107% of the nominal output voltage. During overvoltage, the high-side MOSFET is disabled until VSENSE drops below 107%; during undervoltage, PWRGD remains low until VSENSE exceeds 93%. Hysteresis is fixed at 2% of VREF, ensuring noise immunity and clean state transitions.

Can the TPS57114MRTETEP operate at 100% duty cycle, and what limits this capability?

The TPS57114MRTETEP supports near 100% duty cycle operation as long as the BOOT–PH voltage remains above 2.2 V. This is enforced by an internal BOOT UVLO circuit that disables the high-side MOSFET if the bootstrap capacitor discharges below threshold. The integrated boot charge resistance (16 Ω typical) and external 0.1-µF ceramic capacitor determine achievable duty cycle margin under light loads and low input voltages.

What is the purpose of the SS/TR pin on the TPS57114MRTETEP, and how is it configured for power sequencing?

The SS/TR pin on the TPS57114MRTETEP serves dual functions: soft-start (via external capacitor) and supply tracking (via resistor divider from another regulator's output). For sequencing, connect the SS/TR pin to the output of a master regulator through a resistor; the TPS57114MRTETEP then ramps its output proportionally, ensuring ordered power-up across multiple rails without external controllers or timers.