Texas Instruments TPS59610RHBT

Overview

TPS59610RHBT from Texas Instruments is a dual-output, high-efficiency synchronous buck controller IC designed exclusively for Intel IMVP-6/6.5 mobile processor core and I/O voltage regulation. It supports 2-phase operation per output, delivers up to 40 A total output current, operates from 5.5 V to 24 V input, and features adaptive on-time D-CAP2 control with ±0.5% output voltage accuracy at 0.7–1.5 V range.

For engineers reviewing the TPS59610RHBT datasheet, TPS59610RHBT pinout, TPS59610RHBT application, or TPS59610RHBT equivalent, this page provides verified package dimensions, confirmed thermal pad requirements, validated IMVP-6 compliance, and precise tape-and-reel configuration details for production procurement and PCB layout planning.

Technical Context

The TPS59610RHBT implements Intel IMVP-6/6.5-compliant VRD (Voltage Regulator Down) protocol with SVID interface, enabling dynamic VID code updates, telemetry reporting, and phase shedding. It integrates two independent 2-phase controllers with integrated gate drivers, supporting interleaved operation to reduce input/output ripple and improve transient response.

Its D-CAP2 control architecture eliminates external compensation components and enables fast load-step response (<10 µs) without loop tuning. The device requires an external PMOS/NMOS driver stage and discrete power MOSFETs, and mandates Intel CNDA agreement for full functional access and documentation.

Key Specifications

Pinout & Package

VQFN-32 (RHB), 5 mm × 5 mm, 0.5 mm pitch, 1 mm max height, with exposed thermal pad (Pin 33). Requires soldering of thermal pad to PCB ground plane for thermal dissipation and mechanical reliability.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output VR controller applications.

Compared with TPS59610RHBT, TPS59622RHBR offers next-generation IMVP-7.0 protocol support and higher telemetry fidelity, while ISL95831IRZ integrates gate drivers to simplify design at the expense of thermal headroom and rail independence.

Availability

TPS59610RHBT is available at Aetrix Electronics and suitable for mobile computing, embedded workstation, and Intel vPro platform designs requiring stable component supply, IMVP-6/6.5 compliance, and production-ready tape-and-reel packaging.

Supply support for TPS59610RHBT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and power management technologies with over 90 years of innovation history.

The TPS596xx family was developed specifically to meet Intel's IMVP-6/6.5 voltage regulator down specifications for mobile processors, emphasizing high-current density, SVID interoperability, and thermal-aware VRM design.

FAQ

What is the required Intel agreement to use the TPS59610RHBT in production?

The TPS59610RHBT is subject to Intel's IMVP disclosure requirements. End users must hold an active Confidentiality and Non-Disclosure Agreement (CNDA) with Intel to access full datasheets, reference designs, and SVID protocol documentation. TI does not distribute these materials without valid CNDA verification. Contact [email protected] to confirm eligibility before design-in. The TPS59610RHBT itself remains orderable regardless, but functional validation requires Intel authorization.

Does the TPS59610RHBT include integrated MOSFET drivers or require external drivers?

The TPS59610RHBT integrates high-current gate drivers capable of directly driving external N-channel high-side and low-side power MOSFETs - no external driver ICs are needed. It provides dedicated GH/GL outputs per phase, BOOT pins for bootstrap supply, and robust shoot-through protection. The TPS59610RHBT is designed for discrete FET solutions, distinguishing it from fully integrated power stages like the TPS59622.

What is the function of Pin 33 on the TPS59610RHBT?

Pin 33 is the exposed thermal pad (EPAD) of the TPS59610RHBT's VQFN-32 package. It is electrically connected to internal ground and must be soldered to a PCB thermal plane using minimum 75% solder paste coverage. This connection achieves ≤5.5 °C/W junction-to-board thermal resistance and ensures mechanical stability. Leaving the EPAD unconnected violates TI's recommended layout and risks thermal shutdown or premature failure during sustained 30+ A operation.

Can the TPS59610RHBT be used with non-Intel processors or in non-IMVP applications?

The TPS59610RHBT is architecturally limited to IMVP-6/6.5-compliant systems due to its fixed SVID interface, hard-coded VRD timing parameters, and lack of generic PWM or analog control modes. It cannot be configured for AMD, ARM, or custom power architectures. While basic regulation may occur with manual VID setup, full functionality - including telemetry, phase shedding, and VR ready signaling - requires Intel processor handshake. Use outside IMVP ecosystems is unsupported.

What tape-and-reel configuration does the TPS59610RHBT ship in?

The TPS59610RHBT ships in small tape-and-reel format: 250 units per reel, 180 mm reel diameter, 12.4 mm reel width, 5.3 mm cavity length/width (A0/B0), 1.5 mm cavity depth (K0), 8.0 mm pitch (P1), and 12.0 mm overall tape width (W). Pin 1 orientation is in Quadrant Q2 per TI's tape specification. This configuration is optimized for SMT placement in low-volume or prototype builds.