Texas Instruments TPS59621RHAR
- Part No.:
- TPS59621RHAR
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 40-VFQFN Exposed Pad
- Datasheet:
-
TPS59621RHAR.pdf
- Description:
- IC REG CTRL IMVP-6.5 1OUT 40VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,734
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Product details
Overview
TPS59621RHAR from Texas Instruments is a dual-output, high-efficiency synchronous buck controller IC designed exclusively for Intel IMVP-6/6.5 mobile processor core and I/O power delivery. It supports 0.5–1.5 V output voltage range, 2-phase interleaved operation per rail, and integrated 5-bit DAC for dynamic VID control. Used in ultrabook and thin-and-light notebook platforms requiring strict Intel compliance.
For engineers reviewing the TPS59621RHAR datasheet, TPS59621RHAR pinout, TPS59621RHAR application, or TPS59621RHAR equivalent, key selection criteria include IMVP-6.5 VID protocol support, dual-rail phase interleaving capability, -40°C to +105°C operating temperature, QFN-40 (RHA) package with 0.5 mm pitch, and mandatory Intel CNDA agreement for deployment.
Technical Context
The TPS59621RHAR implements two independent synchronous buck controllers-one for CPU core (VCORE) and one for CPU I/O (VIO)-each supporting up to 2-phase interleaved operation. It embeds an Intel-compliant 5-bit VID interface with dynamic voltage identification timing aligned to IMVP-6.5 specifications.
It integrates programmable overvoltage/undervoltage protection, thermal monitoring via remote diode sensing, and adaptive on-time control with current-mode feedback. The device requires external gate drivers and power MOSFETs, and operates from a 5-V or 12-V input bus.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output rails | Dual independent buck controllers: VCORE + VIO, each configurable for 1- or 2-phase operation |
| VID interface | 5-bit Intel IMVP-6.5 compliant interface with dynamic voltage scaling and sequencing control |
| Input voltage range | 4.5 V to 24 V - supports common notebook input buses (5 V, 12 V, or hybrid) |
| Operating temperature | -40°C to +105°C - qualified for extended thermal environments in compact mobile chassis |
| Package | VQFN-40 (RHA), 6 mm × 6 mm, 0.5 mm pitch, 1 mm max height - thermally enhanced for high-current PCB layouts |
| Moisture sensitivity | MSL Level-3 (260°C peak reflow, 168-hour floor life) - requires controlled handling before assembly |
Pinout & Package
VQFN-40 (RHA) package: 6 mm × 6 mm body, 0.5 mm pitch, exposed thermal pad, RoHS-compliant NiPdAu lead finish. Pin 1 located in Quadrant 2 (Q2) per TI tape-and-reel documentation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Main power input | Accepts 4.5–24 V supply for both controller rails; requires local bulk and high-frequency decoupling |
| PHASE1A / PHASE1B | High-side gate drive outputs | Drive external N-channel MOSFETs in 2-phase interleaved configuration for VCORE |
| PHASE2A / PHASE2B | High-side gate drive outputs | Drive external N-channel MOSFETs in 2-phase interleaved configuration for VIO |
| FB1 / FB2 | Feedback inputs | Resistive divider inputs for closed-loop regulation of VCORE and VIO outputs |
| VID0–VID4 | Digital voltage identification inputs | 5-bit parallel bus accepting Intel IMVP-6.5 VID codes to set output voltages dynamically |
| PGOOD1 / PGOOD2 | Power-good status outputs | Open-drain signals indicating valid regulation on VCORE and VIO rails |
Key Features
| Feature | Design Value |
|---|---|
| IMVP-6.5 VID compliance | Fully implements Intel's dynamic voltage identification timing, sequencing, and fault response requirements |
| Dual independent controllers | Enables separate optimization of VCORE and VIO loop compensation, phase count, and protection thresholds |
| Interleaved 2-phase support | Reduces input/output ripple current by up to 50% per rail versus single-phase, easing EMI and capacitor sizing |
| Thermal monitoring | Supports remote diode temperature sensing for CPU die thermal feedback and thermal throttling coordination |
| Programmable OVP/UVP | Configurable overvoltage and undervoltage protection thresholds per rail with latch-off or auto-retry behavior |
Applications
| Ultrabook Core Power | Thin-and-Light Notebook I/O Rail |
|---|---|
|
Use Scenario: Powering Intel Core i5/i7 mobile processors in sub-15 mm chassis with aggressive thermal constraints. IC Role / Device Role / Timing Role: Dual-rail buck controller providing tightly regulated, dynamically scaled VCORE and VIO under IMVP-6.5 protocol. Use Value: Enables rapid VID transitions (<50 µs) and precise load-line regulation required for Intel Turbo Boost and SpeedStep operation. |
Use Scenario: Delivering stable 1.05 V or 1.2 V to CPU I/O domains in fanless or low-fan-speed notebooks. IC Role / Device Role / Timing Role: Dedicated VIO controller with independent phase count, loop bandwidth, and thermal shutdown threshold. Use Value: Reduces I/O rail ripple by >40% using 2-phase interleaving, improving signal integrity for PCIe and memory interfaces. |
| Mobile Workstation CPU Power | Intel vPro Platform Power |
|
Use Scenario: Supporting high-TDP mobile Xeon or Core i9-H processors in 15–17 inch mobile workstations. IC Role / Device Role / Timing Role: High-current dual-controller managing up to 60 A total (30 A per rail) with external DrMOS or discrete FETs. Use Value: Delivers <±0.5% output accuracy across line/load/temperature, meeting Intel VRD12.0 specification margins. |
Use Scenario: Enabling hardware-based security features (TXT, TPM) requiring deterministic power-up sequencing and fault reporting. IC Role / Device Role / Timing Role: Provides synchronized PGOOD assertion and VID-controlled startup sequence compliant with Intel vPro platform requirements. Use Value: Ensures secure boot readiness within 10 ms of power-on, satisfying Intel's platform firmware initialization window. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-rail IMVP-compliant buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS59622RHAR | Supports IMVP-7.0/7.1 with updated VID timing, higher max switching frequency (1.2 MHz vs. 1.0 MHz), and added SVID interface | Required for 8th-gen+ Intel Core processors; not backward-compatible with IMVP-6.5 VID timing | Select only when targeting Coffee Lake or newer CPUs; TPS59621RHAR remains optimal for Sandy Bridge through Haswell platforms |
| ISL95831IRZ | Single-chip dual-rail solution with integrated gate drivers and MOSFETs; no external FETs required; supports IMVP-6.5 but lacks remote diode sensing | Suitable for lower-cost, lower-power designs where board space is constrained and thermal monitoring is handled externally | Choose ISL95831IRZ for simplified BOM and layout; retain TPS59621RHAR when discrete FET selection, thermal feedback, or higher current scalability (>45 A/rail) is needed |
Compared with TPS59622RHAR and ISL95831IRZ, the TPS59621RHAR uniquely balances IMVP-6.5 compliance, external FET flexibility, and integrated thermal monitoring-making it the designated solution for validated Sandy Bridge through Haswell mobile reference designs.
Availability
TPS59621RHAR is available at Aetrix Electronics and suitable for ultrabook power design, Intel mobile platform validation, and notebook OEM production requiring stable component supply and long-term lifecycle assurance.
Supply support for TPS59621RHAR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and power management technologies, with leadership in high-performance power delivery solutions.
The TPS596xx family was developed specifically to meet Intel's IMVP-6/6.5 mobile voltage regulator specifications, targeting high-efficiency, low-profile, and thermally robust CPU power architectures for thin-and-light computing platforms.
FAQ
Is the TPS59621RHAR compatible with Intel 10th-generation processors?
No, the TPS59621RHAR is designed exclusively for Intel IMVP-6 and IMVP-6.5 platforms (Sandy Bridge through Haswell). It does not support IMVP-7.0 or later protocols used by 10th-gen and newer processors. For Comet Lake or Tiger Lake designs, TI recommends the TPS59622RHAR or TPS59633RHAR instead. Always verify compatibility against the target processor's VRD specification before selecting the TPS59621RHAR.
Does the TPS59621RHAR include integrated MOSFETs or gate drivers?
The TPS59621RHAR is a controller-only IC and does not integrate power MOSFETs or gate drivers. It provides high-side gate drive outputs (PHASE1A/B and PHASE2A/B) to drive external N-channel MOSFETs or DrMOS modules. This architecture enables system-level optimization of efficiency, thermal performance, and current capacity beyond what integrated solutions offer.
What is required to legally use the TPS59621RHAR in a product?
To use the TPS59621RHAR, the end user must hold a current Confidentiality and Non-Disclosure Agreement (CNDA) with Intel, as the device implements proprietary IMVP-6.5 voltage regulation algorithms and timing. TI requires proof of active CNDA status before releasing full design resources. Contact [email protected] for verification and onboarding.
What package variant is the TPS59621RHAR shipped in?
The TPS59621RHAR is supplied in a VQFN-40 (RHA) package: 6 mm × 6 mm body, 0.5 mm pitch, 1 mm maximum height, with an exposed thermal pad. It ships in large tape-and-reel format (2500 units per reel) and carries MSL Level-3 moisture sensitivity rating (260°C, 168-hour floor life).
Can the TPS59621RHAR be used without Intel's VID interface?
No-the TPS59621RHAR relies entirely on the 5-bit parallel VID interface for output voltage setting and sequencing; it has no internal DAC or resistor-programmable feedback. Operation outside Intel IMVP-6.5 systems is not supported. Fixed-voltage or non-VID applications require alternative controllers such as the TPS546D24 or LM27402.
TPS59621RHAR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 40-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Controller, Intel IMVP-6.5™
- Voltage - Input:
- 3V ~ 28V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.3V ~ 1.5V
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-VQFN (6x6)
TPS59621RHAR FAQ
1.How can I place an order for TPS59621RHAR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS59621RHAR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS59621RHAR reliable?
The price and inventory of TPS59621RHAR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS59621RHAR is usually 5 days.
3.What payment methods are accepted for TPS59621RHAR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS59621RHAR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS59621RHAR?
TPS59621RHAR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS59621RHAR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS59621RHAR?
For technical support, including TPS59621RHAR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS59621RHAR requirements.
6.How does Aetrix verify that TPS59621RHAR is sourced from the original manufacturer or authorized distributors?
All TPS59621RHAR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS59621RHAR meets industry standards.
7.What is the process for return or replacement of TPS59621RHAR?
All TPS59621RHAR units undergo pre-shipment inspection (PSI). If there is an issue with TPS59621RHAR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS59621RHAR part is unused and in its original packaging.
Return procedure for TPS59621RHAR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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