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Texas Instruments TPS60100PWP

Part No.:
TPS60100PWP
Manufacturer:
Texas Instruments
Category:
Voltage Regulators - DC DC Switching Regulators
Package:
20-PowerTSSOP (0.173", 4.40mm Width)
Datasheet:
AetrixTPS60100PWP.pdf
Description:
IC REG CHARGE PUMP 3.3V 20HTSSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:158

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Product details

Overview

TPS60100PWP from Texas Instruments is a regulated step-up charge pump DC/DC converter delivering 3.3 V ±4% (or 3.8 V preregulated) from 1.8–3.6 V input, supporting up to 200 mA output current with <5 mVPP ripple, no inductors required, and 50 µA quiescent current - deployed in battery-powered microprocessor systems, PDAs, and handheld instrumentation.

For engineers reviewing the TPS60100PWP datasheet, TPS60100PWP pinout, TPS60100PWP application, or TPS60100PWP equivalent, this page delivers verified electrical specs, thermal package details, mode-select pin functions (SKIP/COM/3V8), startup behavior, and real-world efficiency vs. load curves - all confirmed against TI SLVS213C Rev. August 2008.

Technical Context

The TPS60100PWP implements a dual single-ended charge pump architecture operating in push-pull mode (180° phase shift) to sustain near-constant output current and minimize ripple. Its internal 300 kHz oscillator drives high-current MOSFET switches controlled by an error amplifier referencing a 1.22 V bandgap.

Mode selection is hardware-configured: SKIP pin selects constant-frequency (low ripple) or pulse-skip (low IQ) operation; COM pin enables push-pull (low ripple) or single-ended (reduced capacitor count); 3V8 pin selects 3.3 V regulated or 3.8 V preregulated output. All modes require only four external ceramic capacitors.

Key Specifications

Parameter Value and Actual Design Meaning
Output Voltage 3.3 V ±4% (3V8 = low) or 3.8 V (3V8 = high) - tightly regulated via internal resistive divider and 1.22 V reference
Input Voltage Range 1.8 V to 3.6 V - supports two alkaline/NiCd/NiMH cells; includes 1.6 V UVLO shutdown
Max Output Current 200 mA at VIN ≥ 2 V - sustained under full load with 16 Ω minimum load during startup
Output Ripple <5 mVPP at 200 mA - achieved in constant-frequency mode with 22 µF X5R ceramic CO
Quiescent Current 50 µA typical (no-load, SKIP = VIN) - drops to 0.05 µA in shutdown (ENABLE = low)
Switching Frequency 300 kHz internal (200–400 kHz range); supports external sync up to 800 kHz - frequency halved when using external clock
Efficiency Up to 90% at 100 mA / VIN = 2.4 V - optimized for battery life in portable systems

Pinout & Package

TPS60100PWP uses the thermally enhanced 20-pin TSSOP PowerPAD™ (PWP) package with exposed thermal pad on bottom for improved heat dissipation. RθJA = 178°C/W; max continuous power dissipation = 700 mW at TA ≤ 25°C.

Pin/Terminal Circuit Role Design Meaning
IN (7, 14) Power input Dual pins for low-impedance connection of 1.8–3.6 V supply; bypassed with 10 µF ceramic capacitor
OUT (5, 16) Regulated output Dual pins for low-ESR connection to 3.3 V or 3.8 V load; requires 22 µF X5R/X7R ceramic CO
GND (1, 20) Analog ground Reference ground for internal bandgap and feedback circuitry; short-trace connection to PGND recommended
PGND (9–12) Power ground High-current return path for charge-pump switching; all four pins must be tied together with minimal inductance
ENABLE (3) Logic control Active-high enable; pulls supply current to 0.05 µA and isolates load from input when low
FB (4) Feedback input Connects directly to OUT near load; internal 1.22 V reference sets output voltage via fixed resistor ratio
SKIP (17) Mode select Low = constant-frequency (min ripple); high = pulse-skip (min IQ); must not float
COM (18) Mode select Low = push-pull (low ripple, two flying caps); high = single-ended (one flying cap, larger ripple)
3V8 (19) Mode select Low = 3.3 V regulated output; high = 3.8 V preregulated output - determines target regulation point
C1+/C1− (6, 8), C2+/C2− (15, 13) Flying capacitor terminals Four dedicated pins for two 2.2 µF ceramic flying capacitors (C1F, C2F); critical for charge transfer timing
SYNC (2) External clock input Connect to GND for internal clock; connect to IN to accept external 400–800 kHz signal (output runs at half frequency)

Key Features

Feature Design Value
No-inductor architecture Eliminates magnetic EMI, simplifies layout, and reduces board area - only four X5R/X7R ceramic capacitors required
Configurable operating modes Hardware-selectable combinations of constant-frequency/pulse-skip, push-pull/single-ended, and 3.3 V/3.8 V outputs
Load isolation in shutdown EN = low disconnects output from input and limits leakage to ≤1 µA - preserves backup battery integrity
Thermally enhanced PWP package 20-pin TSSOP with exposed thermal pad; RθJC = 3.5°C/W enables 700 mW dissipation at TA ≤ 25°C
Robust start-up behavior Starts into full 200 mA load from 2 V input with 16 Ω minimum load; no external diode needed

Applications

Battery-Powered Microprocessor Systems Handheld Medical Instruments

Use Scenario: Powering 3.3 V I/O and core logic of ARM-based microcontrollers in portable glucose meters and pulse oximeters running on two AA batteries.

IC Role / Device Role / Timing Role: Regulated step-up charge pump providing stable 3.3 V rail with <5 mVPP ripple and 50 µA quiescent current to extend battery life.

Use Value: Enables >100-hour runtime on alkaline cells while maintaining ADC accuracy and display contrast under varying load conditions.

Use Scenario: Supplying 3.3 V to low-power sensor front-ends and Bluetooth LE radios in handheld ECG monitors with tight EMI constraints.

IC Role / Device Role / Timing Role: Inductorless DC/DC converter operating in constant-frequency mode to deliver clean, spectrally predictable power with minimal conducted noise.

Use Value: Meets IEC 60601-1 EMI requirements without shielding or ferrite beads, reducing BOM cost and assembly complexity.

PDAs and Portable Data Terminals Backup-Battery Boost Converters

Use Scenario: Generating 3.3 V from two NiMH cells (2.4 V nominal) for LCD controllers and flash memory interfaces in legacy PDAs.

IC Role / Device Role / Timing Role: High-efficiency charge pump supporting 200 mA peak loads during screen refresh and data write cycles.

Use Value: Delivers >85% efficiency across 10–200 mA load range, minimizing thermal rise in sealed plastic enclosures.

Use Scenario: Providing 3.3 V boost from a 2.0 V lithium-thionyl chloride backup cell to maintain RTC and SRAM during main power failure.

IC Role / Device Role / Timing Role: Ultra-low-quiescent (0.05 µA shutdown) charge pump with load isolation and 1.6 V UVLO to prevent deep discharge.

Use Value: Extends backup battery life beyond 10 years while ensuring reliable power restoration upon main supply recovery.

Equivalent & Alternatives

The following parts are listed as comparable options for similar regulated charge pump applications.

Alternative Part Technical Difference Application Difference Selection Advice
TPS60110PWP Same PWP package and pinout; supports 3.3 V output only (no 3.8 V mode); 150 mA max output current Suitable for lower-current applications where 3.8 V preregulation is unnecessary Select when design requires identical footprint but lower cost and reduced feature set
MAX680ESA+ SO-8 package; fixed 5 V output; no mode-select pins; 100 mA max output; higher 125 µA IQ Used in legacy 5 V systems requiring minimal external components Choose only if 5 V output and SO-8 compatibility are mandatory; not drop-in compatible

Compared with TPS60100PWP, TPS60110PWP offers pin compatibility and lower cost but sacrifices 3.8 V mode and 50 mA output headroom, while MAX680ESA+ provides simpler integration at the expense of flexibility, efficiency, and modern low-IQ performance.

Availability

TPS60100PWP is available at Aetrix Electronics and suitable for battery-powered microprocessor systems, handheld medical instruments, and portable data terminals requiring stable component supply, long-lifecycle support, and consistent parametric performance across temperature.

Supply support for TPS60100PWP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-reliability power conversion solutions.

The TPS60100PWP belongs to TI's regulated charge pump family designed specifically for space-constrained, battery-operated applications demanding ultra-low EMI, no-inductor simplicity, and configurable efficiency/ripple tradeoffs.

FAQ

What output voltage options does the TPS60100PWP support?

The TPS60100PWP supports two regulated output voltages: 3.3 V ±4% when the 3V8 pin is held low, and 3.8 V (preregulated) when 3V8 is connected to IN. The 3.8 V mode is intended for use with downstream LDOs requiring tighter tolerance input rails. Both modes are fully specified across −40°C to +85°C and validated per TI SLVS213C.

How does the TPS60100PWP achieve low output voltage ripple without inductors?

The TPS60100PWP achieves <5 mVPP ripple using a dual single-ended charge pump architecture operating in push-pull mode (180° phase shift). This ensures continuous charge transfer to the output capacitor, smoothing current delivery. Combined with constant-frequency switching (SKIP = low) and a 22 µF X5R ceramic output capacitor, it minimizes spectral energy and peak-to-peak variation - confirmed in Figure 15 of the TPS60100PWP datasheet.

Can the TPS60100PWP operate from a single 1.5 V alkaline cell?

No. The TPS60100PWP requires a minimum input voltage of 1.8 V (with 1.6 V UVLO threshold) and is explicitly designed for two-cell alkaline/NiCd/NiMH sources (2.0–3.0 V typical). Operation below 1.8 V is outside specification and will trigger undervoltage lockout, disabling the device. For single-cell 1.5 V systems, TI recommends the TPS60400 or similar ultra-low-VIN charge pumps.

What is the purpose of the COM pin on the TPS60100PWP?

The COM pin configures the internal charge pump topology: when COM is low, the TPS60100PWP operates in push-pull mode (two flying capacitors, 180° phase shift), delivering low output ripple; when COM is high, it runs in single-ended mode (capacitors in parallel), reducing component count but increasing ripple. COM must never be left floating - tie to GND or IN per desired mode.

Does the TPS60100PWP require external compensation components?

No. The TPS60100PWP integrates all compensation circuitry internally, including the error amplifier, 1.22 V reference, and feedback resistor network. Only four external ceramic capacitors (CIN, C1F, C2F, CO) are required for full operation - no external resistors, capacitors, or op-amps are needed for stability or regulation.

TPS60100PWP Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
20-PowerTSSOP (0.173", 4.40mm Width)
Packaging:
Bulk
Product Status:
Active
Function:
Step-Up
Output Configuration:
Positive
Topology:
Charge Pump
Output Type:
Fixed
Number of Outputs:
1
Voltage - Input (Min):
1.8V
Voltage - Input (Max):
3.6V
Voltage - Output (Min/Fixed):
3.3V
Voltage - Output (Max):
-
Current - Output:
200mA
Frequency - Switching:
300kHz
Synchronous Rectifier:
No
Operating Temperature:
-40°C ~ 85°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
20-HTSSOP

TPS60100PWP FAQ

1.How can I place an order for TPS60100PWP through Aetrix?

Please submit a Request for Quotation (RFQ) for TPS60100PWP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TPS60100PWP reliable?

The price and inventory of TPS60100PWP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS60100PWP is usually 5 days.

3.What payment methods are accepted for TPS60100PWP?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS60100PWP transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for TPS60100PWP?

TPS60100PWP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your TPS60100PWP order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TPS60100PWP?

For technical support, including TPS60100PWP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS60100PWP requirements.

6.How does Aetrix verify that TPS60100PWP is sourced from the original manufacturer or authorized distributors?

All TPS60100PWP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS60100PWP meets industry standards.

7.What is the process for return or replacement of TPS60100PWP?

All TPS60100PWP units undergo pre-shipment inspection (PSI). If there is an issue with TPS60100PWP, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TPS60100PWP part is unused and in its original packaging.

Return procedure for TPS60100PWP:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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