Texas Instruments TPS60101PWP
- Part No.:
- TPS60101PWP
- Manufacturer:
- Texas Instruments
- Package:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS60101PWP.pdf
- Description:
- IC REG CHARGE PUMP 3.3V 20HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS60101PWP from Texas Instruments is a regulated step-up charge pump DC/DC converter generating 3.3 V ±4% from 1.8–3.6 V input, delivering up to 100 mA output current with <5 mVpp ripple, no inductors required, and 50 µA quiescent current - used in battery-powered microprocessor systems, PDAs, and handheld instrumentation.
For engineers reviewing the TPS60101PWP datasheet, TPS60101PWP pinout, TPS60101PWP application, or TPS60101PWP equivalent, key selection factors include its dual-mode operation (pulse-skip vs. constant-frequency), push-pull charge-pump architecture for low ripple, thermal-enhanced 20-pin TSSOP PowerPAD™ package, and configurable 3.3-V/3.8-V output via 3V8 pin.
Technical Context
The TPS60101PWP implements two single-ended charge pumps operating in 180° phase-shifted push-pull mode to sustain near-constant output current and minimize voltage ripple. Its internal 300 kHz oscillator drives high-current MOSFET switches controlled by an error amplifier referenced to a 1.22 V bandgap.
Mode selection is hardware-configurable: SKIP pin selects pulse-skip (low IQ) or constant-frequency (low ripple); COM pin enables push-pull (low ripple) or single-ended (reduced component count); 3V8 pin sets regulated 3.3 V or preregulated 3.8 V output. Shutdown isolates load and draws only 0.05 µA.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | 3.3 V ±4% (3.17–3.43 V) or 3.8 V ±5.3% (3.6–4.0 V) - selectable via 3V8 pin; supports LDO pre-regulation in 3.8 V mode. |
| Input Voltage Range | 1.8 V to 3.6 V - compatible with two alkaline/NiCd/NiMH cells; includes 1.6 V UVLO threshold. |
| Max Output Current | 100 mA at 2 V input - sufficient for low-power microprocessors, DSPs, and portable sensors. |
| Output Ripple | <5 mVpp in constant-frequency mode with 22 µF X5R ceramic CO - enables noise-sensitive analog circuitry without LC filtering. |
| Quiescent Current | 50 µA typical (no load, constant-frequency mode) - extends battery life in always-on monitoring applications. |
| Shutdown Current | 0.05 µA max - ensures negligible drain during system sleep; load isolated from input. |
| Switching Frequency | 300 kHz internal (200–400 kHz range); supports external sync up to 800 kHz - allows EMI control and clock synchronization. |
Pinout & Package
TPS60101PWP is housed in a thermally enhanced 20-pin TSSOP PowerPAD™ (PWP) package with exposed thermal pad on bottom for improved heat dissipation. Pin numbering follows standard top-view layout with GND (pins 1, 20), PGND (pins 9–12), and dual IN/OUT pins for low-impedance routing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN (7, 14) | Supply Input | Dual-input connection for 1.8–3.6 V source; requires local 4.7 µF bypass to PGND. |
| OUT (5, 16) | Regulated Output | Dual-output connection for 3.3 V or 3.8 V; must be short-traced and bypassed with ≥10 µF (pulse-skip) or ≥22 µF (constant-frequency) CO. |
| PGND (9–12) | Power Ground | High-current return path for charge-pump switching; separate from analog GND to avoid noise coupling. |
| GND (1, 20) | Analog Ground | Reference ground for internal bandgap and error amplifier; connect to PGND via short trace near IC. |
| ENABLE (3) | Logic Control Input | Active-high enable; pulls supply current to 0.05 µA and disconnects load when low - enables system-level power gating. |
| FB (4) | Feedback Input | Connects directly to OUT near load; internal resistive divider sets 1.22 V reference - eliminates external resistor network. |
| C1+/C1− (6, 8), C2+/C2− (15, 13) | Flying Capacitor Terminals | Four dedicated terminals for two 1 µF ceramic flying capacitors - enables push-pull charge transfer with minimal ESR impact. |
| 3V8 (19), COM (18), SKIP (17), SYNC (2) | Mode Configuration Inputs | Logic-level pins selecting output voltage (3V8), operating topology (COM), regulation mode (SKIP), and clock source (SYNC) - no external pull-ups required. |
Key Features
| Feature | Design Value |
|---|---|
| No-inductor architecture | Eliminates magnetic components and associated EMI; reduces BOM count to four ceramic capacitors - ideal for space-constrained portable designs. |
| Push-pull charge-pump topology | Two 180°-phase-shifted pumps deliver continuous output current, achieving <5 mVpp ripple without post-regulation - suitable for ADC references and RF bias rails. |
| Dual regulation modes | Pulse-skip mode cuts IQ to 1.5 µA at light loads; constant-frequency mode maintains fixed 300 kHz switching for predictable EMI filtering - selectable per application need. |
| Configurable output voltage | 3.3 V ±4% for direct logic supply or 3.8 V preregulated output for downstream LDOs - improves overall system efficiency and voltage margin. |
| Thermally optimized PWP package | 20-pin TSSOP with exposed PowerPAD™ achieves RθJA = 178°C/W and 700 mW power rating at 25°C - supports 100 mA continuous operation without forced airflow. |
Applications
| Battery-Powered Microprocessor Systems | Portable Medical Instruments |
|---|---|
Use Scenario: Powering 3.3 V I/O and core rails of ARM Cortex-M or MSP430 microcontrollers from two AA/AAA cells in handheld diagnostic devices. IC Role / Device Role / Timing Role: Primary regulated step-up converter supplying stable 3.3 V with fast load transient response (<10 µs recovery) and shutdown isolation. Use Value: Enables >200-hour battery life via 50 µA quiescent current and 0.05 µA shutdown; eliminates inductor size penalty in compact enclosures. |
Use Scenario: Generating clean 3.3 V supply for precision analog front-ends (ECG amplifiers, ADC drivers) in portable patient monitors. IC Role / Device Role / Timing Role: Low-noise DC/DC source with <5 mVpp ripple in constant-frequency mode - avoids mixing artifacts in sub-µV signal chains. Use Value: Replaces noisy inductor-based converters; ceramic-only design prevents magnetic interference with sensitive biopotential measurements. |
| PDAs and Handheld Terminals | Cordless Phones and Wireless Sensors |
Use Scenario: Providing regulated 3.3 V for LCD backlight drivers, touch controllers, and flash memory in legacy PDA platforms. IC Role / Device Role / Timing Role: High-efficiency boost converter supporting pulsed 100 mA loads during display refresh or data transmission bursts. Use Value: Delivers 90% peak efficiency across 1.8–3.6 V input range; push-pull topology sustains regulation during rapid battery voltage sag. |
Use Scenario: Supplying 3.3 V to ultra-low-power BLE SoCs and MEMS sensors in battery-operated wireless nodes. IC Role / Device Role / Timing Role: Pulse-skip mode regulator minimizing average IQ to extend 10-year coin-cell lifetime; ENABLE pin enables MCU-controlled power cycling. Use Value: Achieves 0.05 µA shutdown leakage and 1 µA max output leakage - preserves battery capacity during multi-year standby. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar charge-pump DC/DC converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS60110PWP | Same PWP package and pinout; supports higher 150 mA output current but with 60 µA typical IQ and identical 3.3 V/3.8 V modes. | Preferred where sustained >100 mA load current is required, such as driving multiple peripheral ICs simultaneously. | Select TPS60110PWP if peak load exceeds 100 mA; verify thermal margin with 448 mW derated power at 70°C ambient. |
| MAX680ESA+ | 8-pin SOIC; fixed 5 V output; no mode-select pins; 100 mA output; 125 µA IQ; requires two external capacitors only. | Suitable for simpler 5 V rail generation where programmability and low IQ are secondary to footprint and cost. | Choose MAX680ESA+ for cost-sensitive, non-configurable 5 V boost needs; not drop-in compatible due to different pin count, voltage, and feature set. |
Compared with TPS60101PWP, TPS60110PWP offers higher current headroom at slightly higher quiescent draw, while MAX680ESA+ trades configurability and IQ for minimal BOM and fixed 5 V output - making TPS60101PWP optimal for 3.3 V–3.8 V battery-powered systems demanding balance of efficiency, noise, and flexibility.
Availability
TPS60101PWP is available at Aetrix Electronics and suitable for battery-powered microprocessor systems, portable medical instruments, PDAs, and cordless phones requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TPS60101PWP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-efficiency DC/DC conversion and battery-powered system solutions.
The TPS60101PWP belongs to TI's charge-pump DC/DC converter product line, designed specifically for space-constrained, low-noise, inductorless power conversion in portable and medical electronics where battery life and EMI compliance are critical.
FAQ
What is the maximum output current capability of the TPS60101PWP under typical conditions?
The TPS60101PWP delivers up to 100 mA output current when VIN = 2 V, with VO = 3.3 V ±4%. At higher input voltages (e.g., 2.4–3.6 V), it maintains this rating across temperature (−40°C to 85°C). The absolute maximum continuous output current is 150 mA, but operation beyond 100 mA requires careful thermal design due to power dissipation limits in the PWP package.
How does the TPS60101PWP achieve low output voltage ripple without inductors?
The TPS60101PWP uses a push-pull dual charge-pump architecture where two flying capacitors (C1F and C2F) operate 180° out of phase. This ensures continuous charge transfer to the output capacitor (CO), resulting in <5 mVpp ripple when CO = 22 µF X5R ceramic and SKIP = low. The absence of magnetic components eliminates inductor-related EMI and size penalties.
Can the TPS60101PWP generate both 3.3 V and 3.8 V outputs, and how is the selection made?
Yes, the TPS60101PWP supports both outputs: 3.3 V ±4% when 3V8 = logic low (0 V), and 3.8 V ±5.3% when 3V8 = VIN. This is implemented via internal resistor-divider reconfiguration and does not require external components. The 3.8 V mode is intended for preregulation ahead of an LDO to improve overall system accuracy and PSRR.
What are the key differences between pulse-skip mode and constant-frequency mode in the TPS60101PWP?
In pulse-skip mode (SKIP = high), the TPS60101PWP halts switching when VO ≥ 3.3 V, reducing IQ to 1.5 µA - ideal for light-load battery longevity. In constant-frequency mode (SKIP = low), it switches continuously at ~300 kHz, minimizing ripple (<5 mVpp) and enabling predictable EMI filtering, though IQ rises to 50 µA. Both modes retain full 100 mA capability.
Is the TPS60101PWP pin-compatible with other devices in the TPS601xx family?
Yes, the TPS60101PWP shares identical pinout, package (PWP), and functional pin assignments with TPS60110PWP and TPS60120PWP. Differences lie in output current rating (100 mA vs. 150 mA vs. 250 mA) and quiescent current - allowing direct upgrade paths without PCB redesign, provided thermal and layout margins accommodate higher current variants.
TPS60101PWP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Function:
- Step-Up
- Output Configuration:
- Positive
- Topology:
- Charge Pump
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 1.8V
- Voltage - Input (Max):
- 3.6V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Current - Output:
- 100mA
- Frequency - Switching:
- 300kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-HTSSOP
TPS60101PWP FAQ
1.How can I place an order for TPS60101PWP through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS60101PWP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS60101PWP reliable?
The price and inventory of TPS60101PWP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS60101PWP is usually 5 days.
3.What payment methods are accepted for TPS60101PWP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS60101PWP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS60101PWP?
TPS60101PWP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS60101PWP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS60101PWP?
For technical support, including TPS60101PWP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS60101PWP requirements.
6.How does Aetrix verify that TPS60101PWP is sourced from the original manufacturer or authorized distributors?
All TPS60101PWP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS60101PWP meets industry standards.
7.What is the process for return or replacement of TPS60101PWP?
All TPS60101PWP units undergo pre-shipment inspection (PSI). If there is an issue with TPS60101PWP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS60101PWP part is unused and in its original packaging.
Return procedure for TPS60101PWP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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