Texas Instruments TPS60120PWP
- Part No.:
- TPS60120PWP
- Manufacturer:
- Texas Instruments
- Package:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS60120PWP.pdf
- Description:
- IC REG CHARGE PUMP 3.3V 20HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:490
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Product details
Overview
TPS60120PWP from Texas Instruments is a regulated 200-mA, 3.3-V ±4% charge-pump DC/DC converter in a 20-pin PowerPAD (PWP) package. It operates from 1.8-V to 3.6-V input (e.g., two alkaline/NiMH cells), delivers ≥200 mA at 3.3 V, features adaptive 1.5×/2× mode switching, and integrates low-battery detection (LBI/LBO) for portable medical and handheld instrumentation.
For engineers reviewing the TPS60120PWP datasheet, TPS60120PWP pinout, TPS60120PWP application, or TPS60120PWP equivalent, this page provides verified specifications, validated pin functions, confirmed thermal package mapping, real-world efficiency curves across load/input conditions, and two rigorously cross-checked alternative parts with documented functional and application-level differences.
Technical Context
The TPS60120PWP implements ACTIVE-CYCLE regulation with pulse-skip mode at light loads and fixed-frequency operation at full load, enabling both low quiescent current (55 µA) and stable output ripple. Its dual single-ended charge-pump architecture automatically selects between 1.5× and 2× conversion ratios based on input voltage and load current to maintain high efficiency across 1.8–3.6 V.
It integrates a 1.21-V bandgap reference, internal resistive feedback divider, shutdown/start-up control with 0.05-µA shutdown current, and a dedicated low-battery comparator (LBI input, LBO open-drain output). The device includes undervoltage lockout (1.6 V threshold) and short-circuit current limiting (115 mA).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | 3.3 V ±4% - tightly regulated rail for microprocessor I/O or analog subsystems without external feedback resistors. |
| Max Output Current | 200 mA continuous - supports moderate-power peripherals like LCD bias, RF front-end, or sensor signal chains. |
| Input Voltage Range | 1.8 V to 3.6 V - matches nominal voltage of two alkaline, NiCd, or NiMH cells across full discharge curve. |
| Quiescent Current | 55 µA typical - extends battery life in always-on monitoring applications such as glucose meters. |
| Shutdown Current | 0.05 µA typical - isolates load and minimizes standby drain in sleep-mode portable devices. |
| Switching Frequency | 210–450 kHz - enables use of small ceramic flying capacitors (2.2 µF) and avoids audible noise. |
| Efficiency Peak | ≥90% at 2.4 V input / 164 mA load - reduces thermal stress in space-constrained PDA or organizer designs. |
Pinout & Package
The TPS60120PWP is housed in a thermally enhanced 20-pin PowerPAD (PWP) TSSOP package with an exposed thermal pad for PCB heat sinking. Pin numbering follows standard top-view orientation with Pin 1 at bottom-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1, 2, 19, 20) | Analog ground reference | Provides low-noise return path for internal bandgap and error amplifier; must be short-traced to PGND. |
| IN (Pins 7, 14) | Input power supply | Accepts 1.8–3.6 V battery input; dual pins reduce trace resistance and improve current handling. |
| OUT (Pins 5, 16) | Regulated 3.3-V output | Delivers up to 200 mA; dual pins minimize IR drop and support high-current local decoupling. |
| ENABLE (Pin 3) | Logic-controlled enable | Active-high input; drives device into 0.05-µA shutdown when low, disconnecting load from input. |
| FB (Pin 4) | Feedback input | Internally tied to 1.21-V reference; connect directly to OUT near load for optimal regulation accuracy. |
| LBI (Pin 18) | Low-battery detector input | Compares external resistor-divider voltage to 1.21 V; used only on TPS60120/122/124 variants. |
| LBO (Pin 17) | Low-battery open-drain output | Sinks 1 mA when triggered; requires external 100-kΩ–1-MΩ pullup to OUT for logic-level signaling. |
| C1+, C1− (Pins 6, 8) | Flying capacitor terminals | Form first charge-pump stage; require low-ESR 2.2-µF ceramic capacitors for efficient energy transfer. |
| C2+, C2− (Pins 15, 13) | Flying capacitor terminals | Form second charge-pump stage; identical capacitor requirements as C1 pair. |
| PGND (Pins 9–12) | Power ground | Carries high-switching currents from charge-pump MOSFETs; must be solidly connected to thermal pad. |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive 1.5×/2× mode switching | Automatically selects optimal conversion ratio based on VI and IL to sustain >85% efficiency from 1.8 V to 3.6 V. |
| Integrated low-battery detection | On-chip 1.21-V comparator with programmable trip point via external resistor divider (±6% total accuracy). |
| No-inductor architecture | Eliminates magnetic EMI concerns and board area for inductors; uses only four ceramic capacitors for full solution. |
| Pulse-skip light-load regulation | Reduces IQ to 55 µA while maintaining <10-mV output ripple, extending runtime in intermittent-use devices. |
| Thermally enhanced PWP package | 20-pin PowerPAD with exposed copper pad achieves RθJA = 178°C/W, supporting 448 mW at 70°C ambient. |
Applications
| Battery-Powered Microprocessor Systems | Medical Instruments (e.g., Glucose Meters) |
|---|---|
Use Scenario: Powering 3.3-V ARM Cortex-M0+ MCU and peripheral sensors from two AA alkaline cells. IC Role / Device Role / Timing Role: Primary regulated 3.3-V supply with integrated low-battery warning to trigger UI alerts before cell depletion. Use Value: Eliminates need for external LDO or discrete comparator; maintains regulation down to 1.8 V input while drawing only 55 µA quiescent current. |
Use Scenario: Providing stable 3.3-V rail for electrochemical sensor interface and LCD display in handheld glucose meter. IC Role / Device Role / Timing Role: High-efficiency charge pump delivering 200 mA peak during measurement burst, with shutdown isolation during standby. Use Value: Achieves >90% efficiency at 2.4 V/164 mA, minimizing self-heating that could affect sensor accuracy in compact enclosure. |
| Portable Instruments | PDAs and Organizers |
Use Scenario: Supplying 3.3-V logic and analog rails in handheld multimeter with backlight and serial interface. IC Role / Device Role / Timing Role: Regulated DC/DC converter with adaptive mode switching to sustain performance across battery discharge from 3.2 V to 2.0 V. Use Value: Maintains ±4% output regulation and <10-mV ripple without inductor, reducing EMI interference with sensitive analog front-end. |
Use Scenario: Generating 3.3-V system rail in PDA with flash memory, touchscreen controller, and USB PHY. IC Role / Device Role / Timing Role: Compact, capacitor-only DC/DC solution supporting 200 mA peak loads during data transfer bursts. Use Value: Enables use of 2.2-µF ceramic flying caps instead of bulky inductors, saving >25 mm² PCB area in tight layout. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar regulated charge-pump DC/DC converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS60124PWP | 3-V ±4% output (vs. 3.3 V); same 200-mA rating, LBI/LBO, and PWP package. | Targeted at 3-V logic systems (e.g., older microcontrollers, specific sensor ICs) rather than 3.3-V domains. | Select when system requires precisely 3.0 V output and compatibility with existing 3-V design constraints. |
| MAX680ESA+ | Fixed 2× doubler (no adaptive 1.5× mode); 100-mA output; SO-8 package; no integrated LBI/LBO. | Lacks low-battery detection and delivers half the current; suited for simpler, lower-power applications where efficiency over wide VI is secondary. | Choose only if board space is extremely limited (SO-8 vs. PWP), load ≤100 mA, and battery monitoring is handled externally. |
Compared with TPS60124PWP, the TPS60120PWP provides higher output voltage for modern 3.3-V interfaces but requires different feedback network if reusing 3-V reference designs; compared with MAX680ESA+, it offers double the current, adaptive efficiency optimization, and integrated monitoring-justifying its larger PWP footprint in mid-complexity portable systems.
Availability
TPS60120PWP is available at Aetrix Electronics and suitable for battery-powered microprocessor systems, medical instruments (e.g., glucose meters), and portable instrumentation requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for TPS60120PWP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-efficiency DC/DC conversion.
The TPS6012x family was designed specifically for space-constrained, battery-powered applications requiring regulated output without inductors-targeting PDAs, medical handhelds, and portable test equipment where size, EMI, and battery life are critical.
FAQ
What is the output voltage tolerance and regulation method of the TPS60120PWP?
The TPS60120PWP delivers a regulated 3.3-V output with ±4% tolerance over temperature, line, and load. It uses ACTIVE-CYCLE regulation: at heavy loads, it modulates internal MOSFET on-resistance at fixed frequency; at light loads, it enters pulse-skip mode to maintain regulation while minimizing quiescent current to 55 µA. This dual-mode approach ensures stable output voltage across 1.8–3.6 V input and 0–200 mA load.
Does the TPS60120PWP require external feedback resistors to set output voltage?
No, the TPS60120PWP does not require external feedback resistors. Its 3.3-V output is internally regulated using a precision 1.21-V bandgap reference and a fixed internal resistive divider. The FB pin is connected directly to the OUT pin near the load to compensate for trace IR drop and ensure accurate regulation at the point of load.
How does the low-battery detection function work on the TPS60120PWP?
The TPS60120PWP includes an integrated low-battery comparator that compares the voltage at the LBI pin to an internal 1.21-V reference. A resistor divider from input (IN) to ground sets the trip point-for example, 1.8 V input triggers LBO when LBI reaches 1.21 V. LBO is an open-drain output requiring a 100-kΩ–1-MΩ pullup to OUT. During startup, LBO is invalid for the first 500 µs.
What is the thermal performance of the TPS60120PWP in its PWP package?
The TPS60120PWP in the 20-pin PowerPAD (PWP) package has a junction-to-ambient thermal resistance (RθJA) of 178°C/W. At 70°C ambient, it supports 448 mW continuous power dissipation; at 85°C ambient, derated to 364 mW. The exposed thermal pad must be soldered to a large PCB copper area for effective heat transfer, enabling reliable operation up to 125°C junction temperature.
Can the TPS60120PWP be used with input voltages below 1.8 V?
No, the TPS60120PWP has a minimum operating input voltage of 1.8 V and an undervoltage lockout (UVLO) threshold of 1.6 V (typical). Below 1.8 V, the device cannot start or sustain regulation. At input voltages below UVLO, the IC shuts down completely, drawing only 0.05 µA and disconnecting the load from the input. It will not operate or deliver regulated output below 1.8 V.
TPS60120PWP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Function:
- Step-Up
- Output Configuration:
- Positive
- Topology:
- Charge Pump
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 1.8V
- Voltage - Input (Max):
- 3.6V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Current - Output:
- 200mA
- Frequency - Switching:
- 320kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-HTSSOP
TPS60120PWP FAQ
1.How can I place an order for TPS60120PWP through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS60120PWP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS60120PWP reliable?
The price and inventory of TPS60120PWP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS60120PWP is usually 5 days.
3.What payment methods are accepted for TPS60120PWP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS60120PWP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS60120PWP?
TPS60120PWP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS60120PWP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS60120PWP?
For technical support, including TPS60120PWP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS60120PWP requirements.
6.How does Aetrix verify that TPS60120PWP is sourced from the original manufacturer or authorized distributors?
All TPS60120PWP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS60120PWP meets industry standards.
7.What is the process for return or replacement of TPS60120PWP?
All TPS60120PWP units undergo pre-shipment inspection (PSI). If there is an issue with TPS60120PWP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS60120PWP part is unused and in its original packaging.
Return procedure for TPS60120PWP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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