Texas Instruments TPS61086DRCT
- Part No.:
- TPS61086DRCT
- Manufacturer:
- Texas Instruments
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TPS61086DRCT.pdf
- Description:
- IC REG BOOST ADJ 2A 10VSON
- Quantity:
- Payment:

- Shipping:

Inventory:111
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS61086DRCT from Texas Instruments is a 10-pin VSON synchronous boost DC-DC converter with integrated 2.0-A/0.13-Ω N-channel MOSFET, 1.2-MHz fixed-frequency PWM control, and PFM/PWM mode selection via MODE pin. It delivers up to 18.5-V output from 2.3–6.0-V input and supports handheld GPS receivers requiring stable 12-V bias under variable battery conditions.
For engineers reviewing the TPS61086DRCT datasheet, TPS61086DRCT pinout, TPS61086DRCT application, or TPS61086DRCT equivalent, key selection considerations include its externally compensated current-mode architecture, adjustable soft-start (SS pin), thermal shutdown (150°C), undervoltage lockout (2.3-V threshold), and dual-mode operation for efficiency vs. noise trade-offs in portable power systems.
Technical Context
The TPS61086DRCT implements a current-mode, quasi-constant-frequency boost topology with adaptive off-time control, enabling superior line and load transient response. Its transconductance error amplifier (107 μA/V) interfaces with external RCOMP/CCOMP for stability tuning across varying output voltages and inductor values.
Operation spans two distinct functional modes: PFM at light loads (inductor peak current < 0.6 A) for >90% efficiency down to 1 mA, and forced PWM (MODE = high) for fixed 1.2-MHz switching and predictable EMI filtering. Feedback regulation targets 1.238 V ±0.008 V at FB, supporting precise output voltage setting via resistor divider.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.3 V to 6.0 V - Supports single-cell Li-ion (2.7–4.2 V) and 3.3-V rail with 0.4-V headroom margin. |
| Output Voltage Range | Up to 18.5 V - Enables TFT LCD bias, DSL modem line drivers, and 12-V peripheral powering from low-voltage sources. |
| Switch Current Limit | 2.0 A min / 3.2 A max - Sustains 500-mA output at 12 V with >90% efficiency using 3.3-μH inductor and PMEG2010AEH diode. |
| Switching Frequency | 1.2 MHz (±0.3 MHz) - Permits use of compact 3.3-μH shielded inductors and reduces output capacitor ESR requirements. |
| Feedback Reference | 1.238 V ±0.008 V - Enables accurate output setting (e.g., 12 V via 156-kΩ/18-kΩ divider) with <0.11%/A load regulation. |
| Quiescent Current | 75–100 μA - Maintains ultra-low standby power in always-on GPS or camera modules during sleep states. |
| Thermal Shutdown | 150°C activation / 136°C hysteresis - Protects PCB layout with 29.6°C/W junction-to-board thermal resistance in VSON-10 package. |
Pinout & Package
TPS61086DRCT uses a 3.00 mm × 3.00 mm, 10-pin VSON package with exposed thermal pad (PGND-connected) for enhanced power dissipation. Pin 1 is COMP; pin 10 is SS. The thermal pad must be soldered to PCB ground plane per TI layout guidelines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| COMP (1) | Error amplifier output | Connects to external RCOMP/CCOMP network (e.g., 68 kΩ/1.2 nF) to stabilize loop response for 12-V/500-mA designs. |
| FB (2) | Voltage feedback input | Senses output via resistor divider; 1.238-V reference enables precise output programming with <0.5% tolerance. |
| EN (3) | Enable control | Logic-high (>2 V) enables converter; logic-low (<0.5 V) reduces IN supply current to 1 μA for system-level power gating. |
| AGND (4) | Analog ground reference | Separate from PGND to minimize noise coupling into feedback and compensation paths; connects to quiet ground plane. |
| PGND (5) | Power ground return | High-current return path for switch node and thermal pad; must tie directly to AGND at single point near IC. |
| SW (6) | Switch node | Drives external Schottky diode (e.g., PMEG2010AEH); handles 2-A peak current with 0.13-Ω on-resistance at 5 V. |
| IN (7) | Input supply | Accepts 2.3–6.0 V; requires local 1-μF ceramic bypass + 10-μF bulk capacitor within 3 mm of pin for EMI suppression. |
| MODE (8) | Operating mode select | Pull high for forced PWM (fixed 1.2-MHz); pull low for PFM (variable frequency, >90% efficiency at 1–10 mA loads). |
| SS (9) | Soft-start control | Connect 100-nF capacitor to limit inrush current; ramps internal current limit from 0 A to full scale over ~10 ms. |
| Thermal Pad (10) | Junction heat sink | Exposed copper pad tied to PGND; provides 15.6°C/W junction-to-case (bottom) thermal path for 2-W continuous operation. |
Key Features
| Feature | Design Value |
|---|---|
| Adjustable Soft-Start | 100-nF capacitor on SS pin limits peak inductor current ramp rate, preventing input rail collapse during startup in battery-powered cameras. |
| External Compensation | RCOMP/CCOMP network (e.g., 68 kΩ/1.2 nF) optimizes phase margin for specific L/C combinations-critical for stable 12-V/500-mA DSL modem supplies. |
| Dual-Mode Control | PFM at light loads preserves >92% efficiency down to 1 mA; forced PWM eliminates subharmonic noise in GPS RF sections requiring clean 12-V bias. |
| Integrated 2.0-A Switch | 0.13-Ω on-resistance at 5 V enables high-efficiency 12-V boost from 3.3-V input without external MOSFET, reducing BOM count by 2 components. |
| Robust Protection | UVLO (2.3-V turn-on), thermal shutdown (150°C), and overvoltage detection (FB >1.275 V) prevent damage during brownout, overload, or feedback fault conditions. |
Applications
| Handheld GPS Receivers | Digital Still Cameras |
|---|---|
Use Scenario: Providing regulated 12-V bias to GPS front-end LNA and IF amplifiers from a 3.3-V system rail during cold-start acquisition. IC Role / Device Role / Timing Role: Primary boost regulator managing dynamic load steps (10–100 mA) while maintaining <50-mV output ripple. Use Value: PFM mode sustains >91% efficiency at 15-mA standby current; forced PWM eliminates switching noise near 1.575-GHz GPS band. |
Use Scenario: Generating 18.5-V flash capacitor charging supply from a single-cell Li-ion battery (2.7–4.2 V) in compact point-and-shoot cameras. IC Role / Device Role / Timing Role: High-current boost controller delivering 1.2-A peak charge pulses with controlled inrush via SS pin. Use Value: 2.0-A switch and 0.13-Ω RDS(on) enable full flash charge in <2 s; thermal shutdown prevents overheating during repeated burst mode. |
| TFT LCD Bias Supply | DSL Modem Line Drivers |
Use Scenario: Powering positive (VPOS) and negative (VNEG) LCD bias rails (±15 V) in automotive infotainment displays using dual TPS61086DRCT configurations. IC Role / Device Role / Timing Role: Precision voltage generator with 1.238-V reference and <0.11%/A load regulation ensuring stable contrast across temperature. Use Value: External compensation allows optimization for 4.7-μH inductors and 22-μF ceramic outputs, minimizing ripple to <20 mVpp. |
Use Scenario: Delivering 12-V analog line driver supply in ADSL2+ modems where EMI must meet Class B FCC limits without added shielding. IC Role / Device Role / Timing Role: Noise-sensitive power stage operating in forced PWM mode with 1.2-MHz fundamental frequency placed outside critical 30–100 MHz bands. Use Value: Fixed frequency enables simple LC filter design; 54.7°C/W RθJA ensures reliable operation at 60°C ambient with 400-mA continuous load. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar boost converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS61085DRCT | Lower 1.8-A switch current limit; identical 1.2-MHz frequency, 2.3–6.0-V input, and VSON-10 package. | Supports ≤400-mA 12-V outputs; unsuitable for 500-mA DSL line drivers or flash charging requiring 2.0-A peak. | Select when load current stays below 400 mA and cost reduction is prioritized over margin. |
| MAX17062ETA+ | 2.0-A switch, but 2.5-MHz switching frequency; different pinout (12-pin TDFN); no MODE pin for PFM/PWM selection. | Requires redesign of compensation and layout; lacks programmable soft-start and thermal shutdown hysteresis. | Choose only if higher frequency (smaller L/C) justifies full schematic/layout revision and loss of PFM efficiency. |
Compared with TPS61086DRCT, TPS61085DRCT offers identical features at reduced current capability-ideal for lower-power GPS modules-while MAX17062ETA+ trades pin compatibility and PFM flexibility for higher switching frequency, demanding full revalidation.
Availability
TPS61086DRCT is available at Aetrix Electronics and suitable for handheld GPS receivers, digital still cameras, TFT LCD bias supplies, and DSL modem line drivers requiring stable component supply with guaranteed long-term sourcing.
Supply support for TPS61086DRCT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with over 50 years of power management innovation.
The TPS61086DRCT belongs to TI's high-efficiency boost converter product line, designed specifically for space-constrained portable electronics needing regulated high-voltage outputs from single-cell batteries or low-voltage rails.
FAQ
What is the minimum input voltage required for TPS61086DRCT to start switching?
The TPS61086DRCT incorporates an undervoltage lockout (UVLO) circuit that disables operation when VIN falls below 2.2 V (falling) and re-enables at 2.3 V (rising). Therefore, the device requires ≥2.3 V on the IN pin to initiate switching. Below this threshold, EN remains inactive regardless of logic level, ensuring reliable startup from partially discharged Li-ion cells or noisy 3.3-V rails.
How does the MODE pin affect efficiency and noise performance in TPS61086DRCT?
When MODE is pulled low, TPS61086DRCT operates in Power Save Mode (PFM), skipping pulses at light loads to maintain >90% efficiency down to 1 mA-but generating variable-frequency noise. When MODE is pulled high, it forces continuous PWM at 1.2 MHz, sacrificing light-load efficiency for predictable EMI spectrum and easier filtering in noise-sensitive GPS or audio applications.
Can TPS61086DRCT generate 18.5 V output from a 2.5-V input, and what limits this capability?
Yes, TPS61086DRCT supports up to 18.5-V output from 2.5-V input, limited by its 2.0-A minimum switch current rating, 0.13-Ω RDS(on), and thermal design. At 2.5-V input and 18.5-V/200-mA output, efficiency drops to ~82%; sustained operation requires adequate PCB copper area on the thermal pad and <30°C ambient to avoid thermal shutdown activation at 150°C junction temperature.
What is the purpose of the SS pin on TPS61086DRCT, and how is it configured?
The SS (soft-start) pin on TPS61086DRCT controls inrush current during startup by ramping the internal current limit from 0 A to full scale. A 100-nF capacitor between SS and GND provides ~10-ms soft-start time; the internal 10-μA current source charges the capacitor until output reaches 90% of target voltage. Leaving SS open disables soft-start, risking input rail sag in battery-powered systems.
Does TPS61086DRCT require external compensation components, and why?
Yes, TPS61086DRCT requires external RCOMP and CCOMP on the COMP pin because its transconductance error amplifier is intentionally uncompensated. This allows designers to tailor loop stability for specific output voltages, inductor values (e.g., 3.3 μH vs. 4.7 μH), and capacitor ESR-critical for maintaining phase margin in 12-V/500-mA DSL modem supplies or 18.5-V flash chargers.
TPS61086DRCT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Up
- Output Configuration:
- Positive
- Topology:
- Boost
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.3V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 2.8V
- Voltage - Output (Max):
- 18.5V
- Current - Output:
- 2A (Switch)
- Frequency - Switching:
- 1.2MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSON (3x3)
TPS61086DRCT FAQ
1.How can I place an order for TPS61086DRCT through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS61086DRCT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS61086DRCT reliable?
The price and inventory of TPS61086DRCT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS61086DRCT is usually 5 days.
3.What payment methods are accepted for TPS61086DRCT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS61086DRCT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS61086DRCT?
TPS61086DRCT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS61086DRCT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS61086DRCT?
For technical support, including TPS61086DRCT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS61086DRCT requirements.
6.How does Aetrix verify that TPS61086DRCT is sourced from the original manufacturer or authorized distributors?
All TPS61086DRCT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS61086DRCT meets industry standards.
7.What is the process for return or replacement of TPS61086DRCT?
All TPS61086DRCT units undergo pre-shipment inspection (PSI). If there is an issue with TPS61086DRCT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS61086DRCT part is unused and in its original packaging.
Return procedure for TPS61086DRCT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS61086DRCT Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

