Texas Instruments TPS61280DYFFR

Overview

TPS61280DYFFR from Texas Instruments is a low-quiescent-current, wide-input-voltage DC/DC battery front-end converter optimized for single-cell Li-ion, Ni-rich, and silicon-anode batteries in smartphones and tablets. It integrates synchronous boost and true pass-through modes, delivers ≥4-A peak output current at 3.35 V, operates at 2.3 MHz, and achieves 95% efficiency with 3-µA shutdown current.

For engineers reviewing the TPS61280DYFFR datasheet, TPS61280DYFFR pinout, TPS61280DYFFR application, or TPS61280DYFFR equivalent, key selection criteria include its I²C programmability, in-situ E²PROM customization, dual-mode (boost/bypass) transition logic, and sub-1-mm profile DSBGA package enabling <20 mm² total solution size.

Technical Context

The TPS61280DYFFR implements a synchronous boost architecture with integrated high-side and low-side MOSFETs (rDS(on) ≤ 70 mΩ and ≤ 80 mΩ respectively) and a dedicated 35-mΩ pass-through FET. Its control loop supports seamless auto-transition between bypass and boost modes based on VSEL-set thresholds (3.15 V or 3.35 V), enabling full battery capacity utilization down to 2.3 V input.

It features dual operating modes: PFM for light-load efficiency (<30 mVpk ripple at 1 mA) and forced-PWM for low-noise operation, selectable via GPIO or MODE pin. The device includes thermal shutdown (140–160°C), overcurrent protection, and I²C interface supporting up to 3.4 Mbps high-speed mode with write-protected on-chip E²PROM for runtime configuration.

Key Specifications

Pinout & Package

TPS61280DYFFR uses a 16-bump DSBGA (YFF) package with 1.66 mm × 1.66 mm body size and 0.4-mm pitch. Thermal performance is enhanced by three PGND bumps and dedicated AGND bump for analog reference stability.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar battery front-end DC/DC converter applications.

Compared with TPS61280DYFFR, TPS61282DYFFR removes programmability but simplifies control; TPS61280EYFFR upgrades I/O voltage compatibility and current capability at the cost of reduced VSEL granularity - all three share identical DSBGA-16 packaging and thermal design.

Availability

TPS61280DYFFR is available at Aetrix Electronics and suitable for smartphone power management, tablet PC battery interface, and Ni-rich/Si-anode portable electronics requiring stable component supply with guaranteed long-term manufacturability.

Supply support for TPS61280DYFFR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in high-efficiency power conversion.

The TPS6128x series was designed specifically for advanced single-cell battery systems in premium mobile devices, addressing the voltage, current, and footprint challenges of Ni-rich cathodes and silicon anodes.

FAQ

What is the maximum peak output current supported by the TPS61280DYFFR?

The TPS61280DYFFR delivers ≥4-A peak output current at VOUT = 3.35 V with VIN ≥ 2.65 V, verified under production test conditions across –40°C to 125°C junction temperature. This rating applies during short-duration pulses (e.g., RF transmit bursts) and is enabled by its low 35-mΩ pass-through FET and robust 2.3-MHz synchronous boost stage. The TPS61280DYFFR maintains this capability even as battery voltage declines to 2.65 V, ensuring uninterrupted system operation.

How does the TPS61280DYFFR manage transition between boost and pass-through modes?

The TPS61280DYFFR uses the VSEL pin to set the DC/DC boost-to-pass-through threshold at either 3.15 V (VSEL = low) or 3.35 V (VSEL = high). When VIN exceeds the selected threshold, it engages the low-loss pass-through path; when VIN falls below, it seamlessly transitions to synchronous boost mode without output disruption. This behavior is fully autonomous and requires no host intervention - the TPS61280DYFFR handles all timing, sequencing, and regulation internally.

Does the TPS61280DYFFR support I²C communication at standard speeds?

Yes, the TPS61280DYFFR supports I²C communication across all standard modes: 100 kHz (standard), 400 kHz (fast), and 1 MHz (fast-mode plus), as well as high-speed mode up to 3.4 Mbps. Its SCL/SDA pins meet JEDEC JESD8-12E voltage specifications (VIH = 1.2 V, VIL = 0.4 V) and include internal pull-down resistors (300 kΩ) for robust bus initialization. All register access and E²PROM writes for the TPS61280DYFFR occur over this interface.

What thermal protection mechanisms are built into the TPS61280DYFFR?

The TPS61280DYFFR incorporates thermal shutdown activation between 140°C and 160°C, plus a hot-die detector accurate to ±10°C. Upon thermal fault detection, it disables switching, asserts the GPIO pin as open-drain FAULT signal, and enters low-power state with <6.6 µA consumption. Recovery is automatic once junction temperature falls below hysteresis threshold. The DSBGA-16 package provides RθJA = 78°C/W and RθJB = 13°C/W, enabling reliable operation under 4-A pulsed loads with standard PCB copper pour.

Can the TPS61280DYFFR operate with a 1.2-V I/O supply?

No - the TPS61280DYFFR requires 1.8-V logic levels on EN, VSEL, nBYP, SCL, and SDA pins (VIH = 1.2 V min, VIL = 0.4 V max). For 1.2-V I/O systems, TI specifies the pin-compatible TPS61280EYFFR variant, which supports VIH = 0.84 V and VIL = 0.36 V. Using the TPS61280DYFFR with 1.2-V signals risks unreliable register access, incorrect mode selection, and potential startup failure - always verify logic thresholds before integration.