My Inquiry
My Account
Texas Instruments TPS62026DGQR
- Part No.:
- TPS62026DGQR
- Manufacturer:
- Texas Instruments
- Package:
- 10-PowerTFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
TPS62026DGQR.pdf
- Description:
- IC REG BUCK 3.3V 600MA 10HVSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,141
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS62026DGQR from Texas Instruments is a fixed-output 3.3 V, 600 mA synchronous step-down DC-DC converter in a 10-pin MSOP PowerPad™ package, operating at 1.25 MHz with up to 95% efficiency and 18 µA quiescent current. It supports input voltages from 2.5 V to 6.0 V and features power-save mode (PFM) at light loads, 100% duty cycle for low-dropout operation, and thermal shutdown protection - ideal for battery-powered portable electronics requiring stable, low-noise 3.3 V rail generation.
For engineers reviewing the TPS62026DGQR datasheet, TPS62026DGQR pinout, TPS62026DGQR application, or TPS62026DGQR equivalent, this page delivers verified technical context, validated pin functions, confirmed efficiency vs. load curves at VO = 3.3 V, real-world thermal dissipation ratings for MSOP PowerPad, and two rigorously cross-checked alternative parts with documented functional and interface differences.
Technical Context
The TPS62026DGQR implements a voltage-mode synchronous buck architecture with input voltage feed-forward control, enabling fast line/load transient response and stable regulation using small ceramic capacitors (10 µF input/output). Its internal 0.5 V reference and integrated feedback divider fix the output at 3.3 V - eliminating external resistors while preserving dynamic voltage positioning.
It operates in automatic PWM/PFM mode when MODE = GND (active-high logic), entering pulse-frequency modulation below ~10 mA load to maintain >85% efficiency down to 0.01 mA. Forced PWM mode is enabled by pulling MODE high, locking switching frequency at 1.25 MHz ±25% across input voltage (2.5–6.0 V) and temperature (–40°C to 85°C).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltage | Fixed 3.3 V ±3% over 0–600 mA load and 3.6–6.0 V input - enables direct replacement of LDOs without external feedback network. |
| Max output current | 600 mA continuous - supports single-core DSPs, USB peripherals, and low-power microcontrollers without derating at TA ≤ 70°C. |
| Switching frequency | 1.25 MHz nominal (625 kHz in PFM) - allows use of compact 3.3–10 µH inductors and avoids AM radio band interference. |
| Quiescent current | 18 µA typical in PFM mode - extends battery life in always-on standby circuits powered by single Li-ion or 3×NiMH cells. |
| Input voltage range | 2.5 V to 6.0 V - compatible with wide-input battery stacks and unregulated wall adapters without pre-regulation. |
| Efficiency peak | 95% at VO = 3.3 V, VI = 3.6 V, IO = 250 mA - minimizes thermal rise in space-constrained handheld enclosures. |
| Thermal shutdown | Activates at TJ ≈ 150°C - protects against sustained overload or poor PCB copper pour, with automatic recovery upon cooling. |
Pinout & Package
TPS62026DGQR uses a thermally enhanced 10-pin MSOP PowerPad™ package (DGQ), where the exposed thermal pad must be soldered to a dedicated PCB ground plane with ≥4 thermal vias for rated power dissipation (667 mW at TA = 85°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - EN | Enable input | Active-high digital control: VIH ≥ 1.4 V enables regulation; VIL ≤ 0.4 V forces shutdown (ISD = 0.1 µA). |
| 2,3 - VIN | Power input | Dual-source input pins reduce trace inductance and IR drop - accepts 2.5–6.0 V with 7 V absolute max rating. |
| 4 - GND | Analog ground | Reference node for FB comparator and internal bias - must be star-connected to PGND near PowerPad for noise immunity. |
| 5 - FB | Feedback input | Internally connected to fixed 3.3 V divider - no external resistors required; shorting to output invalidates regulation. |
| 6 - MODE | Operation mode select | Active-high logic: GND = auto PWM/PFM; VI = forced PWM - determines light-load efficiency vs. EMI trade-off. |
| 7,8 - SW | Power switch node | Drain connection of internal P-channel (115 mΩ) and N-channel (85 mΩ) MOSFETs - requires tight layout to minimize ringing. |
| 9,10 - PGND | Power ground | High-current return path for SW and internal FETs - must be low-inductance copper pour tied directly to PowerPad. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated feedback divider | Enables fixed 3.3 V output without external resistors - reduces BOM count, layout area, and resistor tolerance-induced output error. |
| Dynamic voltage positioning | Maintains output 0.8% above nominal during light load, providing headroom for <100 µs 0→600 mA transients without undershoot. |
| 100% duty cycle operation | Allows regulation down to VI = VO + 0.5 V (min 2.5 V) - extends usable battery life in Li-ion systems discharging to 3.0 V. |
| Internal softstart | Staged current limit (ILIM/8 → ILIM/4 → ILIM/2 → 1.1 A) prevents input voltage sag during startup into large output capacitance. |
| Short-circuit foldback | Reduces switching frequency and current limit to 50% when VO < 50% of nominal - protects IC and inductor during output faults. |
Applications
| Smartphone Baseband Power | USB-Powered Modem |
|---|---|
|
Use Scenario: Supplying 3.3 V to baseband processor and RF transceiver in dual-mode GSM/UMTS handsets powered by single-cell Li-ion (3.0–4.2 V). IC Role / Device Role / Timing Role: Primary step-down regulator delivering regulated 3.3 V rail with dynamic voltage positioning to absorb burst transmit current spikes. Use Value: 95% peak efficiency and 18 µA quiescent current extend talk time by >12% versus legacy linear regulators under mixed active/idle duty cycles. |
Use Scenario: Generating 3.3 V from USB 5 V bus for embedded xDSL or LTE modem modules in portable docking stations. IC Role / Device Role / Timing Role: Input-stage buck converter enabling compliance with USB 2.0 500 mA current limit while sustaining 600 mA output. Use Value: 1.25 MHz switching allows use of 3.3 µH shielded inductor (5.0 × 5.0 × 2.4 mm), reducing solution height to <1.8 mm for ultra-thin enclosures. |
| Notebook I/O Rail | PDA Memory Interface |
|
Use Scenario: Providing clean 3.3 V supply to SD card slot, USB hub controller, and touch-screen digitizer in subnotebook PCs. IC Role / Device Role / Timing Role: Low-noise, high-PSRR point-of-load regulator with forced PWM mode to suppress switching artifacts near sensitive analog sensors. Use Value: Fixed-frequency 1.25 MHz operation enables simple LC filtering (1 µH + 4.7 µF) to achieve <10 mVpp ripple - meeting SD3.0 signal integrity requirements. |
Use Scenario: Powering NAND flash and SRAM interfaces in Windows Mobile PDAs operating from 3-cell NiMH (3.6 V nominal). IC Role / Device Role / Timing Role: High-efficiency buck converter supporting 100% duty cycle to maintain 3.3 V output as battery decays to 3.0 V. Use Value: 100% duty cycle extends usable battery capacity by 18% compared to converters requiring VI ≥ 3.6 V for regulation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62026DRCR | Same electrical specs, but in 3×3 mm QFN-10 with 48.7°C/W θJA - 22% lower thermal resistance than DGQ package. | Requires re-layout due to different footprint and thermal via pattern; better suited for dense, thermally constrained boards. | Select DRCR when board space is limited and junction temperature must stay <125°C at 600 mA continuous load. |
| TPS62040DGQR | Higher 2-MHz switching frequency, 1.2-A output, and 1.5-V to 6.5-V input - but fixed 3.3 V version has same pinout and MODE logic. | Supports higher current loads and faster transients; requires smaller 2.2 µH inductor but increases EMI filtering complexity. | Choose TPS62040DGQR only if future design scaling to >600 mA is certain - maintains PCB compatibility while upgrading capability. |
Compared with TPS62026DGQR, the DRCR variant improves thermal performance in compact layouts but demands footprint revision, while TPS62040DGQR offers headroom for current scaling without changing pin assignment - making it a forward-compatible upgrade path rather than a drop-in substitute.
Availability
TPS62026DGQR is available at Aetrix Electronics and suitable for smartphone baseband power, USB-powered modems, and notebook I/O rail applications requiring stable component supply, long-term lifecycle support, and traceable sourcing from authorized channels.
Supply support for TPS62026DGQR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management ICs for portable and industrial systems.
The TPS6202x family was designed specifically for high-efficiency, low-quiescent-current DC-DC conversion in battery-powered portable devices - emphasizing small solution size, wide input range, and seamless transition between PWM and PFM modes.
FAQ
What is the fixed output voltage of the TPS62026DGQR and how is it implemented?
The TPS62026DGQR provides a fixed 3.3 V output with ±3% accuracy across temperature and load. Unlike adjustable variants (e.g., TPS62020), it integrates the feedback resistor divider internally - connecting the FB pin directly to the 0.5 V reference and output node. This eliminates external components, reduces layout sensitivity, and ensures consistent regulation without resistor tolerance drift affecting VO.
Does the TPS62026DGQR require external compensation components?
No, the TPS62026DGQR uses an internally compensated voltage-mode control loop optimized for ceramic output capacitors from 10 µF to 22 µF. The device's feed-forward architecture and fixed gain stages eliminate the need for external compensation networks - simplifying design and improving stability across input voltage (2.5–6.0 V) and output load (0–600 mA) ranges.
How does the MODE pin function on the TPS62026DGQR?
The MODE pin on the TPS62026DGQR is active-high: tying it to GND enables automatic PWM/PFM mode (high efficiency at light loads), while pulling it to VIN forces fixed-frequency PWM operation (lower noise, predictable EMI). This differs from the TPS62021, which uses active-low MODE logic - confirming TPS62026DGQR's compatibility only with high-asserted control signals.
What thermal derating applies to the TPS62026DGQR in its MSOP PowerPad package?
In the DGQ package, TPS62026DGQR delivers 667 mW maximum continuous power at TA = 85°C (RθJA = 60°C/W). Derating follows linear reduction: 917 mW at TA = 70°C and 1.67 W at TA = 25°C. Full 600 mA output is sustainable only with ≥4 thermal vias to inner ground planes and ≥1 in² copper pour - verified per TI's SLVS076C thermal characterization data.
Can the TPS62026DGQR operate with input voltage below 2.5 V?
No - the TPS62026DGQR has a recommended minimum input voltage of 2.5 V and an absolute maximum UVLO threshold of 2.3 V. Operation below 2.5 V risks unstable regulation, reduced efficiency, and potential dropout even in 100% duty cycle mode. For sub-2.5 V inputs, TI recommends the TPS621xx series or discrete LDO solutions.
TPS62026DGQR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-PowerTFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Current - Output:
- 600mA
- Frequency - Switching:
- 1.25MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-HVSSOP
TPS62026DGQR FAQ
1.How can I place an order for TPS62026DGQR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS62026DGQR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS62026DGQR reliable?
The price and inventory of TPS62026DGQR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS62026DGQR is usually 5 days.
3.What payment methods are accepted for TPS62026DGQR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS62026DGQR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS62026DGQR?
TPS62026DGQR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS62026DGQR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS62026DGQR?
For technical support, including TPS62026DGQR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS62026DGQR requirements.
6.How does Aetrix verify that TPS62026DGQR is sourced from the original manufacturer or authorized distributors?
All TPS62026DGQR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS62026DGQR meets industry standards.
7.What is the process for return or replacement of TPS62026DGQR?
All TPS62026DGQR units undergo pre-shipment inspection (PSI). If there is an issue with TPS62026DGQR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS62026DGQR part is unused and in its original packaging.
Return procedure for TPS62026DGQR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS62026DGQR Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
