Texas Instruments TPS62052DGS
- Part No.:
- TPS62052DGS
- Manufacturer:
- Texas Instruments
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
TPS62052DGS.pdf
- Description:
- IC REG BUCK 1.5V 800MA 10VSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS62052DGS from Texas Instruments is a fixed-output 1.5 V, 800-mA synchronous step-down DC-DC converter in a 10-pin VSSOP (DGS) package, featuring 850 kHz switching frequency, 12 µA typical quiescent current, and integrated P/N-channel MOSFETs - designed for Li-Ion or multi-cell alkaline/NiMH-powered portable systems requiring high efficiency at light and full load.
For engineers reviewing the TPS62052DGS datasheet, TPS62052DGS pinout, TPS62052DGS application, or TPS62052DGS equivalent, this page delivers verified electrical specs, functional pin roles, real-world use cases in battery-constrained devices, and validated alternative options for supply chain continuity and design flexibility.
Technical Context
The TPS62052DGS implements voltage-mode PWM control with input-voltage feedforward for fast line/load transient response and stable regulation using small ceramic capacitors. Its internal 0.5 V reference and fixed 1.5 V output are achieved via an integrated resistor divider (700–1300 kΩ), eliminating external feedback components.
It supports dual operating modes: forced PWM (SYNC = HIGH) for low-noise, fixed-frequency operation up to 1.2 MHz, and power-save mode (SYNC = LOW) enabling PFM at light loads to maintain ≥93% efficiency down to 10 mA - with automatic transition between modes based on average output current threshold (100–200 mA).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.5 V ±3% - eliminates need for external feedback resistors; optimized for low-voltage DSP cores and memory I/O. |
| Max Output Current | 800 mA - supports sustained operation under peak load in handheld PCs and digital cameras without thermal derating. |
| Input Voltage Range | 2.7 V to 10 V - compatible with single-cell Li-Ion (2.7–4.2 V) and 3-cell alkaline/NiMH (3–6 V) battery stacks. |
| Quiescent Current | 12 µA typical - enables >100-hour standby in always-on organizer/PDA applications with minimal battery drain. |
| Switching Frequency | 850 kHz typical - allows use of compact 10 µH inductors and 22 µF ceramic output capacitors for space-constrained PCB layouts. |
| Efficiency | ≥93% at 200 mA (VI = 3.6 V, VO = 2.5 V) - maintains high conversion efficiency across wide load range due to synchronous rectification. |
| Shutdown Current | <2 µA - ensures near-zero battery leakage during system sleep or powered-off states. |
| Thermal Resistance | RθJA = 154 °C/W - requires minimal copper area for thermal management in standard 2-layer boards. |
Pinout & Package
TPS62052DGS is housed in a 3.00 mm × 3.00 mm, 10-pin VSSOP (DGS) package with exposed thermal pad (PGND-connected) for enhanced power dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pin 1) | Power input | Accepts 2.7–10 V supply; connects to input capacitor (10 µF ceramic) and must be decoupled close to pin. |
| LBO (Pin 2) | Open-drain low-battery output | Asserts logic low when LBI voltage falls below 1.21 V ±1.5%; requires external pullup to VOUT or ≤6 V rail. |
| GND (Pin 3) | Analog ground | Reference for FB, PG, LBI comparators; separate from PGND to minimize noise coupling into feedback path. |
| PG (Pin 4) | Open-drain power-good output | Floats high when VOUT ≥95% of 1.5 V; requires external pullup; invalid for first 250 µs after enable. |
| FB (Pin 5) | Feedback input | Internally connected to fixed 1.5 V divider; not used externally - leave unconnected for TPS62052DGS. |
| LBI (Pin 6) | Low-battery input | Monitors battery voltage via external resistor divider; trip point = 1.21 V; hysteresis = 15 mV. |
| SYNC (Pin 7) | Mode control input | Pull HIGH (≥1.5 V) for forced PWM; pull LOW (GND) for PFM/PWM auto-switching; float or tie to VI/GND if unused. |
| EN (Pin 8) | Enable input | Logic HIGH (≥1.3 V) enables regulator; logic LOW (≤0.3 V) disables with <2 µA shutdown current. |
| SW (Pin 9) | Switch node | Connects to inductor (10 µH); carries high di/dt switching current - requires short, wide trace and Kelvin connection to PGND. |
| PGND (Pin 10) | Power ground | High-current return path for MOSFETs and inductor; must be tied to thermal pad and routed separately from GND. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated P/N-channel MOSFETs | Eliminates external switches; RDS(ON) ≤650 mΩ (P-ch) / ≤450 mΩ (N-ch) enables high-efficiency synchronous rectification. |
| 100% duty cycle capability | Supports dropout operation down to VIN – VOUT ≈ 0.3 V - critical for maintaining 1.5 V output as battery discharges to 1.8 V. |
| Internal soft-start | Digital ramp limits inrush current; achieves 1 ms startup time (22 µF/200 mA), preventing input rail collapse on weak batteries. |
| Overtemperature & overcurrent protection | Thermal shutdown at 145°C; current limit ≥1000 mA - protects IC and system during short-circuit or overload events. |
| Low-noise forced PWM mode | SYNC = HIGH disables PFM, fixing fSW at 850 kHz ±150 kHz - simplifies EMI filtering for noise-sensitive analog/audio subsystems. |
| Power-good and low-battery monitoring | Dedicated open-drain PG/LBO outputs provide system-level battery health and rail integrity status without MCU intervention. |
Applications
| Cellular Phones | Handheld PCs & PDAs |
|---|---|
|
Use Scenario: Powering baseband processor I/O and RF front-end bias rails from single-cell Li-Ion battery. IC Role / Device Role / Timing Role: Primary 1.5 V step-down regulator delivering regulated core voltage with dynamic load response to burst transmission cycles. Use Value: 93% efficiency at 200 mA extends talk time; 12 µA quiescent current minimizes standby drain; PG signal triggers battery save mode before shutdown. |
Use Scenario: Supplying DSP core and SRAM interface in palm-sized computing device with 3.3 V main rail and 1.5 V logic. IC Role / Device Role / Timing Role: Secondary buck converter generating clean 1.5 V from 3.3 V or direct battery input, synchronized to system clock via SYNC pin. Use Value: 850 kHz switching avoids audible noise in speaker amplifiers; 100% duty cycle sustains operation down to 1.8 V battery voltage. |
| Digital Cameras | Low-Power DSP Supplies |
|
Use Scenario: Providing 1.5 V to image sensor interface and JPEG encoder ASIC during burst capture mode. IC Role / Device Role / Timing Role: High-transient-response DC-DC converter handling rapid 0→600 mA load steps with <1% output deviation. Use Value: Fast voltage-mode control + feedforward ensures stable 1.5 V during flash LED activation; LBO alerts firmware of imminent battery depletion. |
Use Scenario: Generating precision 1.5 V supply for TI C5000/C6000-series DSP cores in portable audio analyzers. IC Role / Device Role / Timing Role: Low-noise, fixed-frequency buck regulator operating in forced PWM mode to avoid spectral interference with ADC sampling clocks. Use Value: SYNC-synchronized 850 kHz operation places switching harmonics outside audio band (20 Hz–20 kHz); ±3% tolerance meets DSP core spec. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62051DGS | Adjustable 0.7–6 V output; enhanced LBI comparator with 5 µA quiescent current in supervisor-only mode. | Used where programmable UVLO and battery cutoff are required - e.g., smart battery packs with precise discharge termination. | Select TPS62051DGS only if adjustable output or enhanced LBI functionality is needed; not drop-in for fixed 1.5 V designs. |
| TPS62062DSGR | Same 1.5 V output but in 6-pin WSON (1.5 × 1.5 mm); 2.5–6 V input; 1.2 MHz switching; 25 µA IQ. | Better suited for ultra-compact, high-density layouts where board space is constrained and input voltage is limited to ≤6 V. | Choose TPS62062DSGR for smaller footprint and higher fSW, but verify thermal performance at 800 mA - RθJA = 194 °C/W vs. 154 °C/W for DGS. |
Compared with TPS62051DGS, the TPS62052DGS offers simpler BOM and tighter output tolerance for fixed-rail systems; versus TPS62062DSGR, it provides superior thermal performance and wider input range at the cost of larger package size.
Availability
TPS62052DGS is available at Aetrix Electronics and suitable for cellular phones, handheld PCs, digital cameras, and low-power DSP supplies requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TPS62052DGS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC-DC conversion for portable and battery-operated systems.
The TPS6205x product line was engineered specifically for space- and power-constrained portable electronics, delivering high-efficiency synchronous buck regulation with integrated protection, monitoring, and flexible mode control in compact MSOP packages.
FAQ
What is the output voltage tolerance of the TPS62052DGS?
The TPS62052DGS has a fixed 1.5 V output with a tolerance of ±3% over the full operating range (VI = 2.7 V to 10 V, IO = 0–600 mA). This specification is guaranteed by TI's internal resistor divider network (700–1300 kΩ) and applies regardless of input voltage or load within rated conditions - no external calibration or trimming is required for TPS62052DGS.
Can the TPS62052DGS operate with a 2.5 V input voltage?
No - the TPS62052DGS requires a minimum input voltage of 2.7 V per its Recommended Operating Conditions. At 2.5 V, the device will not start up due to undervoltage lockout (UVLO) activation at 1.6 V threshold and insufficient headroom for 100% duty cycle operation to sustain 1.5 V output. For 2.5 V input, consider TPS6206x or TPS621xx families instead of TPS62052DGS.
How does the SYNC pin affect efficiency in the TPS62052DGS?
When SYNC is pulled LOW (GND), the TPS62052DGS enters power-save mode, switching to PFM at light loads and achieving ≥93% efficiency down to 10 mA. When SYNC is pulled HIGH (≥1.5 V), it forces fixed-frequency PWM mode - improving EMI control but reducing light-load efficiency to ~80% due to constant switching losses. The choice directly trades noise performance for efficiency in TPS62052DGS designs.
Is the FB pin used in the TPS62052DGS circuit?
No - the FB pin is internally connected to the fixed 1.5 V feedback divider in the TPS62052DGS and must be left unconnected (NC) in the application circuit. Unlike the adjustable TPS62050/TPS62051 variants, the TPS62052DGS does not require external resistors on FB; connecting external components to FB may disrupt regulation or damage the TPS62052DGS.
What thermal considerations apply to the TPS62052DGS at 800 mA output?
At 800 mA continuous load, the TPS62052DGS dissipates ~0.4 W (assuming VI = 5 V, VO = 1.5 V, η ≈ 85%). With RθJA = 154 °C/W, junction temperature rise is ~62°C above ambient - requiring ≥1 cm² of 2-oz copper connected to PGND pad for safe operation at TA = 85°C. Thermal derating is necessary above 60°C ambient unless additional copper or airflow is provided for the TPS62052DGS.
TPS62052DGS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 10V
- Voltage - Output (Min/Fixed):
- 1.5V
- Voltage - Output (Max):
- -
- Current - Output:
- 800mA
- Frequency - Switching:
- 850kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSSOP
TPS62052DGS FAQ
1.How can I place an order for TPS62052DGS through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS62052DGS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS62052DGS reliable?
The price and inventory of TPS62052DGS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS62052DGS is usually 5 days.
3.What payment methods are accepted for TPS62052DGS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS62052DGS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS62052DGS?
TPS62052DGS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS62052DGS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS62052DGS?
For technical support, including TPS62052DGS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS62052DGS requirements.
6.How does Aetrix verify that TPS62052DGS is sourced from the original manufacturer or authorized distributors?
All TPS62052DGS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS62052DGS meets industry standards.
7.What is the process for return or replacement of TPS62052DGS?
All TPS62052DGS units undergo pre-shipment inspection (PSI). If there is an issue with TPS62052DGS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS62052DGS part is unused and in its original packaging.
Return procedure for TPS62052DGS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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