Texas Instruments TPS62056DGSR
- Part No.:
- TPS62056DGSR
- Manufacturer:
- Texas Instruments
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
TPS62056DGSR.pdf
- Description:
- IC REG BUCK 3.3V 800MA 10VSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS62056DGSR from Texas Instruments is a fixed-output 3.3 V, 800-mA synchronous step-down DC-DC converter in a 10-pin VSSOP (DGS) package, featuring 850 kHz fixed-frequency PWM operation, 12 µA typical quiescent current in power-save mode, and integrated P/N-channel MOSFETs - deployed in battery-powered handheld devices requiring regulated low-noise 3.3 V rails.
For engineers reviewing the TPS62056DGSR datasheet, TPS62056DGSR pinout, TPS62056DGSR application, or TPS62056DGSR equivalent, key selection criteria include its 2.7–10 V input range, ±3% output voltage tolerance at 3.3 V, 100% duty cycle capability for low-dropout operation, open-drain LBO/PG outputs, and SYNC-controlled transition between forced-PWM and PFM modes.
Technical Context
The TPS62056DGSR implements voltage-mode control with input-voltage feedforward for fast line/load transient response, using an internal 0.5 V reference and fixed 850 kHz oscillator (synchronizable to 600–1200 kHz). Its dual-MOSFET synchronous rectification eliminates external diode losses and enables >93% efficiency at 300 mA with 5 V input.
Functional modes are determined by SYNC pin logic level: SYNC = HIGH forces constant-frequency PWM for low-noise operation; SYNC = LOW enables automatic PFM/PWM transition to maintain high efficiency down to light loads. EN controls full shutdown (<2 µA), while LBI/LBO provide programmable low-battery detection with 1.21 V trip point and 15 mV hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 3.3 V ±3% over 0–600 mA load and 3.75–10 V input - ensures stable MCU/I/O rail without external feedback resistors. |
| Max Output Current | 800 mA continuous - supports moderate-power digital subsystems including baseband processors and interface ICs. |
| Input Voltage Range | 2.7 V to 10 V - compatible with single/dual Li-ion, 3–5-cell alkaline/NiMH, and industrial 5/9/12 V supplies. |
| Quiescent Current | 12 µA typical in power-save mode - extends battery life in always-on standby functions. |
| Switching Frequency | 850 kHz nominal (600–1200 kHz sync range) - enables use of compact 10 µH inductors and 22 µF ceramic output capacitors. |
| Efficiency | 93% at VI = 5 V, VO = 3.3 V, IO = 300 mA - reduces thermal load in space-constrained portable enclosures. |
| Duty Cycle Range | 100% maximum - supports ultra-low dropout operation when input approaches 3.3 V, critical for end-of-battery-life operation. |
Pinout & Package
TPS62056DGSR is housed in a 10-pin VSSOP (DGS) package measuring 3.00 mm × 3.00 mm with exposed thermal pad - optimized for high-density portable PCB layouts and thermal performance (RθJA = 154°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pin 1) | Power input | Accepts 2.7–10 V supply; requires local 10 µF ceramic decoupling for stability and EMI reduction. |
| LBO (Pin 2) | Open-drain low-battery output | Sinks current when LBI voltage falls below 1.21 V; requires external pullup to VO or ≤6 V rail. |
| GND (Pin 3) | Analog ground | Reference for FB, PG, LBI comparators; must be star-connected to PGND near input capacitor. |
| PG (Pin 4) | Open-drain power-good output | Floats high when VO ≥ 95% of 3.3 V; requires pullup resistor to VO for system power sequencing. |
| FB (Pin 5) | Feedback input | Internally tied to fixed 3.3 V divider; unused in TPS62056DGSR - leave unconnected or grounded. |
| LBI (Pin 6) | Low-battery input | Monitors battery voltage via external resistor divider; trip threshold 1.21 V ±1.5% with 15 mV hysteresis. |
| SYNC (Pin 7) | Mode control input | LOW = enable PFM/PWM auto-switching; HIGH = force fixed-frequency PWM; GND/VIN = default configuration. |
| EN (Pin 8) | Enable input | Active-high logic; <2 µA shutdown current when pulled low; supports pushbutton power-on sequencing. |
| SW (Pin 9) | Switch node | Connects to inductor; carries high di/dt switching current - requires short, wide trace and Kelvin connection to PGND. |
| PGND (Pin 10) | Power ground | High-current return path for MOSFETs and inductor - must be isolated from analog ground and connected directly to input/output capacitor grounds. |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous rectification | Integrated P/N-channel MOSFETs eliminate external Schottky loss - enables >93% peak efficiency and no external diode footprint. |
| Power-save mode | Automatic PFM entry below ~100–200 mA load - reduces quiescent current to 12 µA and maintains >85% efficiency at 10 mA. |
| 100% duty cycle operation | Supports VIN as low as 3.3 V while sustaining regulated 3.3 V output - extends usable battery capacity in Li-ion discharge tail. |
| Programmable low-battery detection | LBI input with 1.21 V comparator and external resistor divider - enables precise battery cutoff without external supervisor IC. |
| Soft-start circuit | Digital current-step soft-start limits inrush to <1 ms with 22 µF output cap - prevents input rail collapse during cold boot from weak sources. |
Applications
| Cellular Handsets | Digital Cameras |
|---|---|
Use Scenario: Powering baseband processor core and I/O rails in GSM/UMTS feature phones with single Li-ion battery. IC Role / Device Role / Timing Role: Primary 3.3 V buck regulator delivering up to 600 mA with tight load transient response during RF transmit bursts. Use Value: Maintains stable 3.3 V under 2 A pulsed load transients via fast voltage-mode control and 850 kHz switching - prevents processor brownouts. | Use Scenario: Supplying image sensor interface, LCD bias, and memory controller in compact digital still cameras. IC Role / Device Role / Timing Role: Fixed 3.3 V power source enabling rapid wake-from-sleep with sub-1 ms start-up time and low-noise PWM mode. Use Value: Forced PWM operation (SYNC = HIGH) suppresses switching noise near sensitive analog imaging circuits - improves SNR. |
| Handheld PDAs | Industrial Data Loggers |
Use Scenario: Regulating 3.3 V for ARM-based application processor, touchscreen controller, and SD card interface in palm-sized PDAs. IC Role / Device Role / Timing Role: High-efficiency synchronous buck converter operating across full battery voltage range (4.2 V → 3.0 V). Use Value: 100% duty cycle capability sustains regulation down to 3.3 V input - recovers 15–20% additional runtime versus non-100% buck converters. | Use Scenario: Providing long-life 3.3 V supply for microcontroller, RTC, and serial interface in battery-backed industrial data loggers. IC Role / Device Role / Timing Role: Ultra-low-quiescent buck regulator with programmable LBO for autonomous battery monitoring and graceful shutdown. Use Value: 12 µA quiescent current in PFM mode extends 2000 mAh Li-SOCl₂ battery life to >10 years in sleep state - validated per TI SLVS432F test conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62052DGSR | Fixed 1.5 V output; identical pinout, package, and feature set except output voltage and internal feedback divider. | Used where 1.5 V logic or core voltage required instead of 3.3 V I/O rail - not interchangeable without board redesign. | Select TPS62052DGSR only when system requires 1.5 V output; shares same layout and BOM except output cap and inductor value. |
| TPS62054DGSR | Fixed 1.8 V output; same DGS package, 850 kHz frequency, and LBI/PG/LBO functionality - differs only in internal voltage divider resistance (700–1300 kΩ). | Targeted at 1.8 V I/O standards (e.g., certain FPGAs, low-voltage sensors); incompatible with 3.3 V bus interfaces. | Choose TPS62054DGSR for 1.8 V applications; pin-compatible but electrically distinct - verify load regulation and efficiency at 1.8 V. |
Compared with TPS62052DGSR and TPS62054DGSR, the TPS62056DGSR provides the exact 3.3 V output required for legacy I/O standards, USB PHYs, and most microcontroller peripherals - eliminating need for post-regulation LDOs while maintaining identical board footprint and thermal behavior.
Availability
TPS62056DGSR is available at Aetrix Electronics and suitable for cellular handsets, digital cameras, handheld PDAs, industrial data loggers, and low-power DSP supplies requiring stable component supply across extended product lifecycles.
Supply support for TPS62056DGSR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies - serving automotive, industrial, personal electronics, and communications markets.
The TPS6205x product line delivers high-efficiency, small-footprint synchronous buck converters for battery-powered portable electronics - designed specifically to maximize runtime and minimize solution size in space- and power-constrained handheld systems.
FAQ
What is the output voltage tolerance of the TPS62056DGSR over temperature and load?
The TPS62056DGSR has a fixed 3.3 V output with ±3% tolerance across the full operating range: –40°C to 85°C junction temperature, 0–600 mA load, and 3.75–10 V input voltage. This specification is verified per TI SLVS432F Section 8.5 and applies to all units shipped in the DGS package. The TPS62056DGSR achieves this via laser-trimmed internal resistor divider networks and a precision 0.5 V bandgap reference.
Can the TPS62056DGSR operate with input voltage equal to its 3.3 V output?
Yes, the TPS62056DGSR supports 100% duty cycle operation, allowing it to sustain regulated 3.3 V output even when input voltage drops to 3.3 V. This capability is confirmed in TI SLVS432F Section 8.5 and enables extended runtime from depleting Li-ion batteries. However, minimum functional input is 3.75 V per recommended operating conditions - operation below that may cause UVLO activation or reduced current capability.
How does the SYNC pin affect efficiency and noise performance of the TPS62056DGSR?
When SYNC = LOW (GND), the TPS62056DGSR enters power-save mode, automatically switching between PWM and PFM to maintain >85% efficiency down to 10 mA load - ideal for battery longevity. When SYNC = HIGH (>1.5 V), it forces fixed-frequency PWM operation, eliminating frequency modulation noise but reducing light-load efficiency to ~70%. This trade-off makes SYNC programmable for noise-sensitive analog sections while preserving efficiency elsewhere.
What is the purpose of the LBI and LBO pins on the TPS62056DGSR?
The LBI (low-battery input) and LBO (low-battery output) pins on the TPS62056DGSR implement a user-programmable battery monitor: LBI accepts a scaled battery voltage via external resistor divider, and LBO asserts open-drain LOW when LBI falls below 1.21 V ±1.5%. This allows system-level battery cutoff without adding discrete supervisors. The TPS62056DGSR's LBI/LBO is functionally identical to TPS62052DGSR and TPS62054DGSR - differing only in output voltage setting.
Is the TPS62056DGSR pin-compatible with other members of the TPS6205x family?
Yes, the TPS62056DGSR shares identical 10-pin VSSOP (DGS) package, pinout, and electrical interface with TPS62050DGSR, TPS62051DGSR, TPS62052DGSR, and TPS62054DGSR. All variants use the same EN, SYNC, PG, LBO, LBI, and SW connections. Differences are limited to internal feedback network (setting 1.5 V, 1.8 V, 3.3 V, or adjustable) and LBI comparator enhancement (TPS62051 only) - enabling drop-in replacement where output voltage matches system requirements.
TPS62056DGSR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 10V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Current - Output:
- 800mA
- Frequency - Switching:
- 850kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSSOP
TPS62056DGSR FAQ
1.How can I place an order for TPS62056DGSR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS62056DGSR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS62056DGSR reliable?
The price and inventory of TPS62056DGSR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS62056DGSR is usually 5 days.
3.What payment methods are accepted for TPS62056DGSR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS62056DGSR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS62056DGSR?
TPS62056DGSR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS62056DGSR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS62056DGSR?
For technical support, including TPS62056DGSR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS62056DGSR requirements.
6.How does Aetrix verify that TPS62056DGSR is sourced from the original manufacturer or authorized distributors?
All TPS62056DGSR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS62056DGSR meets industry standards.
7.What is the process for return or replacement of TPS62056DGSR?
All TPS62056DGSR units undergo pre-shipment inspection (PSI). If there is an issue with TPS62056DGSR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS62056DGSR part is unused and in its original packaging.
Return procedure for TPS62056DGSR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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