Texas Instruments TPS62065DSGR
- Part No.:
- TPS62065DSGR
- Manufacturer:
- Texas Instruments
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
TPS62065DSGR.pdf
- Description:
- IC REG BUCK ADJ 2A 8WSON
- Quantity:
- Payment:

- Shipping:

Inventory:12,440
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Product details
Overview
TPS62065DSGR from Texas Instruments is a synchronous step-down DC/DC converter delivering up to 2 A output current with 3-MHz fixed-frequency PWM or power-save PFM operation, ±1.5% output voltage accuracy in PWM mode, and integrated output capacitor discharge. It serves as a compact POL regulator for low-voltage digital ICs in space-constrained portable systems.
For engineers reviewing the TPS62065DSGR datasheet, TPS62065DSGR pinout, TPS62065DSGR application, or TPS62065DSGR equivalent, key selection criteria include its 2.9–6-V input range, 18-µA quiescent current in PFM mode, 100% duty-cycle capability for ultra-low dropout, clock dithering for EMI reduction, and WSON-8 package compatibility with 1-µH inductors and 10-µF ceramic output capacitors.
Technical Context
The TPS62065DSGR employs a voltage-mode control architecture with input voltage feed-forward, enabling fast line/load regulation and stable operation with minimal external components. Its dual-mode operation-forced PWM (via MODE pin high) or automatic PFM/PWM transition (MODE pin low)-optimizes efficiency across 0–2-A load range while maintaining low output ripple in light-load conditions.
Internally, it integrates high-side and low-side MOSFETs with typical RDS(on) of 120 mΩ and 90 mΩ at 3.6 V, respectively, and features undervoltage lockout (1.78 V falling, 1.95 V rising), thermal shutdown at 150°C, and soft-start with 500-µs startup time. The device supports dynamic voltage positioning (+1% offset in PFM mode) and includes an internal 75–1450-Ω discharge resistor activated during shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.9 V to 6 V - supports direct regulation from 3.3-V or 5-V system rails without pre-regulation. |
| Max Output Current | 2 A - sufficient for powering core logic, DSPs, or FPGA I/O banks in portable devices. |
| Switching Frequency | 3 MHz (±0.4 MHz) - enables use of tiny 1-µH inductors and reduces solution footprint. |
| Quiescent Current | 18 µA in PFM mode - extends battery life in always-on or low-duty-cycle applications. |
| Output Accuracy | ±1.5% in PWM mode - ensures reliable operation of voltage-sensitive processors and memory interfaces. |
| Efficiency | Up to 97% - minimizes thermal dissipation in thermally constrained 2-mm × 2-mm layouts. |
| Junction Temp Range | –40°C to 125°C - qualified for industrial and extended-temperature embedded deployments. |
| Shutdown Current | <1 µA - prevents battery drain during system sleep or off states. |
Pinout & Package
TPS62065DSGR is housed in an 8-pin WSON (DSG) package measuring 2.00 mm × 2.00 mm × 0.75 mm, featuring an exposed PowerPAD™ for enhanced thermal performance. The package is RoHS-compliant and designed for reflow soldering on standard PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVIN | Power input (high-side switch supply) | Connects to main input rail and bulk capacitor; carries high-switching-current path. |
| PGND | Power ground (output stage return) | Low-impedance return for SW node and inductor current; must be routed separately from AGND. |
| EN | Enable control input | Active-high logic input; pulling low disables converter and activates output capacitor discharge. |
| FB | Feedback input | Monitors regulated output via external resistor divider; sets adjustable output voltage (VOUT = 0.6 V × (1 + R1/R2)). |
| MODE | Operation mode select | High = forced 3-MHz PWM; Low = automatic PFM/PWM transition; determines noise vs. efficiency trade-off. |
| SW | Switch node | Connects internally to high- and low-side MOSFETs; external connection point for inductor. |
| AGND | Analog ground | Reference ground for control circuitry; must be tied to PVIN/PGND only at single-point star ground. |
| AVIN | Analog supply input | Bias supply for internal analog blocks; must be connected to PVIN and local 22-pF decoupling capacitor. |
Key Features
| Feature | Design Value |
|---|---|
| Power Save Mode with PFM/PWM Auto Transition | Maintains ≥85% efficiency down to 1-mA loads while minimizing output ripple through intelligent mode switching. |
| Dynamic Voltage Positioning | Regulates output 1% above nominal in PFM mode to absorb load-step undershoot and improve transient response. |
| 100% Duty Cycle Operation | Enables dropout as low as ~120 mV at 2-A load (based on RDS(on) + inductor DCR), maximizing battery runtime. |
| Integrated Output Discharge | Activates internal 75–1450-Ω resistor between SW and PGND during shutdown, safely discharging COUT without external circuitry. |
| EMI-Optimized Clock Dithering | Modulates 3-MHz oscillator by ±6 ns to spread spectral energy and reduce peak radiated emissions in RF-sensitive designs. |
| Robust Protection Suite | Includes undervoltage lockout (1.78 V), thermal shutdown (150°C), and foldback current limiting for short-circuit survival. |
Applications
| Point-of-Load Regulation | Notebook Core Voltage Supply |
|---|---|
Use Scenario: Regulating 1.8-V or 3.3-V rails for microcontrollers, FPGAs, or ASICs on dense PCBs with strict height limits. IC Role / Device Role / Timing Role: Primary synchronous buck regulator providing tightly regulated, low-noise DC power with fast transient response. Use Value: Achieves full 2-A output in <12 mm² area using 1-µH inductor and 10-µF 0603 capacitors, supporting 1-mm max profile designs. | Use Scenario: Powering CPU I/O or GPU memory interfaces in ultraportable notebooks requiring high efficiency at partial load. IC Role / Device Role / Timing Role: Adjustable POL converter operating in PFM mode during idle/sleep states and PWM under active compute load. Use Value: Delivers 97% peak efficiency and 18-µA quiescent current, extending battery life without compromising performance during bursts. |
| DSP and Audio Codec Supply | Portable Media Player System Rail |
Use Scenario: Generating clean 1.2-V or 1.5-V supplies for low-power DSPs and audio codecs sensitive to switching noise. IC Role / Device Role / Timing Role: Fixed-frequency PWM regulator (MODE = high) with clock dithering to suppress harmonics near audio band. Use Value: Reduces conducted EMI by spreading 3-MHz fundamental, eliminating need for additional LC filters in signal-path proximity. | Use Scenario: Supplying main 3.3-V system rail in handheld media players powered by single-cell Li-ion batteries (2.9–4.2 V). IC Role / Device Role / Timing Role: Input-wide buck converter leveraging 100% duty cycle to sustain regulation down to 2.9 V battery voltage. Use Value: Extracts maximum usable energy from battery by maintaining regulation until end-of-discharge, increasing playback time by ~8%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62067DSGR | Includes open-drain power good (PG) output; no MODE pin (power save mode enabled by default). | Required where system-level power sequencing or fault monitoring is needed; lacks manual PWM forcing capability. | Select when PG signaling is mandatory and fixed PWM operation is unnecessary. |
| TPS62130ARGTR | Higher 3-A rating, 2.5–6-V input, 2.2-MHz switching, WQFN-16 package (3 mm × 3 mm). | Suited for higher-current or multi-rail designs; larger footprint and different pinout prevent drop-in replacement. | Choose for >2-A loads or when board layout allows larger package and additional features like I2C programmability. |
Compared with TPS62065DSGR, TPS62067DSGR adds power-good signaling but removes MODE control, while TPS62130ARGTR offers higher current and programmability at the cost of size and pin compatibility-making TPS62065DSGR optimal for compact, manually controlled 2-A POL applications.
Availability
TPS62065DSGR is available at Aetrix Electronics and suitable for point-of-load regulation, notebook subsystems, and portable media player power management requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TPS62065DSGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-efficiency DC/DC conversion.
The TPS6206x product line was engineered specifically for ultra-compact, high-frequency POL applications in battery-powered and space-constrained electronics, emphasizing minimal external component count and robust light-load efficiency.
FAQ
What is the recommended inductor value for TPS62065DSGR in a typical 1.8-V output design?
The TPS62065DSGR is optimized for use with a 1.0-µH inductor, such as the NRG4026T 1R2. This value balances ripple current, transient response, and size constraints while ensuring stable operation across the full 2.9–6-V input range and 0–2-A load. Inductor DCR should be ≤30 mΩ to maintain efficiency and thermal performance.
Does TPS62065DSGR support adjustable output voltage, and how is it set?
Yes, TPS62065DSGR supports adjustable output voltage from 0.8 V to VIN using an external resistor divider on the FB pin. The reference voltage is 0.6 V, so VOUT = 0.6 V × (1 + R1/R2). For example, a 180-kΩ (R2) and 360-kΩ (R1) divider sets VOUT = 1.8 V. The FB pin has 10-nA bias current, minimizing divider error.
How does the MODE pin affect TPS62065DSGR operation, and what happens if left floating?
The MODE pin selects between forced PWM (high) and automatic PFM/PWM (low). If left floating, internal pull-down ensures power save mode activation, but TI strongly recommends tying MODE to AVIN or GND via a resistor to avoid noise-induced mode instability. Floating pins may cause erratic switching behavior and degraded light-load efficiency.
What thermal performance can be expected from TPS62065DSGR in a standard 2-layer PCB layout?
In a standard 2-layer PCB with 1-in² copper pour connected to the PowerPAD™, TPS62065DSGR achieves a junction-to-board thermal resistance (RθJB) of 35.4°C/W. At 2-A load and 4.2-V input, typical power dissipation is ~250 mW, resulting in ~9°C temperature rise above ambient-well within the –40°C to 125°C junction limit.
Is TPS62065DSGR compatible with ceramic output capacitors, and what is the minimum recommended value?
Yes, TPS62065DSGR is fully compatible with ceramic output capacitors and is optimized for 10-µF total capacitance (e.g., one 10-µF 0603 X5R). Ceramic caps provide low ESR for stable loop response and reduced output ripple. Values as low as 4.5 µF are supported per spec, but 10 µF ensures margin for load transients and aging effects.
TPS62065DSGR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.9V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 6V
- Current - Output:
- 2A
- Frequency - Switching:
- 3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WSON (2x2)
TPS62065DSGR FAQ
1.How can I place an order for TPS62065DSGR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS62065DSGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS62065DSGR reliable?
The price and inventory of TPS62065DSGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS62065DSGR is usually 5 days.
3.What payment methods are accepted for TPS62065DSGR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS62065DSGR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS62065DSGR?
TPS62065DSGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS62065DSGR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS62065DSGR?
For technical support, including TPS62065DSGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS62065DSGR requirements.
6.How does Aetrix verify that TPS62065DSGR is sourced from the original manufacturer or authorized distributors?
All TPS62065DSGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS62065DSGR meets industry standards.
7.What is the process for return or replacement of TPS62065DSGR?
All TPS62065DSGR units undergo pre-shipment inspection (PSI). If there is an issue with TPS62065DSGR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS62065DSGR part is unused and in its original packaging.
Return procedure for TPS62065DSGR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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