Texas Instruments TPS62134CRGTR

Overview

TPS62134CRGTR from Texas Instruments is a synchronous step-down DC-DC converter optimized for Intel Skylake VCC(IO) rail applications, featuring DCS-Control™ architecture, 0.95 V fixed output at up to 3 A, 3–17 V input range, and 20 µA quiescent current in power-save mode. It integrates power-good signaling, programmable soft-start, and low-power mode logic for system standby control.

For engineers reviewing the TPS62134CRGTR datasheet, TPS62134CRGTR pinout, TPS62134CRGTR application, or TPS62134CRGTR equivalent, key selection criteria include its 0.95 V output voltage setting (VID1=1, VID0=0, LPM=1), 16-pin VQFN-3×3 mm package with thermal pad, Intel Skylake-specific VID mapping, and seamless PWM-to-PSM transition supporting ultrabook power sequencing requirements.

Technical Context

The TPS62134CRGTR implements DCS-Control™ topology combining fast transient response via AC-coupled voltage sensing with stable DC regulation using an internal error amplifier and compensated loop. Its dual-mode operation maintains ~1 MHz switching frequency in PWM mode (CCM) and scales frequency linearly with load in PSM to sustain >85% efficiency down to 1 mA.

It supports dynamic voltage scaling via VID0/VID1 pins and low-power mode via LPM pin-both with internal 400 kΩ pulldown resistors-and includes integrated short-circuit protection (1.6 A limit under VO < 0.3 V), thermal shutdown (160 °C trip), and undervoltage lockout (2.7 V typical threshold).

Key Specifications

Pinout & Package

TPS62134CRGTR uses a 3-mm × 3-mm VQFN-16 package with exposed thermal pad (RGT suffix). The thermal pad must be soldered to AGND/PGND planes for thermal dissipation and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck converter applications.

Compared with TPS62134CRGTR, TPS62134BRGTR delivers lower output voltage unsuitable for VCC(IO), while TPS62134DRGTR matches the 0.95 V output and pinout but adds Kaby Lake support-making it the recommended upgrade path for future-proofing without layout changes.

Availability

TPS62134CRGTR is available at Aetrix Electronics and suitable for Intel ultrabook I/O rail designs, solid-state disk drive power systems, and 12-V intermediate bus conversion requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for TPS62134CRGTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in power management ICs for computing, industrial, and automotive markets.

The TPS62134x product line was designed specifically for Intel Skylake platform voltage regulation requirements-including VCC(IO), VCC(PRIM_CORE), and VCC(EDRAM) rails-with DCS-Control™, VID interface, and low-power mode logic built-in.

FAQ

What output voltage does the TPS62134CRGTR deliver, and how is it set?

The TPS62134CRGTR delivers a fixed 0.95 V output voltage, configured by asserting LPM=1, VID1=1, and VID0=0 per Table 1 of the datasheet. This setting aligns with Intel Skylake VCC(IO) rail specifications. The device uses internal 400 kΩ pulldown resistors on VID/LPM pins, so no external resistors are needed unless overriding the default state. The TPS62134CRGTR does not support adjustable output via external feedback divider.

Does the TPS62134CRGTR support remote sensing, and how is it implemented?

Yes, the TPS62134CRGTR supports single-ended remote sensing via the FBS pin, which connects directly to the load's power input node. This compensates for voltage drop across PCB traces between the regulator and load, improving regulation accuracy to ±1% at point-of-load. Layout best practices require routing the FBS trace over a solid ground plane and avoiding noisy signals nearby-critical for maintaining stability in high-current applications like SSDs or ultrabook I/O rails.

How does the TPS62134CRGTR handle thermal overload conditions?

The TPS62134CRGTR monitors junction temperature with an internal sensor and enters thermal shutdown at 160 °C (typical), turning off both high- and low-side MOSFETs. Recovery occurs automatically when temperature falls below 140 °C (20 °C hysteresis), initiating a full soft-start sequence. This behavior protects the TPS62134CRGTR and external components during sustained overload or inadequate heatsinking-especially important in compact 3×3 mm VQFN packages used in space-constrained ultrabook designs.

What is the purpose of the LPM pin on the TPS62134CRGTR, and what happens when it is asserted low?

On the TPS62134CRGTR, the LPM (Low-Power Mode) pin controls dynamic voltage scaling: when LPM=0, the output is disabled (0 V), and the PG pin goes high-impedance-enabling deep-sleep states in Intel platforms. When LPM returns high, the TPS62134CRGTR applies a 500-µs PG blanking period to avoid false sequencing signals during voltage ramp-up. This behavior is specific to TPS62134CRGTR's VCC(IO) rail role and differs from TPS62134B/D, which maintain 0.7 V in LPM mode.

Can the TPS62134CRGTR be used outside Intel Skylake platforms, and what design considerations apply?

Yes, the TPS62134CRGTR can be used in non-Intel applications requiring a 0.95 V, 3.2 A buck converter with 3–17 V input, such as industrial PLCs or test equipment. Key considerations include configuring VID/LPM pins per Table 1 (LPM=1, VID1=1, VID0=0), verifying soft-start timing via SS capacitor, and ensuring thermal pad soldering for 44.2 °C/W RθJA. However, its VID mapping and LPM behavior are optimized for Intel platforms-so alternative parts like TPS62130 may offer more flexibility for generic 0.95 V POL use.