Texas Instruments TPS62134DRGTT
- Part No.:
- TPS62134DRGTT
- Manufacturer:
- Texas Instruments
- Package:
- 16-VFQFN Exposed Pad
- Datasheet:
-
TPS62134DRGTT.pdf
- Description:
- IC REG BUCK PROG 3.2A 16VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:485
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Product details
Overview
TPS62134DRGTT from Texas Instruments is a synchronous step-down DC-DC converter optimized for Intel Skylake platform VCC(IO) rail applications, featuring DCS-Control™ architecture, 0.95 V fixed output at up to 3 A, 3–17 V input range, and 20 µA quiescent current in power-save mode.
For engineers reviewing the TPS62134DRGTT datasheet, TPS62134DRGTT pinout, TPS62134DRGTT application, or TPS62134DRGTT equivalent, key selection considerations include LPM/VID-controlled voltage scaling, 16-pin VQFN-3×3 mm thermal performance, power-good timing (140 µs rise delay), and compatibility with Intel ultrabook sequencing requirements.
Technical Context
The TPS62134DRGTT implements DCS-Control™ topology-combining fast transient response via AC-coupled comparator feedback with stable DC regulation through internal voltage feedback loop. It operates in PWM mode (~1 MHz typical) under medium/heavy loads and seamlessly transitions to power-save mode (PSM) at light loads, where switching frequency scales linearly with output current.
It supports dynamic voltage scaling via VID0/VID1 pins and low-power mode (LPM) logic input, enabling system-level power state coordination. The device integrates undervoltage lockout (2.7 V threshold), thermal shutdown (160 °C), short-circuit protection (1.6 A reduced limit), and single-ended remote sense (FBS) for load-point regulation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3 V to 17 V - supports direct connection to 12-V rails or 1–4-cell Li-ion batteries without pre-regulation. |
| Output Voltage | 0.95 V (fixed for TPS62134D variant) - configured by VID0=1, VID1=1, LPM=1 per Table 1; matches Intel VCC(IO) rail specification. |
| Max Output Current | 3.2 A - achievable at VI ≥ 5 V; enables single-rail supply for high-current I/O domains in ultrabooks. |
| Quiescent Current | 20 µA - maintains high efficiency down to µA-level loads in standby, critical for battery runtime extension. |
| Switching Frequency | ~1 MHz (PWM mode) - balances EMI, inductor size, and transient response; reduces to kHz-range in PSM for light-load efficiency. |
| Power-Good Delay | 140 µs (rising edge) - ensures reliable rail sequencing with host controllers and companion power supplies. |
| Thermal Shutdown | 160 °C (with 20 °C hysteresis) - protects against sustained overload or poor PCB thermal design; resumes operation after cooldown. |
Pinout & Package
TPS62134DRGTT is housed in a thermally enhanced 3-mm × 3-mm VQFN-16 package with exposed thermal pad (RGT suffix), requiring soldered connection to AGND/PGND for optimal thermal dissipation (RθJA = 44.2 °C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VOS | Output voltage sense | Direct connection point for control loop feedback; must be routed to output capacitor's positive terminal for accurate regulation. |
| SW | Switch node | Connects internal high/low-side MOSFETs to external inductor; requires low-inductance layout to minimize switching losses and EMI. |
| PG | Power-good open-drain output | Signals valid output voltage (760 mV threshold); requires external pullup resistor ≤10 kΩ to ≤6 V rail for proper sequencing. |
| FBS | Remote sense input | Enables single-ended load-point sensing; connects directly to load's VDD pin to compensate for PCB trace IR drop. |
| VID0 / VID1 | Output voltage selection inputs | Digital inputs defining 0.95 V output for TPS62134D; pulled low internally (400 kΩ) if unconnected. |
| LPM | Low-power mode control | Asserting low reduces output to 0.7 V (TPS62134D); PG goes high-impedance during LPM and blanks for 500 µs on exit. |
| EN | Enable input | Active-high logic control with internal 400 kΩ pulldown; allows precise power-up sequencing and system-level shutdown coordination. |
| SS | Soft-start control | External capacitor sets controlled output ramp rate; prevents inrush current into large output capacitance (e.g., 47 µF). |
Key Features
| Feature | Design Value |
|---|---|
| DCS-Control™ architecture | Combines hysteretic speed with voltage-mode stability-delivers <10 µs transient response to 1-A load steps while maintaining ±1% DC accuracy. |
| Programmable soft start | Adjustable ramp time via SS pin capacitor; eliminates overshoot and avoids brownout during cold startup into pre-biased rails. |
| Integrated power-good indicator | Open-drain PG with 140 µs rise delay and 20 µs fall delay-enables deterministic multi-rail power sequencing without external timers. |
| Single-ended remote sense (FBS) | Compensates for up to 50 mΩ of PCB trace resistance between IC and load, improving load regulation to ±0.5% across full current range. |
| Thermal and short-circuit protection | Auto-recovery thermal shutdown (160 °C) and dynamic current-limit reduction (to 1.6 A during short) prevent damage during fault conditions. |
Applications
| Intel Skylake Ultrabook I/O Rail | Solid-State Disk Drive Power |
|---|---|
Use Scenario: Supplies VCC(IO) rail for PCIe, USB, SATA, and display interface controllers in thin-and-light notebooks. IC Role / Device Role / Timing Role: Primary buck regulator delivering 0.95 V @ 3 A with strict Intel-defined slew rate and sequencing timing. Use Value: Meets Intel VR13/VR14 compliance for VCC(IO) with DCS-Control™ ensuring <50 mV undershoot during 2-A transient load steps. | Use Scenario: Powers NAND flash controller and DRAM cache in M.2 NVMe SSD modules operating from 12-V or battery input. IC Role / Device Role / Timing Role: POL (point-of-load) converter with remote sense (FBS) to maintain stable 0.95 V at SSD controller die despite variable trace impedance. Use Value: 20 µA quiescent current extends SSD standby battery life; LPM pin enables deep-sleep voltage reduction to 0.7 V during idle. |
| 12-V Intermediate Bus Conversion | Embedded System Core Logic Supply |
Use Scenario: Converts standard 12-V industrial or telecom intermediate bus to 0.95 V for FPGA I/O banks or ASIC interfaces. IC Role / Device Role / Timing Role: High-efficiency step-down regulator supporting wide input (3–17 V) and immune to input ripple from upstream converters. Use Value: 90%+ efficiency at 2 A load minimizes heat generation in enclosed enclosures; PG output coordinates with system supervisor ICs. | Use Scenario: Powers ARM-based SoC I/O domains in medical imaging or industrial HMI systems requiring low-noise, sequenced 0.95 V rails. IC Role / Device Role / Timing Role: Synchronous buck converter with EN/PG/SS pins enabling full hardware-controlled power sequencing and fault reporting. Use Value: Integrated UVLO (2.7 V) and thermal shutdown ensure robust operation in unregulated 12-V environments with ambient temperatures up to 125 °C. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62134ARGTT | Fixed 0.85 V output; VID0=0, VID1=0, LPM=1 per Table 1; identical pinout and thermal specs. | Targets Intel VCC(IO) rail in earlier platform revisions; not recommended for new Skylake/KabyLake designs per TI note. | Select only if legacy 0.85 V rail requirement exists; verify compatibility with host VR configuration. |
| TPS62134BRGTT | Fixed 0.80 V output in normal mode; supports 0.7 V LPM; same package, DCS-Control™, and 3.2 A rating. | Designed for Intel VCC(PRIM_CORE) rail; requires different VID logic mapping and may need updated sequencing firmware. | Preferred for new Skylake/KabyLake designs per TI recommendation; pin-to-pin compatible with no PCB changes required. |
Compared with TPS62134DRGTT, TPS62134ARGTT delivers lower nominal voltage (0.85 V vs. 0.95 V) and lacks current TI validation for Skylake, while TPS62134BRGTT offers higher design assurance for modern platforms and identical mechanical integration-making it the recommended upgrade path.
Availability
TPS62134DRGTT is available at Aetrix Electronics and suitable for Intel ultrabook power delivery, solid-state disk drive POL conversion, and embedded 12-V bus regulation requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for TPS62134DRGTT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and power management technologies with over 90 years of innovation history.
The TPS62134x product line was designed specifically for Intel Skylake platform voltage regulation requirements-including VCC(IO), VCC(PRIM_CORE), and VCC(EDRAM) rails-with emphasis on fast transient response, low quiescent current, and seamless power-state transitions.
FAQ
What is the output voltage configuration for TPS62134DRGTT?
The TPS62134DRGTT is factory-configured for 0.95 V output, achieved when VID0 = 1, VID1 = 1, and LPM = 1 (per Table 1 in the datasheet). This matches the Intel VCC(IO) rail specification. The LPM pin can reduce output to 0.7 V during system standby, and the TPS62134DRGTT maintains full 3.2 A capability even at that reduced voltage level.
Does TPS62134DRGTT support remote sensing, and how is it implemented?
Yes, TPS62134DRGTT supports single-ended remote sensing via the FBS pin. To implement it, connect the FBS pin directly to the load's VDD node-not the output capacitor-to compensate for voltage drop across PCB traces. This improves load regulation accuracy to within ±0.5% across the full 0–3.2 A range, and requires a clean, noise-free routing path referenced to AGND/PGND.
What is the power-good (PG) behavior during low-power mode (LPM) transitions for TPS62134DRGTT?
During LPM assertion, the PG pin of TPS62134DRGTT enters high-impedance state. Upon exiting LPM, the PG signal is blanked for 500 µs to allow output voltage stabilization before asserting high. For TPS62134DRGTT (a TPS62134D variant), this blanking is guaranteed-unlike TPS62134A/C-so no additional discharge circuitry is needed to avoid false PG low pulses during LPM exit.
How does TPS62134DRGTT manage efficiency across light and heavy loads?
TPS62134DRGTT uses DCS-Control™ to operate in PWM mode (~1 MHz) under medium/heavy loads for tight regulation, then automatically transitions to power-save mode (PSM) at light loads. In PSM, switching frequency scales linearly with load current-maintaining >85% efficiency down to 1 mA while drawing only 20 µA quiescent current, making it ideal for always-on system states.
Is TPS62134DRGTT pin-compatible with other members of the TPS62134x family?
Yes, all TPS62134x variants-including TPS62134DRGTT-are pin-compatible in the 3-mm × 3-mm VQFN-16 (RGT) package. Pin functions, thermal pad layout, and PCB footprint are identical across TPS62134A/B/C/D. Voltage selection differs only via VID/LPM logic mapping, allowing board reuse across multiple Intel rail configurations with firmware or strap changes.
TPS62134DRGTT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- DCS-Control™
- Package/Case:
- 16-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Programmable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3V
- Voltage - Input (Max):
- 17V
- Voltage - Output (Min/Fixed):
- 0.7V
- Voltage - Output (Max):
- 1V
- Current - Output:
- 3.2A
- Frequency - Switching:
- 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-VQFN (3x3)
TPS62134DRGTT FAQ
1.How can I place an order for TPS62134DRGTT through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS62134DRGTT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS62134DRGTT reliable?
The price and inventory of TPS62134DRGTT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS62134DRGTT is usually 5 days.
3.What payment methods are accepted for TPS62134DRGTT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS62134DRGTT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS62134DRGTT?
TPS62134DRGTT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS62134DRGTT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS62134DRGTT?
For technical support, including TPS62134DRGTT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS62134DRGTT requirements.
6.How does Aetrix verify that TPS62134DRGTT is sourced from the original manufacturer or authorized distributors?
All TPS62134DRGTT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS62134DRGTT meets industry standards.
7.What is the process for return or replacement of TPS62134DRGTT?
All TPS62134DRGTT units undergo pre-shipment inspection (PSI). If there is an issue with TPS62134DRGTT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS62134DRGTT part is unused and in its original packaging.
Return procedure for TPS62134DRGTT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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