Texas Instruments TPS62305DRCR
- Part No.:
- TPS62305DRCR
- Manufacturer:
- Texas Instruments
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TPS62305DRCR.pdf
- Description:
- IC REG BUCK 1.875V 500MA 10VSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS62305DRCR from Texas Instruments is a 500-mA, 3-MHz synchronous step-down DC-DC converter in a 10-pin QFN (3 × 3 mm) package, delivering fixed 1.875 V output with ±2.7% DC accuracy over –40°C to 85°C. It features 86 µA quiescent current, 35 ns minimum on-time, and integrated power-save mode for high efficiency across light-to-heavy loads-ideal for Li-ion–powered smartphones and portable DSP systems.
For engineers reviewing the TPS62305DRCR datasheet, TPS62305DRCR pinout, TPS62305DRCR application, or TPS62305DRCR equivalent, key selection criteria include its 2.7–6 V input range, 1.875 V fixed output, QFN-10 thermal performance (RθJA = 49°C/W), and MODE/SYNC-controlled PFM/PWM transition behavior in battery-constrained designs.
Technical Context
The TPS62305DRCR employs voltage-mode control with input voltage feed-forward for best-in-class load and line transient response. Its dual MOSFET current limits (P-MOS: 670–890 mA; N-MOS: ±460–±740 mA) enable stable operation at low duty cycles and during start-up.
It operates at a fixed 3 MHz switching frequency (2.65–3.35 MHz range), supports on-the-fly synchronization to external clocks via MODE/SYNC, and integrates soft-start and active power-down sequencing-though power-down sequencing is exclusive to TPS6232x variants and not implemented in TPS62305DRCR.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.875 V with ±2.7% DC accuracy over temperature and load-ensures stable core supply for low-voltage DSPs and application processors. |
| Input Voltage Range | 2.7 V to 6 V-supports single-cell Li-ion (2.7–4.2 V) and 3-cell NiMH/NiCd batteries without external regulation. |
| Max Output Current | 500 mA continuous-sufficient for RF transceivers, baseband ICs, and memory subsystems in compact handheld devices. |
| Switching Frequency | 3 MHz typical (2.65–3.35 MHz)-enables use of sub-1 µH inductors and 4.7 µF ceramic capacitors for minimal solution footprint. |
| Quiescent Current | 86 µA in PFM mode-extends battery runtime in standby and low-power listening states (e.g., Bluetooth LE, WLAN beacon reception). |
| Efficiency Peak | Up to 93% at 3 MHz-achieved with low RDS(on) P-MOS (420–750 mΩ) and N-MOS (330–750 mΩ) switches under typical 3.6 VIN/1.8 VOUT conditions. |
| Shutdown Current | <1 µA-meets stringent system-level deep-sleep requirements when EN is pulled low. |
Pinout & Package
TPS62305DRCR is housed in a thermally enhanced 10-pin QFN package (3 mm × 3 mm, 0.5 mm pitch) with exposed PowerPAD™ connected internally to PGND for optimal heat dissipation (RθJA = 49°C/W on low-K board).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Power input for output stage | Primary high-current path for input supply; must be decoupled with low-ESR capacitor near pin. |
| EN | Enable control input | Active-high logic: tie to VI to enable, GND to shut down (<1 µA ISD); must not float. |
| MODE/SYNC | Mode selection & clock sync | GND = auto PFM/PWM; VI = forced PWM; external 3-MHz clock sync enabled when driven externally. |
| VOUT | Output feedback sense | Direct connection to regulated output node; used for loop compensation and voltage sensing. |
| SW | Switch node | Drain connection of internal P/N-MOSFETs; requires careful layout to minimize EMI and ringing. |
| PGND | Power ground | High-current return path for inductor and MOSFETs; separate from AGND and tied to PowerPAD™. |
| AGND | Analog ground | Reference for FB/ADJ circuitry; connect to PGND only via PowerPAD™ or dedicated low-impedance trace. |
| FB | Feedback input | Not connected on fixed-output TPS62305DRCR; unused and must remain unconnected per datasheet. |
| ADJ | Adjust voltage reference | Not connected on fixed-output TPS62305DRCR; unused and must remain unconnected per datasheet. |
| AVIN | Analog supply input | Provides clean bias for internal analog blocks; connect directly to VIN bypass capacitor. |
Key Features
| Feature | Design Value |
|---|---|
| 3-MHz fixed-frequency operation | Enables ultra-compact filter design with ≤1 µH inductors and ≤10 µF ceramic output caps-reducing PCB area by >40% vs. 1-MHz converters. |
| Power-save mode (PFM) | Maintains >85% efficiency at 1 mA load via pulse-skipping, critical for always-on sensors and real-time clock backup rails. |
| 35 ns minimum on-time | Supports high VIN-to-VOUT ratios (e.g., 5.4 V → 1.875 V) without pulse skipping at light loads-preserving regulation stability. |
| 100% duty cycle capability | Allows dropout operation down to VIN = VOUT + 0.1 V, extending usable battery range in deep discharge conditions. |
| Integrated soft-start | Controls inrush current during power-up, eliminating need for external RC networks and preventing input rail sag. |
Applications
| Smartphone Baseband Power | WLAN/Bluetooth Coexistence |
|---|---|
|
Use Scenario: Supplying 1.875 V to ARM-based application processors and cellular baseband ICs in space-constrained smartphone mainboards. IC Role / Device Role / Timing Role: Primary point-of-load regulator converting single-cell Li-ion voltage to stable core logic rail. Use Value: 93% peak efficiency and 86 µA quiescent current extend talk time by >12% versus comparable 1.5-MHz converters under mixed-load profiles. |
Use Scenario: Powering dual-band WLAN (2.4/5 GHz) and Bluetooth 5.0 radios sharing a common battery in portable hotspots. IC Role / Device Role / Timing Role: Dedicated low-noise, fast-transient regulator for RF front-end biasing and digital baseband. Use Value: 3-MHz switching enables easy EMI filtering above 2.4 GHz ISM band, reducing conducted emissions by 15 dBµV over 1-MHz alternatives. |
| Digital Camera Image Sensor Bias | USB-Powered DSL Modem |
|
Use Scenario: Delivering clean 1.875 V to CMOS image sensor analog front-ends and ISP cores in compact action cameras. IC Role / Device Role / Timing Role: Low-ripple, high-PSRR regulator minimizing noise coupling into pixel readout paths. Use Value: Power-save mode maintains <25 mVP-P ripple at 1 mA load, preventing fixed-pattern noise in low-light imaging. |
Use Scenario: Regulating 1.875 V for USB-powered ADSL/VDSL modems operating from 5 V USB host ports with wide input variation. IC Role / Device Role / Timing Role: Input-flexible buck converter supporting 4.75–5.25 V USB input while delivering tight output regulation. Use Value: ±0.2%/V line regulation ensures <±12 mV output shift across full USB spec range-eliminating need for post-regulation LDOs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62303DRCR | Fixed 1.8 V output, identical QFN-10 package and 3-MHz architecture; same 86 µA IQ and 500 mA rating. | Targets systems requiring 1.8 V core rails (e.g., older OMAP processors), whereas TPS62305DRCR serves 1.875 V FPGA I/O or newer DSP cores. | Select TPS62303DRCR when 1.8 V matches system voltage plan; verify compatibility with existing 1.875 V reference designs before substitution. |
| TPS62315YZDR | CSP-8 package (1.5 × 1.5 mm), 1.875 V fixed output, 2 V UVLO (vs. 2.4 V), and higher thermal resistance (250°C/W). | Optimized for ultra-thin wearables where board height <0.6 mm is mandatory; lower power density than QFN-10 variant. | Choose TPS62315YZDR only for size-critical layouts; derate output current to 350 mA due to thermal limitations in CSP-8. |
Compared with TPS62303DRCR and TPS62315YZDR, the TPS62305DRCR offers the optimal balance of thermal performance (49°C/W), standard QFN manufacturability, and precise 1.875 V output-making it the preferred choice for mainstream smartphone and modem designs where layout flexibility and production yield are prioritized.
Availability
TPS62305DRCR is available at Aetrix Electronics and suitable for smartphone baseband power, WLAN/Bluetooth coexistence, and USB-powered DSL modem applications requiring stable component supply, consistent parametric performance, and long-term industrial availability.
Supply support for TPS62305DRCR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-efficiency DC-DC conversion for portable electronics.
The TPS623xx family was designed specifically for battery-powered portable applications-including smartphones, PDAs, and digital cameras-where ultra-small solution size, high light-load efficiency, and robust transient response are essential.
FAQ
What is the output voltage tolerance of the TPS62305DRCR over temperature and load?
The TPS62305DRCR has a fixed 1.875 V output with ±2.7% DC voltage accuracy over the full operating temperature range (–40°C to 85°C) and load range (0–500 mA). This specification is confirmed in the Electrical Characteristics table under "Fixed output voltage" for TPS62305, with test conditions including VI = 3.6 V and TA = 25°C and –40°C to 85°C.
Does the TPS62305DRCR support external synchronization, and what is the acceptable clock range?
Yes, the TPS62305DRCR supports external synchronization via the MODE/SYNC pin. It accepts an external clock signal in the range of 2.65 MHz to 3.35 MHz, with duty cycle between 20% and 80%. Synchronization forces fixed-frequency PWM operation and aligns the P-channel MOSFET turn-on edge to the falling edge of the external clock, enabling multi-rail phase alignment.
Can the TPS62305DRCR operate with a 2.5 V input voltage?
No-the TPS62305DRCR has a minimum input voltage of 2.7 V per Absolute Maximum Ratings and Recommended Operating Conditions. At 2.5 V, the device will not start up or regulate due to undervoltage lockout (UVLO threshold = 2.4 V nominal, with hysteresis). Operation below 2.7 V risks failure to deliver rated output current or enter shutdown.
Is the FB pin used on the TPS62305DRCR, and how should it be handled?
No-the FB pin is not connected on the fixed-output TPS62305DRCR. Per the Terminal Functions table and Pin Assignments section, FB is "not connected on fixed output voltage version of TPS6230xDRC" and must remain unconnected. Leaving it floating or tying it to any potential violates the datasheet and may cause regulation instability.
What is the thermal performance difference between the QFN-10 (TPS62305DRCR) and CSP-8 (TPS62305YZDR) packages?
The TPS62305DRCR in QFN-10 has RθJA = 49°C/W on a low-K board, enabling 500 mA continuous output at 85°C ambient. In contrast, the CSP-8 variant (TPS62305YZDR) has RθJA = 250°C/W, limiting practical output current to ~350 mA under identical conditions. The QFN's exposed PowerPAD™ provides superior thermal conduction to the PCB, making TPS62305DRCR preferable for thermally demanding applications.
TPS62305DRCR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 1.875V
- Voltage - Output (Max):
- -
- Current - Output:
- 500mA
- Frequency - Switching:
- 3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSON (3x3)
TPS62305DRCR FAQ
1.How can I place an order for TPS62305DRCR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS62305DRCR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS62305DRCR reliable?
The price and inventory of TPS62305DRCR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS62305DRCR is usually 5 days.
3.What payment methods are accepted for TPS62305DRCR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS62305DRCR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS62305DRCR?
TPS62305DRCR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS62305DRCR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS62305DRCR?
For technical support, including TPS62305DRCR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS62305DRCR requirements.
6.How does Aetrix verify that TPS62305DRCR is sourced from the original manufacturer or authorized distributors?
All TPS62305DRCR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS62305DRCR meets industry standards.
7.What is the process for return or replacement of TPS62305DRCR?
All TPS62305DRCR units undergo pre-shipment inspection (PSI). If there is an issue with TPS62305DRCR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS62305DRCR part is unused and in its original packaging.
Return procedure for TPS62305DRCR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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