Texas Instruments TPS62351DRCRG4
- Part No.:
- TPS62351DRCRG4
- Manufacturer:
- Texas Instruments
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TPS62351DRCRG4.pdf
- Description:
- IC REG BUCK ADJ 800MA 10VSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS62351DRCRG4 from Texas Instruments is a 3-MHz synchronous step-down DC-DC converter with I²C-compatible interface, delivering up to 800 mA output current from 2.7 V–5.5 V input. It features ±2% PWM DC voltage accuracy, 28 µA typical quiescent current in Light PFM mode, and programmable output voltage (0.9 V–1.6875 V) for core power in portable devices.
For engineers reviewing the TPS62351DRCRG4 datasheet, TPS62351DRCRG4 pinout, TPS62351DRCRG4 application, or TPS62351DRCRG4 equivalent, key selection criteria include I²C-controlled dynamic voltage scaling, 35 ns minimum on-time for high duty-cycle operation, thermal shutdown at 150°C, and QFN-10 package compatibility with space-constrained mobile designs.
Technical Context
The TPS62351DRCRG4 integrates a 3-MHz fixed-frequency PWM controller with dual MOSFET power stage (P-channel rDS(on) = 275 mΩ typ., N-channel rDS(on) = 165 mΩ typ. at 3.6 V), enabling high-efficiency conversion across light-to-heavy loads via automatic transition between Light PFM, Fast PFM, and Forced PWM modes. Its 6-bit DAC supports 12.5-mV voltage steps over the full output range.
Internal functional blocks include undervoltage lockout (2.3 V threshold), thermal shutdown with 20°C hysteresis, discharge resistor (15 Ω) for controlled power-down, and I²C timing compliant with High-Speed mode up to 3.4 Mbps-supporting dynamic reconfiguration without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - supports single-cell Li-ion battery operation with headroom for voltage sag. |
| Output Voltage Range | 0.9 V to 1.6875 V - digitally adjustable via I²C in 12.5-mV steps for precise core voltage tuning. |
| Max Output Current | 800 mA - sufficient for low-power DSPs, microprocessors, and RF subsystems in handheld devices. |
| Switching Frequency | 3 MHz (±0.35 MHz) - enables use of sub-2.2 µH inductors and compact 10 µF ceramic output capacitors. |
| Quiescent Current | 28 µA (Light PFM) - extends battery life during standby or low-activity states in portable electronics. |
| DC Voltage Accuracy | ±2% (PWM mode) - ensures stable core supply within processor voltage tolerance bands. |
| I²C Interface Speed | Up to 3.4 Mbps (High-Speed mode) - allows rapid voltage scaling during CPU frequency transitions. |
Pinout & Package
TPS62351DRCRG4 is packaged in a 10-pin QFN (3 mm × 3 mm, 0.5 mm pitch) with exposed PowerPAD™ thermally connected to PGND. Pin 1 is PVIN; pins 9 and 10 are PGND and SW respectively; EN (pin 7), VSEL (pin 5), SDA (pin 3), and SCL (pin 4) support digital control and sequencing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVIN (Pin 1) | Power input for high-side switch | Connects directly to bulk input capacitor; handles peak switching currents with minimal trace inductance. |
| AVIN (Pin 2) | Analog input supply | Provides bias for internal regulators and reference circuits; must be decoupled locally to AGND. |
| SDA (Pin 3) | I²C bidirectional data line | Supports read/write register access for voltage setting, mode control, and status monitoring. |
| SCL (Pin 4) | I²C clock input | Accepts external clock up to 3.4 MHz; synchronizes internal oscillator when SYNC is used. |
| VSEL (Pin 5) | Hardware voltage select / sleep enable | Hardwired control for coarse output scaling or fast entry into low-power state independent of I²C. |
| FB (Pin 6) | Feedback sense input | Monitors output voltage via external resistor divider; sets regulation point with 0.4 V internal reference. |
| EN (Pin 7) | Enable/shutdown control | Active-high logic; rising edge resets all registers to defaults and initiates soft-start sequence. |
| AGND (Pin 8) | Analog ground reference | Separate ground return for sensitive analog circuitry; must be tied to PGND under IC body only. |
| PGND (Pin 9) | Power ground return | Low-impedance path for high di/dt switching currents; connects internally to PowerPAD™. |
| SW (Pin 10) | Switch node | Drain connection of internal P/N-MOSFETs; requires careful layout to minimize EMI and ringing. |
Key Features
| Feature | Design Value |
|---|---|
| I²C-compatible dynamic voltage scaling | Enables real-time core voltage adjustment (0.9 V–1.6875 V) in 12.5-mV steps for DVFS in OMAP/XSCALE processors. |
| Three operational modes (Light PFM/Fast PFM/Forced PWM) | Automatically selects optimal mode to maintain >80% efficiency from 1 mA to 800 mA load without external intervention. |
| 35 ns minimum on-time | Permits high duty-cycle operation down to ~0.9 V output from 2.7 V input, critical for ultra-low-voltage core rails. |
| Integrated discharge resistor (15 Ω) | Ensures rapid output voltage collapse during shutdown, preventing hold-up or latch-up in multi-rail systems. |
| Thermal shutdown with hysteresis | Protects against sustained overload by disabling switching at 150°C and resuming only after cooling to 130°C. |
Applications
| Smartphone Application Processor Core Supply | Digital Camera Image Signal Processor (ISP) Rail |
|---|---|
Use Scenario: Dynamic voltage/frequency scaling (DVFS) in OMAP-based smartphones during video capture and playback. IC Role / Device Role / Timing Role: Primary core voltage regulator with I²C-controlled output stepping synchronized to CPU clock domain transitions. Use Value: Reduces active power consumption by 22% versus fixed-output converters through precise 12.5-mV voltage granularity and 28 µA quiescent current. | Use Scenario: Powering high-speed ISP cores requiring clean, low-noise 1.1 V–1.5 V supply with fast transient response. IC Role / Device Role / Timing Role: Main DC-DC converter delivering regulated rail with <30 mVPP ripple in Light PFM mode and <170 µs start-up time. Use Value: Maintains image quality by limiting output voltage deviation to ±2% under 100 mA load steps, enabled by 3-MHz switching and integrated compensation. |
| Handheld PDA Memory Interface Voltage | Ultra-Compact Micro DC-DC Module |
Use Scenario: Supplying DDR I/O and core voltage to low-power ARM-based PDAs with battery life optimization priority. IC Role / Device Role / Timing Role: Dual-rail generator (via external feedback resistors) supporting 1.2 V I/O and 1.0 V core from single Li-ion cell. Use Value: Achieves 88% peak efficiency at 3-MHz operation, allowing use of 1 µH inductors and eliminating need for external compensation components. | Use Scenario: Embedded power solution in space-constrained IoT sensor nodes where board area is limited to <10 mm². IC Role / Device Role / Timing Role: Standalone micro DC-DC converter in 3 mm × 3 mm QFN package with integrated MOSFETs and soft-start. Use Value: Enables complete power stage in <15 mm² total footprint including inductor and capacitors, meeting NanoFree™ design goals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62350DRCR | Default output voltage 1.05 V; output range 0.75 V–1.5375 V; identical QFN-10 package and pinout. | Optimized for 1.05 V DSP core rails; lacks TPS62351's 1.10 V/1.50 V default pair. | Select when system requires lower nominal core voltage and tighter 0.75 V floor. |
| TPS62355DRCR | Non-synchronizable; no SYNC pin; default output 0.90 V; same QFN-10 package and I²C interface. | Suitable for cost-sensitive designs where external clock synchronization is unnecessary. | Choose when system clock tree does not require phase alignment with DC-DC switching frequency. |
Compared with TPS62350DRCR and TPS62355DRCR, the TPS62351DRCRG4 provides a higher default output (1.10 V/1.50 V) optimized for newer low-voltage processors, retains full SYNC capability for EMI reduction, and maintains identical thermal performance (49°C/W θJA) in the QFN-10 package.
Availability
TPS62351DRCRG4 is available at Aetrix Electronics and suitable for smartphone application processor core supplies, digital camera ISP rails, handheld PDA memory interfaces, and ultra-compact micro DC-DC modules requiring stable component supply across production lifecycles.
Supply support for TPS62351DRCRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management ICs for portable and industrial applications.
The TPS6235x product line was designed specifically for battery-powered portable electronics requiring high-efficiency, small-footprint, digitally controllable DC-DC conversion with dynamic voltage scaling support for advanced processors.
FAQ
What is the default output voltage of the TPS62351DRCRG4?
The TPS62351DRCRG4 has two factory-programmed default output voltages: 1.10 V (VSEL0) and 1.50 V (VSEL1), selectable via hardware pin configuration. These values are confirmed in the official TI ordering table and correspond to the device's specific variant within the TPS6235x family. The TPS62351DRCRG4 supports full I²C programming across its 0.9 V–1.6875 V range regardless of default setting.
Does the TPS62351DRCRG4 support external clock synchronization?
Yes, the TPS62351DRCRG4 supports external clock synchronization via the SYNC pin, which accepts an external clock signal in the 2.65 MHz–3.35 MHz range. This feature allows alignment of the internal 3-MHz oscillator to a system master clock, reducing beat frequencies and EMI in noise-sensitive applications such as camera modules and audio subsystems. The SYNC pin is present and functional in the QFN-10 package.
What is the maximum continuous output current capability of the TPS62351DRCRG4?
The TPS62351DRCRG4 delivers up to 800 mA continuous output current under recommended operating conditions (TA ≤ 85°C, VI = 2.7 V–5.5 V). This rating is validated per TI's electrical characteristics table and thermal derating curve for the DRC (QFN-10) package, which specifies 2050 mW maximum power dissipation at 25°C ambient with 49°C/W junction-to-ambient thermal resistance.
How does the TPS62351DRCRG4 manage efficiency across varying load conditions?
The TPS62351DRCRG4 maintains high efficiency across load ranges by automatically selecting among Light PFM (for ultra-light loads), Fast PFM (for medium loads with improved transient response), and Forced PWM (for heavy loads or noise-sensitive environments). Each mode is optimized: Light PFM achieves 88% efficiency at 1 mA, while Forced PWM sustains >85% at 800 mA, all within the same 3-MHz base frequency architecture.
Is the TPS62351DRCRG4 pin-compatible with other devices in the TPS6235x family?
Yes, the TPS62351DRCRG4 shares identical pinout, package dimensions, and terminal functions with all QFN-10 variants in the TPS6235x family-including TPS62350DRCR, TPS62355DRCR, and TPS62356DRCR. This allows direct substitution in existing PCB layouts when output voltage, default settings, or SYNC functionality align with system requirements.
TPS62351DRCRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable (Programmable)
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.9V (1.1V, 1.5V)
- Voltage - Output (Max):
- 1.69V
- Current - Output:
- 800mA
- Frequency - Switching:
- 3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSON (3x3)
TPS62351DRCRG4 FAQ
1.How can I place an order for TPS62351DRCRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS62351DRCRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS62351DRCRG4 reliable?
The price and inventory of TPS62351DRCRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS62351DRCRG4 is usually 5 days.
3.What payment methods are accepted for TPS62351DRCRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS62351DRCRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS62351DRCRG4?
TPS62351DRCRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS62351DRCRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS62351DRCRG4?
For technical support, including TPS62351DRCRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS62351DRCRG4 requirements.
6.How does Aetrix verify that TPS62351DRCRG4 is sourced from the original manufacturer or authorized distributors?
All TPS62351DRCRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS62351DRCRG4 meets industry standards.
7.What is the process for return or replacement of TPS62351DRCRG4?
All TPS62351DRCRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS62351DRCRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS62351DRCRG4 part is unused and in its original packaging.
Return procedure for TPS62351DRCRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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