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Texas Instruments TPS62400DRCT
- Part No.:
- TPS62400DRCT
- Manufacturer:
- Texas Instruments
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TPS62400DRCT.pdf
- Description:
- IC REG BUCK ADJ DL 10VSON
- Quantity:
- Payment:
- Shipping:
Inventory:430
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Product details
Overview
TPS62400DRCT from Texas Instruments is an adjustable dual synchronous step-down DC-DC converter optimized for battery-powered portable systems. It delivers 400 mA from Channel 1 and 600 mA from Channel 2, operates from 2.5 V to 6 V input, supports 0.6 V to VIN output range per channel, and integrates 2.25-MHz fixed-frequency PWM with automatic power-save mode (PFM) at light loads - used in OMAP™ processor core and I/O rail supply.
For engineers reviewing the TPS62400DRCT datasheet, TPS62400DRCT pinout, TPS62400DRCT application, or TPS62400DRCT equivalent, key selection criteria include dual-channel independent enable control (EN1/EN2), DEF_1 analog voltage programming for VOUT1, ADJ2 resistor-divider interface for VOUT2, 180° out-of-phase operation to reduce input ripple, and EasyScale™ one-wire dynamic voltage scaling capability.
Technical Context
The TPS62400DRCT implements two fully independent synchronous buck converters sharing a single 2.25-MHz oscillator with 180° phase shift - reducing input RMS current and easing EMI filtering. Each channel features internal compensation, fast-response voltage-mode control with input-voltage feed-forward, and dual MOSFET current limiting (P-ch and N-ch thresholds).
It supports three operational modes: automatic PFM/PWM transition (MODE/DATA = GND), forced-PWM (MODE/DATA = high), and shutdown (EN1 = EN2 = low). The DEF_1 pin functions as an analog input for continuous VOUT1 adjustment (0.6 V–VIN), while ADJ2 accepts external resistor dividers for VOUT2 programming - both channels support real-time reconfiguration via the open-drain EasyScale™ serial interface on MODE/DATA.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 2.5 V to 6 V - compatible with single-cell Li-ion (2.7–4.2 V) or regulated 3.3 V/5 V rails without pre-regulation. |
| VOUT1 Range | 0.6 V to VIN - programmable via external resistor network on DEF_1 pin; enables precise core voltage tuning for low-power processors. |
| VOUT2 Range | 0.6 V to VIN - set via resistor divider from VOUT2 to ADJ2 and GND; supports independent I/O or memory rail regulation. |
| Switching Frequency | 2.25 MHz (±12.5%) - enables use of compact 2.2 µH inductors and ceramic capacitors; reduces solution footprint vs lower-frequency converters. |
| Quiescent Current | 32 µA (both converters, PFM mode) - extends battery life in standby; drops to 1.2 µA in shutdown (EN1 = EN2 = low). |
| Output Accuracy | ±1% in PWM mode - ensures stable logic-level compliance for sensitive digital loads; includes reference voltage tolerance (600 mV ±1%). |
| Thermal Shutdown | 150 °C with 20 °C hysteresis - protects against sustained overload or poor PCB thermal design without latch-up. |
Pinout & Package
TPS62400DRCT is housed in a thermally enhanced 10-pin VSON package (3.0 mm × 3.0 mm, 0.5 mm pitch) with exposed PowerPAD™ for improved heat dissipation. Pin 8 (GND) and the underside PowerPAD™ must be soldered to a large PCB ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DEF_1 (Pin 5) | Analog voltage programming input for VOUT1 | Connects to external resistor divider to set VOUT1 continuously from 0.6 V to VIN; not digital-selectable in TPS62400 variant. |
| ADJ2 (Pin 1) | Feedback adjust input for VOUT2 | Accepts resistor divider from VOUT2 to set VOUT2; must be shorted to VOUT2 in fixed-output configurations - not used for EasyScale™. |
| FB1 (Pin 4) | Direct feedback sense for VOUT1 | Must be connected directly to VOUT1 node; internal error amplifier compares this to 600-mV reference for regulation. |
| EN1 / EN2 (Pins 7 / 9) | Independent enable inputs | Active-high logic; allows staggered startup, dynamic rail sequencing, and independent power gating per channel. |
| MODE/DATA (Pin 2) | Multi-function control terminal | Configures PFM/PWM mode (GND = auto, high = forced PWM); also serves as bidirectional EasyScale™ data line with open-drain ACK. |
| SW1 / SW2 (Pins 6 / 10) | High-side switch node outputs | Drive external 2.2 µH inductors; require low-ESR ceramic output caps (20 µF typical) and careful layout to minimize switching noise. |
| VIN (Pin 3) | Main power input | Supplies both converters; requires local 10-µF ceramic decoupling close to pin; UVLO activates below 1.5 V (rising threshold 2.4 V). |
| GND (Pin 8) + PowerPAD™ | Common return path | Single ground reference for analog and power sections; PowerPAD™ must be soldered to ≥100 mm² internal/external copper for thermal performance. |
Key Features
| Feature | Design Value |
|---|---|
| 180° out-of-phase operation | Reduces input capacitor RMS current by ~30%, enabling smaller 10-µF input ceramics instead of larger bulk electrolytics. |
| Integrated soft-start | Controls VOUT ramp time (750 µs from 5% to 95%) to prevent inrush current damage to source or load during power-up. |
| Dual independent enable pins | EN1 and EN2 allow precise sequencing - e.g., power core rail first, then I/O rail - critical for OMAP™ and DSP boot integrity. |
| EasyScale™ one-wire interface | Enables real-time VOUT1/VOUT2 reprogramming without additional GPIOs; uses MODE/DATA pin with hardware ACK handshake. |
| 100% duty-cycle capability | Maintains regulation down to VOUT = VIN − 0.5 V (for VOUT > 2 V), supporting ultra-low dropout operation near battery end-of-life. |
Applications
| Mobile Application Processor Core Supply | Low-Power DSP I/O Rail |
|---|---|
|
Use Scenario: Powering ARM Cortex-A8 core in OMAP3-based smartphones during active and dynamic voltage scaling (DVS) states. IC Role / Device Role / Timing Role: Dual-channel buck regulator delivering 1.1 V @ 400 mA (core) and 1.8 V @ 600 mA (I/O), with DEF_1 and EasyScale™ enabling on-the-fly voltage transitions. Use Value: Enables DVS to reduce dynamic power by 30–50% during idle; 2.25-MHz switching avoids audible noise and simplifies EMI filtering. |
Use Scenario: Supplying configurable I/O banks of TI C674x DSPs in portable medical ultrasound devices. IC Role / Device Role / Timing Role: Independent VOUT2 rail generator with ADJ2-programmable output (1.2 V–3.3 V) synchronized to core rail startup via EN2 delay. Use Value: Eliminates need for discrete LDOs; 180° phase shift cuts input ripple, improving ADC reference stability in analog front-end circuits. |
| Portable Media Player Memory Interface | Digital Camera Image Signal Processor (ISP) Supply |
|
Use Scenario: Powering LPDDR2 memory subsystem in handheld gaming consoles requiring fast voltage transitions between active and self-refresh modes. IC Role / Device Role / Timing Role: TPS62400DRCT Channel 2 supplies 1.2 V @ 600 mA to memory I/O, while Channel 1 provides 1.0 V core voltage - both controlled via shared MODE/DATA bus. Use Value: EasyScale™ allows sub-100-µs VOUT2 reconfiguration during memory state changes, avoiding timing violations in JEDEC LPDDR2 spec. |
Use Scenario: Delivering clean, sequenced power to multi-rail ISP SoCs (e.g., TI DM365) in compact digital cameras with flash LED drivers. IC Role / Device Role / Timing Role: Channel 1 powers 1.2 V digital core; Channel 2 supplies 2.8 V analog AVDD; EN1/EN2 enable strict 2-ms inter-rail delay per ISP boot sequence. Use Value: Independent enables eliminate need for external timing RC networks; 32-µA quiescent current extends standby time between photo captures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62401DRCT | Fixed 1.575 V / 1.8 V outputs; DEF_1 acts as digital select (not analog); no external resistor required for VOUT1. | Suitable for designs where core/I/O voltages are static and known - eliminates DEF_1 divider but loses programmability. | Select TPS62401DRCT only if VOUT1 = 1.575 V and VOUT2 = 1.8 V are fixed requirements; not drop-in due to DEF_1 functional change. |
| TPS62420DRCT | Same 10-pin VSON package; higher 1-A per channel rating; 2.25-MHz operation; supports 0.6–5.5 V output range. | Required when load currents exceed 400 mA (Ch1) or 600 mA (Ch2); adds overcurrent protection flag (OCF) pin. | Choose TPS62420DRCT for future-proofing or higher-current variants; pin-compatible but requires layout review for thermal pad and current handling. |
Compared with TPS62401DRCT, the TPS62400DRCT offers full analog programmability for VOUT1 - essential for DVS - whereas TPS62401 sacrifices flexibility for simplicity. Against TPS62420DRCT, the TPS62400DRCT trades current headroom for lower quiescent current (32 µA vs 48 µA) and cost-sensitive BOMs in sub-400-mA applications.
Availability
TPS62400DRCT is available at Aetrix Electronics and suitable for mobile application processor core supply, low-power DSP I/O rail, portable media player memory interface, digital camera ISP supply, and OMAP™ system-on-chip power delivery requiring stable component supply across production lifecycles.
Supply support for TPS62400DRCT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC-DC conversion for portable electronics.
The TPS62400DRCT belongs to TI's TPS6240x family of dual synchronous buck converters - designed specifically for space-constrained, battery-operated devices requiring independent, dynamically scalable dual-rail power with minimal external components.
FAQ
What is the default output voltage configuration of the TPS62400DRCT?
The TPS62400DRCT is the adjustable version of the TPS6240x family: VOUT1 is set via external resistor network on DEF_1 pin (0.6 V to VIN), and VOUT2 is set via resistor divider from VOUT2 to ADJ2 and GND. Unlike fixed-output variants (e.g., TPS62401), it does not ship with factory-default voltages - all output levels are user-defined during design. This makes TPS62400DRCT ideal for custom voltage scaling schemes where nominal values differ from TI's standard defaults.
Can the TPS62400DRCT operate with only one channel enabled?
Yes, the TPS62400DRCT supports independent channel operation: EN1 controls Channel 1 (VOUT1), and EN2 controls Channel 2 (VOUT2). Either can be held low to disable its respective converter while the other remains active - with typical quiescent current dropping to 19 µA (one converter off, one in PFM mode). This enables flexible power partitioning in systems where subsystems wake up asynchronously, such as modem and application processor domains in cellular handsets.
How does the EasyScale™ interface function on the TPS62400DRCT?
The EasyScale™ interface on the TPS62400DRCT uses the MODE/DATA pin as a bidirectional, open-drain serial bus: host MCU sends command packets (start bit, address, data, stop) to reprogram VOUT1 and VOUT2 in real time; the device responds with hardware ACK pulses. No clock line is needed - timing is defined by pulse widths (e.g., tH_LB = 2–200 µs for logic 0). This allows dynamic voltage scaling without extra GPIOs or I²C peripherals, making TPS62400DRCT especially valuable in resource-constrained portable SoC designs.
What thermal considerations apply to the TPS62400DRCT in a 3-mm × 3-mm VSON package?
The TPS62400DRCT's 10-pin VSON package has a junction-to-board thermal resistance (RθJB) of 20.4 °C/W - meaning effective heat transfer relies heavily on soldering the exposed PowerPAD™ to ≥100 mm² of inner/outer PCB copper. Without adequate thermal vias and copper area, junction temperature can exceed 125 °C under 400-mA/600-mA loads at 6-V input. TI recommends ≥6 thermal vias (0.3-mm diameter) under the PowerPAD™ connected to solid ground planes on adjacent layers to maintain safe operation across –40 °C to 85 °C ambient.
Does the TPS62400DRCT support forced PWM mode, and how is it activated?
Yes, the TPS62400DRCT supports forced PWM mode to eliminate frequency variation and simplify EMI filtering in noise-sensitive applications. It is activated by pulling the MODE/DATA pin high (≥1.2 V) - overriding automatic PFM/PWM transition. In this mode, both converters run continuously at 2.25 MHz regardless of load, with efficiency dropping at light loads (e.g., <10 mA) but output voltage ripple remaining tightly controlled. The TPS62400DRCT exits forced PWM immediately when MODE/DATA is pulled low, resuming auto-PFM behavior within 520 µs.
TPS62400DRCT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 6V
- Current - Output:
- 400mA, 600mA
- Frequency - Switching:
- 2.25MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSON (3x3)
TPS62400DRCT FAQ
1.How can I place an order for TPS62400DRCT through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS62400DRCT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS62400DRCT reliable?
The price and inventory of TPS62400DRCT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS62400DRCT is usually 5 days.
3.What payment methods are accepted for TPS62400DRCT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS62400DRCT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS62400DRCT?
TPS62400DRCT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS62400DRCT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS62400DRCT?
For technical support, including TPS62400DRCT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS62400DRCT requirements.
6.How does Aetrix verify that TPS62400DRCT is sourced from the original manufacturer or authorized distributors?
All TPS62400DRCT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS62400DRCT meets industry standards.
7.What is the process for return or replacement of TPS62400DRCT?
All TPS62400DRCT units undergo pre-shipment inspection (PSI). If there is an issue with TPS62400DRCT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS62400DRCT part is unused and in its original packaging.
Return procedure for TPS62400DRCT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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