Texas Instruments TPS62675YFDT
- Part No.:
- TPS62675YFDT
- Manufacturer:
- Texas Instruments
- Package:
- 6-XFBGA, DSBGA
- Datasheet:
-
TPS62675YFDT.pdf
- Description:
- IC REG BUCK 1.2V 650MA 6DSBGA
- Quantity:
- Payment:

- Shipping:

Inventory:425
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Product details
Overview
TPS62675YFDT from Texas Instruments is a 6-MHz synchronous step-down DC-DC converter in NanoFree™ DSBGA-6 packaging (1.22 mm × 0.85 mm, height < 0.4 mm), delivering 1.2 V at up to 650 mA output current with ±2% total DC voltage accuracy and 17 μA quiescent current in PFM mode. It operates across 2.3 V–4.8 V input range and integrates spread-spectrum PWM modulation for low-noise operation in battery-powered mobile applications.
For engineers reviewing the TPS62675YFDT datasheet, TPS62675YFDT pinout, TPS62675YFDT application, or TPS62675YFDT equivalent, key selection criteria include its ultra-thin CSP footprint, regulated 6-MHz switching frequency, PFM/PWM auto-mode transition, 92% peak efficiency at 6 MHz, and support for external clock presence detection enabling system-level power sequencing control.
Technical Context
The TPS62675YFDT employs a frequency-locked ring-oscillating modulator architecture-eliminating traditional compensation loops-to achieve instantaneous load/line transient response and enable use of miniature 0603 inductors and 0402 ceramic capacitors. Its dual-mode operation (PFM at light loads, forced PWM via MODE pin) ensures high efficiency across 0–650 mA while maintaining low output ripple (16 mVPP at 1 mA, 1.2 V).
Internally integrated P-channel (170 mΩ typical rDS(on) at 3.6 V) and N-channel (120 mΩ) MOSFETs support synchronous rectification. The device features undervoltage lockout (2.05 V), thermal shutdown (140 °C), and 35 dB PSRR from 1 kHz to 10 kHz-making it suitable as a low-noise, high-PSRR replacement for LDOs in noise-sensitive RF and imaging subsystems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.2 V with ±2% total DC accuracy over temperature, line, and load-ensures stable core supply for low-voltage processors and sensors. |
| Max Output Current | 650 mA continuous-supports high-efficiency power delivery to multi-core baseband ICs or camera ISPs without external heatsinking. |
| Switching Frequency | Regulated 6 MHz (5.4–6.6 MHz range)-enables sub-1-mm² solution size using ≤1.8 µH chip inductors and avoids AM radio band interference. |
| Quiescent Current | 17 μA in PFM mode-extends battery runtime in standby/sleep states of portable devices with intermittent active duty cycles. |
| Input Voltage Range | 2.3 V to 4.8 V-fully compatible with single-cell Li-ion batteries across full discharge curve (including extended 2.3 V cutoff). |
| Package | DSBGA-6 (NanoFree™), 1.22 mm × 0.85 mm, max height 0.4 mm-meets strict Z-height constraints in ultra-thin smartphones and wearables. |
| PSRR | ≥35 dB from 1 kHz to 10 kHz-suppresses noise coupling from noisy system rails (e.g., USB, display, RF transceivers) into sensitive analog/RF blocks. |
Pinout & Package
TPS62675YFDT uses a 6-pin NanoFree™ DSBGA (DSBGA-6) package with 0.4 mm maximum height and 0.4 mm pitch. Pin layout is identical across TPS6267x family per TI SLVS952G datasheet Figure 7 (top/bottom view).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB (C1) | Feedback sense input | Connects directly to VOUT to close regulation loop; internal 480 kΩ feedback resistor network sets 1.2 V output-no external resistors required. |
| VIN (A2) | Power supply input | Accepts 2.3–4.8 V; requires local 2.2 µF ceramic capacitor (0402) for high-frequency decoupling and EMI suppression. |
| SW (B1) | Switch node | Drain connection of internal P/N-MOSFET pair; connects to inductor (0603, 0.47–1.8 µH); critical for EMI layout and thermal path. |
| EN (B2) | Enable input | Active-high logic input; pull to GND for shutdown (0.2 µA ISD); supports external clock presence detection (4–27 MHz) for autonomous wake-up. |
| MODE (A1) | Mode selection | LOW = auto PFM/PWM transition; HIGH = forced PWM only-used to eliminate PFM frequency variation in noise-critical timing domains. |
| GND (C2) | Ground reference | Primary thermal and electrical return path; must be connected to solid PCB ground plane beneath package for optimal thermal performance (θJB = 53 °C/W). |
Key Features
| Feature | Design Value |
|---|---|
| Spread-spectrum PWM modulation | Reduces peak EMI by dithering switching frequency-enables compliance with CISPR-22 Class B radiated emissions without added shielding. |
| Ultra-low profile solution | Total component height < 0.33 mm and area < 10 mm²-fits within mechanical stackup of bezel-less smartphone front cameras and slim IoT sensors. |
| Best-in-class transient response | No traditional compensation loop; instantaneous VO correction eliminates need for large output capacitance-reduces BOM cost and board space. |
| External clock presence detect | EN pin automatically powers up device when 4–27 MHz clock signal is detected-enables synchronized power sequencing with SoC or baseband processor clocks. |
| Low-ripple PFM mode | 16 mVPP output ripple at 1 mA, 1.2 V-maintains clean supply for analog sensor front-ends and PLLs without requiring additional LDO post-regulation. |
Applications
| CMOS Camera Module Power | Smartphone Baseband Core Supply |
|---|---|
Use Scenario: Powering image signal processor (ISP) and rolling-shutter CMOS sensor in mobile phone front/rear cameras. IC Role / Device Role / Timing Role: Primary 1.2 V core regulator delivering up to 650 mA with fast load transient response to handle burst capture and video streaming current spikes. Use Value: Spread-spectrum operation prevents switching noise from coupling into analog pixel readout paths-preserving SNR and eliminating visible banding artifacts. |
Use Scenario: Supplying application processor or modem baseband IC core voltage in LTE/5G smartphones operating from single-cell Li-ion. IC Role / Device Role / Timing Role: High-efficiency buck converter replacing linear regulators to reduce thermal dissipation during sustained CPU/GPU activity. Use Value: 92% peak efficiency at 6 MHz minimizes power loss in thermally constrained mid-frame regions-extending battery life by >15% vs. LDO-based solutions. |
| Optical Data Module Bias | WLAN/Bluetooth Coexistence Power |
Use Scenario: Providing stable 1.2 V bias to VCSEL drivers and photodiode amplifiers in short-reach optical interconnect modules. IC Role / Device Role / Timing Role: Low-noise, high-PSRR DC-DC source isolating sensitive analog optics circuitry from noisy digital system rails. Use Value: ≥35 dB PSRR (1–10 kHz) suppresses switching artifacts from shared system power domain-ensuring accurate optical signal integrity and BER < 10⁻¹². |
Use Scenario: Powering dual-band WLAN/BT combo chip in compact wireless earbuds or portable hotspots with tight EMI limits. IC Role / Device Role / Timing Role: Ultra-small-footprint regulator enabling co-location of RF and power circuits on same PCB layer without shielding. Use Value: Sub-10 mm² total solution size and 0.4 mm max height allow integration beneath antenna ground planes-reducing RF path loss and improving link margin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS626751YFD | Same 1.2 V output and 650 mA rating, but adds output discharge function (70–150 Ω internal pulldown) for rapid VOUT ramp-down during shutdown. | Required where controlled power-down sequencing is needed (e.g., FPGA configuration retention, memory state preservation). | Select TPS626751YFD if output discharge is mandatory; otherwise TPS62675YFDT offers identical regulation performance with lower BOM count. |
| TPS62672YFD | 1.5 V fixed output, same 650 mA capability, identical package and pinout-but no output discharge or extended start-up time features. | Suitable for 1.5 V I/O or auxiliary rail applications; not interchangeable for 1.2 V core supplies without redesign. | Choose TPS62672YFD only when 1.5 V output is required; pin-compatible but electrically incompatible for 1.2 V use cases. |
Compared with TPS62675YFDT, TPS626751YFD adds output discharge for controlled shutdown but shares identical efficiency, quiescent current, and EMI performance; TPS62672YFD provides 1.5 V output in same footprint but cannot replace 1.2 V regulation without violating voltage tolerance margins.
Availability
TPS62675YFDT is available at Aetrix Electronics and suitable for cell phones, CMOS camera modules, and WLAN/Bluetooth applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TPS62675YFDT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-efficiency DC-DC conversion for portable electronics.
The TPS6267x product line was designed specifically for ultra-thin, battery-powered mobile devices-emphasizing minimal solution size, lowest possible quiescent current, and noise-aware operation for RF and imaging subsystems.
FAQ
What is the maximum output current capability of the TPS62675YFDT?
The TPS62675YFDT delivers up to 650 mA of continuous output current across its full operating temperature range (–40°C to +85°C) and input voltage range (2.3 V to 4.8 V), as specified in TI SLVS952G Section 8.3. This rating applies under PWM operation with appropriate thermal management and recommended external components (0.47–1.8 µH inductor, 0.8–10 µF output capacitor).
Does the TPS62675YFDT support external synchronization?
The TPS62675YFDT does not support external clock synchronization, but its EN pin implements clock presence detection: when a 4–27 MHz external clock signal is applied to EN, the device automatically powers up and synchronizes its internal oscillator to that frequency. This enables deterministic power-on timing in systems with master clock domains, such as baseband processors or SoCs.
What package type and dimensions does the TPS62675YFDT use?
The TPS62675YFDT is packaged in a 6-pin NanoFree™ DSBGA (Die Size Ball Grid Array) with nominal body size 1.22 mm × 0.85 mm and maximum height of 0.4 mm. It uses a 0.4 mm ball pitch and follows JEDEC MO-277 standard-confirmed in TI SLVS952G Section 15 and Figure 7 (pin configuration diagrams).
How does the TPS62675YFDT manage efficiency across load conditions?
The TPS62675YFDT uses automatic PFM/PWM mode transition: at light loads (<10 mA), it enters PFM mode with 17 μA quiescent current to maximize battery life; at moderate-to-heavy loads, it switches to regulated 6-MHz PWM operation achieving up to 92% peak efficiency. The MODE pin allows forcing PWM-only operation for noise-sensitive applications.
Is output voltage accuracy affected by input voltage variation?
Line regulation for the TPS62675YFDT is specified at 0.23 %/V (Section 8.5), meaning a 1 V change in VIN causes ≤0.23% change in VOUT. Over its full 2.3–4.8 V input range, total DC output voltage accuracy remains within ±2% including initial tolerance, line, load, and temperature effects-verified per TI SLVS952G Table 8.5.
TPS62675YFDT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-XFBGA, DSBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.3V
- Voltage - Input (Max):
- 4.8V
- Voltage - Output (Min/Fixed):
- 1.2V
- Voltage - Output (Max):
- -
- Current - Output:
- 650mA
- Frequency - Switching:
- 6MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-DSBGA
TPS62675YFDT FAQ
1.How can I place an order for TPS62675YFDT through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS62675YFDT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS62675YFDT reliable?
The price and inventory of TPS62675YFDT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS62675YFDT is usually 5 days.
3.What payment methods are accepted for TPS62675YFDT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS62675YFDT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS62675YFDT?
TPS62675YFDT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS62675YFDT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS62675YFDT?
For technical support, including TPS62675YFDT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS62675YFDT requirements.
6.How does Aetrix verify that TPS62675YFDT is sourced from the original manufacturer or authorized distributors?
All TPS62675YFDT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS62675YFDT meets industry standards.
7.What is the process for return or replacement of TPS62675YFDT?
All TPS62675YFDT units undergo pre-shipment inspection (PSI). If there is an issue with TPS62675YFDT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS62675YFDT part is unused and in its original packaging.
Return procedure for TPS62675YFDT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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