Texas Instruments TPS628640AYCGR
- Part No.:
- TPS628640AYCGR
- Manufacturer:
- Texas Instruments
- Package:
- 15-XFBGA, DSBGA
- Datasheet:
-
TPS628640AYCGR.pdf
- Description:
- IC REG BUCK ADJ 4A 15DSBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS628640AYCGR from Texas Instruments is a 4-A synchronous step-down DC-DC converter with I²C interface, DCS-Control™ topology, and 2.4-MHz fixed-frequency PWM operation. It delivers 0.4–1.15-V output voltage with 1% accuracy, 4-µA quiescent current, and operates from 2.4-V to 5.5-V input-designed for FPGA core rail regulation in space-constrained portable systems.
For engineers reviewing the TPS628640AYCGR datasheet, TPS628640AYCGR pinout, TPS628640AYCGR application, or TPS628640AYCGR equivalent, key selection criteria include I²C-configurable power-save/forced-PWM mode, VID-based dynamic voltage scaling, thermal pre-warning, and WCSP package compatibility with high-density PCB layouts.
Technical Context
The TPS628640AYCGR implements DCS-Control™ architecture, enabling seamless transition between PWM and Power Save Mode without output voltage disturbance. Its internal 7-mΩ high-side and 6.5-mΩ low-side MOSFETs support up to 4-A continuous output with <1% output voltage accuracy across –40°C to 125°C junction temperature.
Startup is resistor-programmed via VSET/VID (e.g., 249-kΩ sets 1.15-V start-up voltage and I²C address 0x46), while post-startup voltage selection uses VID pin toggling between two register-defined outputs. I²C commands configure FPWM mode, output discharge, hiccup protection, and voltage ramp speed-enabling adaptive power management in real-time.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 4 A continuous-supports FPGA core rails requiring stable high-current, low-voltage supply under dynamic load transients. |
| Input Voltage Range | 2.4 V to 5.5 V-compatible with single-cell Li-ion, USB PD, and intermediate bus architectures. |
| Switching Frequency | 2.4 MHz-enables use of ultra-small 0.24-µH inductors and compact ceramic output capacitors. |
| Quiescent Current | 4 µA-minimizes standby power loss in always-on subsystems like camera modules or SSD controllers. |
| Output Voltage Accuracy | ±1% at VOUT ≥ 0.59 V-ensures reliable logic-level compliance for advanced process nodes (e.g., 7-nm/5-nm SoCs). |
| I²C Interface Speed | Up to 3.4 Mbps (High-Speed mode)-supports rapid voltage scaling during CPU/FPGA performance state transitions. |
| Thermal Protection | 130°C thermal warning + 150°C shutdown with 20°C hysteresis-prevents permanent damage during sustained overload or poor heatsinking. |
Pinout & Package
TPS628640AYCGR is housed in a 1.05-mm × 1.78-mm × 0.5-mm 15-pin WCSP (Wafer Chip Scale Package) with 0.35-mm pitch, optimized for minimal board area and thermal performance in ultra-thin portable designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AGND (A1) | Analog ground reference | Separate low-noise return path for feedback and control circuitry-must be connected to quiet ground plane. |
| VSET/VID (A2) | Start-up voltage & I²C address selection / VID control | Resistor-programmed at startup; after tDelay, functions as digital input to toggle between two output voltage registers. |
| VOS (A3) | Output voltage sense | Direct Kelvin connection point to output capacitor-critical for ±1% accuracy; must avoid routing near noisy traces. |
| PGND (B1–B3) | Power ground return | High-current return path for switch node and inductor-requires dedicated copper pour tied to AGND at single point. |
| SW (C1–C3) | Switch node | Connects to inductor; carries high di/dt square wave-requires short, wide trace and minimized loop area with PGND. |
| VIN (D1–D3) | Input power supply | Accepts 2.4–5.5 V; requires local 2×10-µF ceramic decoupling close to pins to suppress high-frequency ripple. |
| EN (E1) | Enable control | Active-high logic input (VIH = 1.0 V); pulling low disables converter and resets most registers-must not float. |
| SDA (E2) | I²C data line | Open-drain bidirectional interface; requires external pull-up to VIN or IOVDD-connect to AGND if unused. |
| SCL (E3) | I²C clock line | Open-drain input; supports up to 3.4-MHz High-Speed mode-trace length matching recommended for noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| DCS-Control™ topology | Enables sub-10-µs load transient response with <10-mV deviation-critical for burst-mode CPU/FPGA workloads. |
| I²C-configurable FPWM mode | Forces 2.4-MHz switching regardless of load-eliminates frequency variation and simplifies EMI filtering in noise-sensitive imaging paths. |
| Dynamic voltage scaling (VID) | Hardware-selectable dual-output registers allow real-time voltage adjustment without I²C transaction overhead-reducing latency in DVFS sequences. |
| Integrated output discharge | Internal MOSFET discharges VOUT through VOS pin during shutdown-prevents back-powering of downstream circuitry and meets system safety requirements. |
| Thermal pre-warning flag | Status register bit asserts at 130°C-enables host processor to throttle before thermal shutdown, maintaining system uptime. |
Applications
| Core Supply for FPGAs | Camera Modules |
|---|---|
Use Scenario: Powering Xilinx Artix-7 or Intel MAX 10 FPGA core rails with dynamic voltage/frequency scaling. IC Role / Device Role / Timing Role: Primary buck regulator delivering 0.7–1.0 V at up to 4 A with <10-µs transient recovery. Use Value: DCS-Control™ ensures stable core voltage during logic reconfiguration bursts, preventing timing violations or configuration errors. |
Use Scenario: Supplying image sensor and ISP in smartphone front/rear cameras with strict EMI and size constraints. IC Role / Device Role / Timing Role: Compact 1.05-mm × 1.78-mm WCSP buck converter enabling direct placement beneath sensor module. Use Value: 4-µA quiescent current extends battery life in always-on camera preview mode; 2.4-MHz switching avoids interference with RF bands. |
| Solid-State Drives | Optical Modules |
Use Scenario: Regulating NVMe SSD controller and NAND flash VCCQ (1.1 V) and VPP (3.3 V) rails in M.2 form factor. IC Role / Device Role / Timing Role: High-efficiency 4-A buck supplying VCCQ with I²C-controlled FPWM to minimize switching noise coupling into high-speed PCIe lanes. Use Value: >90% efficiency at 0.9-V output reduces thermal load in thermally isolated SSD enclosures; thermal warning enables firmware throttling. |
Use Scenario: Powering SFP+/QSFP transceivers in optical networking equipment where board space and thermal density are critical. IC Role / Device Role / Timing Role: Single-chip solution replacing discrete LDO + buck combinations for 1.2-V and 2.5-V analog/digital supplies. Use Value: Resistor-programmed start-up voltage eliminates external DAC; I²C register access enables per-module calibration and fault logging. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS628660AYCGR | 6-A output rating, identical pinout and feature set-higher current capability with same 15-pin WCSP footprint. | Required when FPGA/ASIC peak current exceeds 4 A; otherwise over-spec'd for 4-A use cases. | Select TPS628660AYCGR only if design margin or future-proofing demands >4-A headroom-no PCB change needed. |
| TPS62933RTER | 3-A, 2.7–6-V input, 1.8-MHz, 12-pin WQFN-lacks I²C interface and VID pin; uses external resistor feedback. | Suitable for cost-sensitive, non-dynamic applications where voltage scaling and telemetry are unnecessary. | Choose TPS62933RTER for fixed-output, lower-current rails where I²C configurability and thermal warning are not required. |
Compared with TPS628640AYCGR, TPS628660AYCGR offers higher current capacity in identical packaging-ideal for scalable designs-while TPS62933RTER trades I²C intelligence and VID flexibility for lower BOM cost and simpler layout in static power rails.
Availability
TPS628640AYCGR is available at Aetrix Electronics and suitable for FPGA core supplies, camera module power, solid-state drive regulation, and optical transceiver biasing requiring stable component supply, full production traceability, and long-term lifecycle support.
Supply support for TPS628640AYCGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC-DC conversion.
The TPS62864/66 family was designed specifically for high-density, dynamically scaled power rails in portable and infrastructure equipment-emphasizing ultra-small WCSP packaging, I²C programmability, and DCS-Control™ transient performance.
FAQ
What is the maximum supported I²C clock frequency for TPS628640AYCGR?
The TPS628640AYCGR supports I²C High-Speed mode up to 3.4 Mbps for both read and write operations when capacitive load is ≤100 pF. At 400-pF load, maximum frequency drops to 1.7 Mbps. This enables fast voltage updates during DVFS transitions without introducing significant latency in the TPS628640AYCGR control loop.
Does TPS628640AYCGR support pre-biased start-up?
Yes, the TPS628640AYCGR supports start-up into a pre-biased output capacitor. During enable, it begins regulating from the existing output voltage level and ramps smoothly to the target value-preventing reverse current flow and avoiding disruption to powered-down downstream circuitry in the TPS628640AYCGR power domain.
How is the start-up output voltage selected on TPS628640AYCGR?
The TPS628640AYCGR uses an internal resistor-to-digital (R2D) converter on the VSET/VID pin. A precision external resistor (e.g., 249-kΩ for 1.15 V) sets both the initial output voltage and I²C slave address during the 420–1100-µs enable delay. The R2D conversion completes before soft-start begins, ensuring deterministic boot behavior in the TPS628640AYCGR.
What protection features does TPS628640AYCGR include?
The TPS628640AYCGR integrates undervoltage lockout (UVLO), thermal warning (130°C), thermal shutdown (150°C), hiccup-mode short-circuit protection, and cycle-by-cycle overcurrent limiting. All protections retain register state during fault events-allowing host systems to diagnose root cause via I²C reads after recovery, without losing configuration in the TPS628640AYCGR.
Can TPS628640AYCGR operate in forced PWM mode at light load?
Yes, the TPS628640AYCGR can be configured via I²C CONTROL register to force continuous 2.4-MHz PWM operation-even at zero load. This eliminates frequency modulation artifacts and reduces output voltage ripple, making it suitable for noise-sensitive analog circuits powered by the TPS628640AYCGR, though at the cost of slightly reduced light-load efficiency.
TPS628640AYCGR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- DCS-Control™
- Package/Case:
- 15-XFBGA, DSBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.4V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.4V
- Voltage - Output (Max):
- 1.675V
- Current - Output:
- 4A
- Frequency - Switching:
- 2.4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 15-DSBGA (2x1.3)
TPS628640AYCGR FAQ
1.How can I place an order for TPS628640AYCGR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS628640AYCGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS628640AYCGR reliable?
The price and inventory of TPS628640AYCGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS628640AYCGR is usually 5 days.
3.What payment methods are accepted for TPS628640AYCGR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS628640AYCGR transactions.
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4.How is shipping managed for TPS628640AYCGR?
TPS628640AYCGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS628640AYCGR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS628640AYCGR?
For technical support, including TPS628640AYCGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS628640AYCGR requirements.
6.How does Aetrix verify that TPS628640AYCGR is sourced from the original manufacturer or authorized distributors?
All TPS628640AYCGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS628640AYCGR meets industry standards.
7.What is the process for return or replacement of TPS628640AYCGR?
All TPS628640AYCGR units undergo pre-shipment inspection (PSI). If there is an issue with TPS628640AYCGR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS628640AYCGR part is unused and in its original packaging.
Return procedure for TPS628640AYCGR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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