My Inquiry
My Account
Texas Instruments TPS628660BYCGR
- Part No.:
- TPS628660BYCGR
- Manufacturer:
- Texas Instruments
- Package:
- 15-XFBGA, DSBGA
- Datasheet:
-
TPS628660BYCGR.pdf
- Description:
- IC REG BUCK ADJ 6A 15DSBGA
- Quantity:
- Payment:
- Shipping:
Inventory:8,622
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS628660BYCGR from Texas Instruments is a 6-A synchronous step-down DC/DC converter with I²C interface and DCS-Control™ topology, designed for high-density power delivery to FPGAs, CPUs, and ASICs. It operates from 2.4 V to 5.5 V input, delivers 0.4–1.15 V output with 1% accuracy, features 7-mΩ/6.5-mΩ internal MOSFETs, and achieves >90% efficiency at 0.9-V output.
For engineers reviewing the TPS628660BYCGR datasheet, TPS628660BYCGR pinout, TPS628660BYCGR application, or TPS628660BYCGR equivalent, this page provides verified technical context, WCSP package mapping, I²C programmable modes (FPWM, output discharge, hiccup protection), VID-based dynamic voltage scaling, and thermal warning/shutdown behavior - all confirmed for the exact YCG 15-pin WCSP variant.
Technical Context
The TPS628660BYCGR implements DCS-Control™ architecture, enabling seamless transition between PWM mode (2.4 MHz fixed frequency) at medium/heavy loads and Power Save Mode at light loads - maintaining high efficiency across 0–6 A while delivering tight transient response and ±1% output regulation. Its internal high-side and low-side MOSFETs (7 mΩ / 6.5 mΩ) minimize conduction loss, and the integrated VOS sense pin enables accurate remote sensing.
Control is dual-path: startup voltage and I²C slave address are set by an external resistor on the VSET/PG pin, while runtime functions - including forced PWM, output discharge enable, short-circuit protection mode (hiccup vs. latching), and voltage ramp speed - are configured via I²C commands compliant up to 3.4 Mbps. Thermal pre-warning (130°C) and shutdown (150°C) are hardware-monitored with hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 6 A continuous - supports high-power core rails for modern FPGAs and SoCs without external current sharing. |
| Input Voltage Range | 2.4 V to 5.5 V - compatible with single-cell Li-ion, USB PD, and intermediate bus architectures. |
| Output Voltage Accuracy | ±1% over temperature and load - ensures stable operation of voltage-sensitive logic cores and memory interfaces. |
| Quiescent Current | 4 µA - enables ultra-low standby power in always-on subsystems and battery-backed applications. |
| Switching Frequency | 2.4 MHz - allows use of sub-µH inductors and compact ceramic output capacitors for space-constrained designs. |
| I²C Interface Speed | Up to 3.4 Mbps (High-Speed mode) - supports rapid dynamic voltage scaling during processor DVFS transitions. |
| Thermal Shutdown Threshold | 150°C with 20°C hysteresis - protects against sustained overload or poor PCB thermal design without requiring external monitoring. |
Pinout & Package
TPS628660BYCGR uses a 1.05 mm × 1.78 mm × 0.5 mm 15-pin WCSP (Wafer Chip Scale Package) with 0.35-mm pitch, optimized for ultra-compact point-of-load applications. The package integrates thermal vias under the PGND and AGND pads for enhanced heat dissipation in thin-profile layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN | Enable control input | Active-high logic input; device starts switching after ~700 µs delay and soft-start ramp; must not be left floating. |
| VIN (D1/D2/D3) | Main power input | Three parallel pins reduce IR drop and improve current handling for 6-A operation; accepts 2.4–5.5 V. |
| SW (C1/C2/C3) | Power switch node | Three paralleled switch outputs connect to external inductor; low-inductance routing critical for EMI performance. |
| PGND (B1/B2/B3) | Power ground return | Three dedicated high-current ground paths for switch node return; must be connected to solid thermal pad on PCB. |
| AGND (A1) | Analog reference ground | Separate low-noise ground for feedback and I²C circuitry; requires star connection to PGND at single point. |
| VSET/PG (A2) | Startup voltage & PG indicator | Resistor-programmed start-up output (0.4–1.15 V); becomes open-drain power-good output after startup (low = regulated). |
| VOS (A3) | Output voltage sense | Direct Kelvin connection point to output capacitor; enables precise remote sensing and eliminates PCB trace IR error. |
| SDA (E2) | I²C data line | Open-drain bidirectional interface; requires pull-up to 1.8–5.5 V; supports up to 3.4 Mbps High-Speed mode. |
| SCL (E3) | I²C clock line | Input-only clock signal; must be pulled up; timing compliant with Fast Mode Plus and High-Speed Mode specs. |
Key Features
| Feature | Design Value |
|---|---|
| DCS-Control™ topology | Enables simultaneous high efficiency (>90% at 0.9 V) and fast load transient response (<10 µs recovery) without external compensation. |
| I²C-configurable protection | Selectable hiccup or latching short-circuit response - prevents thermal runaway while allowing automatic recovery or controlled fault lockout. |
| Dynamic voltage scaling (DVS) | VSET/PG pin toggles between two I²C-programmed output registers, enabling real-time core voltage adjustment for CPU/FPGA DVFS. |
| Integrated output discharge | Internal MOSFET discharges output capacitor during shutdown or fault conditions - eliminates need for external bleed circuitry. |
| Thermal pre-warning flag | Status register bit asserts at 130°C junction temperature - enables host system to throttle before thermal shutdown occurs. |
Applications
| Core Supply for High-Performance FPGAs | Camera Module Power Management |
|---|---|
Use Scenario: Powering Xilinx Versal or Intel Agilex FPGA core rails requiring 0.7–0.85 V at up to 6 A with dynamic voltage scaling during reconfiguration. IC Role / Device Role / Timing Role: Primary point-of-load regulator with I²C-controlled output voltage and ramp rate, synchronized to FPGA configuration state machine. Use Value: Enables sub-100-ns voltage transitions between performance states while maintaining ±1% regulation and <10 mV ripple in FPWM mode. | Use Scenario: Supplying image sensor and ISP in smartphone or automotive ADAS camera modules with strict EMI and size constraints. IC Role / Device Role / Timing Role: Compact 1.05 mm × 1.78 mm buck converter delivering 0.9 V to 1.2 V at 2–4 A, with programmable soft-start and hiccup protection. Use Value: Meets CISPR-32 Class B radiated emissions limits via 2.4-MHz switching and integrated VOS sensing, eliminating external compensation components. |
| Solid-State Drive (SSD) Controller Rail | Optical Transceiver Bias Supply |
Use Scenario: Generating 0.8 V core supply for PCIe Gen4/Gen5 SSD controllers with burst current demands exceeding 5 A during NAND access. IC Role / Device Role / Timing Role: High-current synchronous buck with thermal warning flag used to throttle host interface bandwidth before junction exceeds 125°C. Use Value: Sustains 6-A peak load for >100 ms without thermal shutdown, leveraging 91.8°C/W RθJA and WCSP thermal vias. | Use Scenario: Providing stable 3.3 V bias to laser diode drivers and TIAs in 100G/400G optical modules operating in confined pluggable form factors. IC Role / Device Role / Timing Role: Secondary buck stage (fed from 5-V intermediate bus) delivering low-noise 3.3 V with I²C-monitored power-good status. Use Value: Achieves <50 µVpp output noise in FPWM mode, meeting GR-468 reliability requirements for laser bias stability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS628640BYCGR | 4-A rated version with identical pinout, WCSP package, and I²C feature set; shares same thermal metrics and control architecture. | Lower current capability suits mid-tier FPGAs or dual-core processors where peak load ≤4 A. | Select when full 6-A headroom is unnecessary - reduces cost and simplifies thermal design without sacrificing programmability. |
| MP2174GQ-Z | Monolithic 6-A buck with 2.2-MHz switching, but lacks I²C interface, VID pin, thermal warning, and hiccup protection; uses QFN-14 package (2.5 mm × 3.0 mm). | Targeted at cost-sensitive, non-DVFS applications like industrial PLCs where firmware control is not required. | Choose only if I²C configurability, dynamic voltage scaling, and advanced fault reporting are not needed - avoids layout redesign but sacrifices system-level intelligence. |
Compared with TPS628640BYCGR, the TPS628660BYCGR delivers 50% higher current in the same footprint, enabling single-rail solutions for next-gen compute; versus MP2174GQ-Z, it trades package size for embedded intelligence - supporting autonomous thermal management and real-time power policy enforcement via I²C.
Availability
TPS628660BYCGR is available at Aetrix Electronics and suitable for FPGA core supplies, camera module power rails, SSD controller applications, and optical transceiver bias circuits requiring stable component supply, long-term lifecycle support, and guaranteed authentic sourcing.
Supply support for TPS628660BYCGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-efficiency DC/DC conversion and system-level power architecture.
The TPS6286x product line was engineered specifically for ultra-compact, high-current point-of-load regulation in space-constrained computing and communications equipment - emphasizing programmability, thermal resilience, and seamless integration with host processors via I²C.
FAQ
What is the maximum supported I²C clock frequency for TPS628660BYCGR?
The TPS628660BYCGR supports I²C High-Speed mode up to 3.4 Mbps for both read and write operations when bus capacitance is ≤100 pF. At higher capacitance (≤400 pF), the maximum reliable speed drops to 1.7 Mbps. This enables rapid dynamic voltage scaling during processor DVFS events without introducing command latency into the TPS628660BYCGR control loop.
Does TPS628660BYCGR support output voltage sequencing with other power rails?
Yes, the TPS628660BYCGR supports controlled sequencing via its EN pin and I²C interface. The enable delay (tDelay ≈ 700 µs) and programmable output voltage ramp time (tRamp = 0.9–1.5 ms) allow synchronization with upstream/downstream rails. Additionally, the VSET/PG pin provides a hardware power-good signal that can drive enable inputs of companion regulators, enabling robust multi-rail sequencing without external timers.
Can TPS628660BYCGR operate with a pre-biased output capacitor?
Yes, the TPS628660BYCGR supports start-up into a pre-biased output. During enable, it detects the existing output voltage and ramps smoothly to the target value without reverse current flow or output overshoot. This capability is essential in hot-swap and redundant power systems where the TPS628660BYCGR may be inserted into an already-powered rail.
What thermal protection features does TPS628660BYCGR include?
The TPS628660BYCGR includes two-tier thermal protection: a thermal pre-warning flag asserted at 130°C junction temperature (reported via I²C STATUS register), and automatic thermal shutdown at 150°C with 20°C hysteresis. Upon shutdown, the device disables switching and activates output discharge; it resumes normal operation automatically once temperature falls below 130°C, preserving register state throughout the event.
Is the VSET/PG pin on TPS628660BYCGR configurable for both startup selection and power-good indication?
Yes - the VSET/PG pin on TPS628660BYCGR serves dual roles. During startup (first ~700 µs after EN assertion), it reads an external resistor to set initial output voltage and I²C slave address. After startup completes, it functions as an open-drain power-good indicator: pulled low through an external resistor when output is within ±9% of nominal, and driven high during faults or shutdown. No mode-select register is required.
TPS628660BYCGR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- DCS-Control™
- Package/Case:
- 15-XFBGA, DSBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.4V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.4V
- Voltage - Output (Max):
- 1.15V
- Current - Output:
- 6A
- Frequency - Switching:
- 2.4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 15-DSBGA (2x1.3)
TPS628660BYCGR FAQ
1.How can I place an order for TPS628660BYCGR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS628660BYCGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS628660BYCGR reliable?
The price and inventory of TPS628660BYCGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS628660BYCGR is usually 5 days.
3.What payment methods are accepted for TPS628660BYCGR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS628660BYCGR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS628660BYCGR?
TPS628660BYCGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS628660BYCGR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS628660BYCGR?
For technical support, including TPS628660BYCGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS628660BYCGR requirements.
6.How does Aetrix verify that TPS628660BYCGR is sourced from the original manufacturer or authorized distributors?
All TPS628660BYCGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS628660BYCGR meets industry standards.
7.What is the process for return or replacement of TPS628660BYCGR?
All TPS628660BYCGR units undergo pre-shipment inspection (PSI). If there is an issue with TPS628660BYCGR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS628660BYCGR part is unused and in its original packaging.
Return procedure for TPS628660BYCGR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS628660BYCGR Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
