My Inquiry
My Account
Texas Instruments TPS628682ARQYR
- Part No.:
- TPS628682ARQYR
- Manufacturer:
- Texas Instruments
- Package:
- 9-PowerVFQFN
- Datasheet:
-
TPS628682ARQYR.pdf
- Description:
- IC REG BUCK ADJ 4A 9VQFN
- Quantity:
- Payment:
- Shipping:
Inventory:5,426
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS628682ARQYR from Texas Instruments is a 4-A synchronous step-down DC/DC converter with I²C interface, designed for dynamic voltage scaling in high-performance digital loads. It operates from 2.4 V to 5.5 V input, delivers 0.8 V to 3.35 V output with 10-mV step resolution, achieves >90% efficiency at 0.9-V output, and uses DCS-Control™ topology for fast transient response in FPGA core rail applications.
For engineers reviewing the TPS628682ARQYR datasheet, TPS628682ARQYR pinout, TPS628682ARQYR application, or TPS628682ARQYR equivalent, key selection considerations include its 2.4-MHz switching frequency, 1% output voltage accuracy, thermal pre-warning capability, I²C-compatible interface up to 3.4 Mbps, and QFN-9 (1.5 × 2.5 mm) package with integrated 11-mΩ/10.5-mΩ MOSFETs.
Technical Context
The TPS628682ARQYR implements DCS-Control™ architecture, enabling seamless transition between PWM mode (2.4 MHz fixed frequency) and Power Save Mode at light load while maintaining tight regulation. Its internal high-side and low-side MOSFETs (11 mΩ / 10.5 mΩ) support 4-A continuous output current with thermal shutdown at 150 °C and thermal warning at 130 °C.
I²C programmability enables real-time control of operating mode (FPWM vs. PSM), output discharge, hiccup/latching short-circuit protection, and output voltage ramp speed. Start-up output voltage (0.8 V to 2.3 V, selectable via external resistor on VSET/VID) and I²C target address are both configured externally - no register write required for initial power-up.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.4 V to 5.5 V - supports single-cell Li-ion, USB PD, and industrial 3.3-V/5-V rails without pre-regulation. |
| Output Voltage Range | 0.8 V to 3.35 V with 10-mV steps - enables precise DVS for LPDDR5 VDDQ and ASIC core rails. |
| Max Output Current | 4 A continuous - validated per JEDEC thermal metrics (RθJA = 90.9 °C/W) at TJ ≤ 125 °C. |
| Switching Frequency | 2.4 MHz - allows use of ultra-small 220-nH inductors and reduces EMI filtering burden. |
| Output Accuracy | ±1% over temperature and line/load - ensures reliable operation of sub-1-V logic domains. |
| I²C Interface Speed | Up to 3.4 Mbps (high-speed mode) - supports rapid voltage updates during performance state transitions. |
| Thermal Protection | Pre-warning at 130 °C + hysteresis (20 °C), shutdown at 150 °C - prevents permanent damage under sustained overload. |
Pinout & Package
TPS628682ARQYR is housed in a thermally enhanced 9-pin QFN package (RQY) measuring 1.5 mm × 2.5 mm × 1.0 mm with 0.5-mm pitch and exposed thermal pad. The package supports high-power density PCB layouts and requires standard reflow profiles per JEDEC J-STD-020.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - AGND | Analog ground reference | Separate low-noise return path for feedback and I²C circuitry; must be connected to quiet ground plane. |
| 2 - PGND | Power ground return | High-current return for switch node and output capacitor; connects directly to thermal pad for heat dissipation. |
| 3 - VIN | Main power input | Accepts 2.4–5.5 V; requires local 10-µF ceramic input capacitor placed near pin. |
| 4 - EN | Enable control input | Active-high logic; internal pull-down; must be driven to ≥0.84 V to enable converter. |
| 5 - SDA | I²C serial data line | Open-drain, supports up to 3.4 Mbps; requires external pull-up to VIO (≤5.5 V). |
| 6 - SCL | I²C serial clock line | Open-drain, synchronized with SDA; same pull-up requirements as SDA. |
| 7 - SW | Switch node | Connects to external 220-nH inductor; high dv/dt node requiring tight layout and minimal trace length. |
| 8 - VOS | Output voltage sense | Direct Kelvin connection to output capacitor anode; critical for ±1% accuracy and stability. |
| 9 - VSET/VID | Start-up voltage & I²C address select | Resistor-programmable start voltage (0.8–2.3 V); after startup, selects VOUT register bank (VOUT1/VOUT2) via logic level. |
Key Features
| Feature | Design Value |
|---|---|
| DCS-Control™ topology | Enables <10-µs load transient recovery with <1% undershoot/overshoot - essential for burst-mode CPU/FPGA workloads. |
| Dynamic voltage scaling (DVS) | Three programmable output ranges (0.2–0.8375 V, 0.4–1.675 V, 0.8–3.35 V) with fine-grained step sizes - supports LPDDR5 VDDQ and multi-core DVFS. |
| Forced PWM mode | Eliminates frequency variation at light load, reducing output ripple to <5 mVPP - critical for noise-sensitive analog/RF subsystems. |
| Power-good indicator option | Configurable window comparator (85–96% lower / 103–120% upper threshold) on PG pin - enables safe sequencing with downstream logic. |
| Thermal pre-warning signal | Dedicated flag asserted at 130 °C with 20 °C hysteresis - allows host processor to throttle before thermal shutdown occurs. |
Applications
| LPDDR5 Memory VDDQ Supply | FPGA Core Rail |
|---|---|
Use Scenario: Provides tightly regulated 1.1 V or 1.2 V to LPDDR5 VDDQ pins during high-bandwidth read/write bursts with rapid voltage transitions. IC Role / Device Role / Timing Role: Primary voltage regulator with I²C-controlled DVS to match memory controller performance states (e.g., P0–P3). Use Value: Achieves ±1% output accuracy and <10-µs transient response - prevents timing violations and data corruption during frequency scaling. |
Use Scenario: Powers FPGA fabric core logic (e.g., Xilinx Versal or Intel Agilex) requiring adaptive voltage from 0.8 V to 1.2 V based on workload intensity. IC Role / Device Role / Timing Role: Digitally programmable buck converter with 2.4-MHz switching and forced-PWM mode for low-noise operation. Use Value: Enables >90% efficiency across 10 mA–4 A load range and supports thermal-aware throttling via pre-warning signal. |
| Solid-State Drive (SSD) Controller | Optical Module Bias Supply |
Use Scenario: Supplies 1.8 V or 3.3 V to NAND flash controllers and PCIe PHYs in enterprise SSDs with strict ripple and sequencing requirements. IC Role / Device Role / Timing Role: High-density step-down regulator with power-good signaling and robust short-circuit protection (hiccup mode). Use Value: Integrated 11-mΩ/10.5-mΩ MOSFETs reduce board area by 30% vs. discrete solutions; thermal shutdown prevents NAND data loss under overload. |
Use Scenario: Generates stable 2.5 V or 3.3 V bias for laser diode drivers and transimpedance amplifiers in 100G/400G optical modules. IC Role / Device Role / Timing Role: Low-noise, fast-transient DC/DC with I²C monitoring for remote calibration and fault logging. Use Value: 2.4-MHz operation minimizes conducted EMI near sensitive analog front-ends; ±1% accuracy ensures consistent laser bias current. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS628681ARQY | Same RQY package and pinout; supports 0.4–1.675 V output range with 5-mV steps and 4-A rating. | Targeted at mid-range core voltages (e.g., ARM Cortex-A72, DDR4 VDDQ); lacks 3.35-V max capability. | Select when output voltage stays below 1.675 V and finer 5-mV DVS resolution is needed over 10-mV steps. |
| TPS628692ARQY | Pin-compatible 6-A variant with identical 0.8–3.35 V range, 10-mV steps, and I²C features; higher current limit (7.7 A typ). | Required for systems with peak currents >4 A (e.g., high-end ASICs, multi-die FPGAs); larger thermal footprint under full load. | Choose when future-proofing for >4-A peak loads or when margin against thermal derating is insufficient with TPS628682ARQYR. |
Compared with TPS628681ARQY and TPS628692ARQY, the TPS628682ARQYR uniquely balances 3.35-V maximum output, 4-A capability, and compact 1.5 × 2.5 mm footprint - making it optimal for space-constrained LPDDR5 and mid-tier FPGA designs where 6-A headroom is unnecessary.
Availability
TPS628682ARQYR is available at Aetrix Electronics and suitable for LPDDR5 memory supplies, FPGA core rails, solid-state drive controllers, and optical module bias circuits requiring stable component supply, long-term lifecycle assurance, and full production traceability.
Supply support for TPS628682ARQYR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion and system-level power architecture.
The TPS62868x family was developed specifically for dynamic voltage scaling in advanced digital processors and memory interfaces, emphasizing ultra-small footprint, I²C configurability, and thermal resilience in high-density compute and storage applications.
FAQ
What is the maximum output voltage supported by the TPS628682ARQYR?
The TPS628682ARQYR supports an output voltage range of 0.8 V to 3.35 V with 10-mV step resolution. This range is factory-configured for this specific part number and cannot be extended beyond 3.35 V, even via I²C register writes - the upper limit is hard-coded in the device's VID mapping logic.
Does the TPS628682ARQYR require external compensation components?
No, the TPS628682ARQYR uses TI's DCS-Control™ architecture with internal compensation. It operates stably with only a 220-nH inductor and standard 22-µF output ceramic capacitor - no external RC network or compensation pins are needed, simplifying layout and reducing BOM count.
How does the TPS628682ARQYR handle pre-biased outputs during startup?
The TPS628682ARQYR supports start-up into a pre-biased output. When enabled, it detects the existing VOUT voltage and ramps from that level to the target value using its internal soft-start circuitry (1-ms ramp time), preventing reverse current flow and ensuring safe power sequencing in multi-rail systems.
Can the TPS628682ARQYR operate in forced PWM mode without I²C communication?
Yes - forced PWM mode can be enabled via I²C register write, but the TPS628682ARQYR also enters FPWM automatically if the output voltage drops below 95% of nominal during light-load operation, ensuring consistent ripple performance even without host intervention.
What thermal derating applies to the TPS628682ARQYR at 100°C junction temperature?
At TJ = 100 °C, the TPS628682ARQYR maintains full 4-A output capability per TI's recommended operating conditions. Derating begins above 105 °C for continuous operation, with thermal warning asserted at 130 °C to allow proactive system throttling before shutdown at 150 °C.
TPS628682ARQYR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 9-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.4V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 3.35V
- Current - Output:
- 4A
- Frequency - Switching:
- 2.4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 9-VQFN-HR (1.5x2.5)
TPS628682ARQYR FAQ
1.How can I place an order for TPS628682ARQYR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS628682ARQYR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS628682ARQYR reliable?
The price and inventory of TPS628682ARQYR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS628682ARQYR is usually 5 days.
3.What payment methods are accepted for TPS628682ARQYR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS628682ARQYR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS628682ARQYR?
TPS628682ARQYR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS628682ARQYR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS628682ARQYR?
For technical support, including TPS628682ARQYR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS628682ARQYR requirements.
6.How does Aetrix verify that TPS628682ARQYR is sourced from the original manufacturer or authorized distributors?
All TPS628682ARQYR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS628682ARQYR meets industry standards.
7.What is the process for return or replacement of TPS628682ARQYR?
All TPS628682ARQYR units undergo pre-shipment inspection (PSI). If there is an issue with TPS628682ARQYR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS628682ARQYR part is unused and in its original packaging.
Return procedure for TPS628682ARQYR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS628682ARQYR Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
