Texas Instruments TPS6286910CRQYR
- Part No.:
- TPS6286910CRQYR
- Manufacturer:
- Texas Instruments
- Package:
- 9-PowerVFQFN
- Datasheet:
-
TPS6286910CRQYR.pdf
- Description:
- IC REG BUCK ADJ 6A 9VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS6286910CRQYR from Texas Instruments is a 4-A to 6-A synchronous step-down DC/DC converter with I²C interface, designed for core power delivery in high-performance digital loads. It operates from 2.4 V to 5.5 V input, delivers 0.9 V output with ±1% accuracy, uses DCS-Control™ topology for fast transient response, and integrates 11-mΩ/10.5-mΩ internal MOSFETs - deployed in LPDDR5 VDDQ rail supply and FPGA core voltage regulation.
For engineers reviewing the TPS6286910CRQYR datasheet, TPS6286910CRQYR pinout, TPS6286910CRQYR application, or TPS6286910CRQYR equivalent, key selection criteria include its fixed 0.9-V startup output, PG pin functionality (not VSET/VID), 2.4-MHz switching frequency, I²C programmability up to 3.4 Mbps, and thermal warning/shutdown thresholds at 130 °C/150 °C.
Technical Context
The TPS6286910CRQYR implements DCS-Control™ architecture to unify PWM and Power Save Mode operation without output disturbance, enabling seamless transition between high-efficiency light-load PFM and low-ripple heavy-load PWM modes. Its 2.4-MHz fixed-frequency PWM mode ensures predictable EMI behavior while maintaining >90% efficiency at 0.9-V output.
This variant features a dedicated open-drain power-good (PG) pin - not VSET/VID - configured at factory for 0.9-V startup, eliminating external resistor selection. I²C registers control forced PWM mode, output discharge, hiccup vs. latching short-circuit protection, and output ramp speed - all without requiring hardware changes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.4 V to 5.5 V - supports single-cell Li-ion, USB PD, and industrial 3.3-V/5-V rails without pre-regulation. |
| Output Current | 6 A continuous - rated for sustained operation up to 125 °C junction temperature with appropriate PCB thermal design. |
| Startup Output Voltage | Fixed 0.9 V - factory-configured via PG pin option; no external resistor required for initial biasing. |
| Output Accuracy | ±1% over 0 °C to 85 °C - ensures stable core voltage for LPDDR5 VDDQ and FPGA I/O banks under thermal variation. |
| Switching Frequency | 2.4 MHz nominal - enables use of ultra-small 0.22-µH inductors and reduces output capacitor count in space-constrained modules. |
| I²C Interface Speed | Up to 3.4 Mbps (high-speed mode) - supports dynamic voltage scaling updates within microseconds during CPU/FPGA performance state transitions. |
| Thermal Protection | 130 °C thermal warning + 150 °C shutdown with 20 °C hysteresis - provides early fault indication and hard safety cutoff for embedded systems. |
Pinout & Package
TPS6286910CRQYR is housed in a 1.5-mm × 2.5-mm × 1.0-mm, 9-pin QFN package (RQY) with 0.5-mm pitch and wettable flanks for automated optical inspection. The exposed thermal pad (Pin 9) must be soldered to a dedicated PCB thermal plane for optimal junction-to-board conduction (RθJB = 25.0 °C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 AGND | Analog ground reference | Separate low-noise return path for feedback and control circuitry; must be connected to quiet analog ground plane. |
| 2 PGND | Power ground return | High-current return for switch node and inductor; requires low-inductance connection to thermal pad and input/output capacitors. |
| 3 VIN | Main power input | Accepts 2.4–5.5 V; requires local 10-µF ceramic input capacitor placed adjacent to Pin 3 and Pin 2. |
| 4 EN | Enable control input | Active-high logic; pulled high internally; must be driven ≥0.84 V to enable - used for sequencing and system-level power control. |
| 5 SDA | I²C serial data line | Open-drain, supports 3.4 Mbps high-speed mode; requires external pullup to 1.8–5.5 V; connect to AGND if unused. |
| 6 SCL | I²C serial clock line | Open-drain, synchronized with SDA; same pullup and termination requirements; critical for timing-critical DVS updates. |
| 7 SW | Switch node output | Connects directly to inductor; high dv/dt node - requires minimized trace length and guard ring to reduce EMI. |
| 8 VOS | Output voltage sense | Direct Kelvin connection to output capacitor anode; enables accurate remote sensing and tight load regulation. |
| 9 PG | Power-good indicator | Open-drain output asserting high when VOUT is within ±9% of 0.9 V and ramp complete; pullup required for logic-level signaling. |
Key Features
| Feature | Design Value |
|---|---|
| DCS-Control™ topology | Enables sub-10-µs load transient recovery with <10 mV undershoot/overshoot - critical for burst-mode CPU cores. |
| Programmable protection modes | I²C-selectable hiccup or latching short-circuit response - allows safe fault containment in mission-critical FPGA power domains. |
| Output discharge via I²C | Activates internal 3.5-Ω discharge FET when disabled - prevents floating output during hot-swap or standby sequencing. |
| 2.4-MHz fixed-frequency PWM | Ensures consistent EMI profile and simplifies filtering for noise-sensitive optical module and camera sensor supplies. |
| Thermal pre-warning flag | Digital alert at 130 °C - enables firmware-initiated throttling before thermal shutdown disrupts system operation. |
Applications
| Core Supply for FPGAs | LPDDR5 VDDQ Rail Supply |
|---|---|
Use Scenario: Powering Xilinx Versal or Intel Agilex FPGA core logic banks requiring tightly regulated, dynamically scalable voltage. IC Role / Device Role / Timing Role: Primary buck regulator delivering 0.9 V at up to 6 A with microsecond-scale I²C-adjustable DVS steps. Use Value: Enables real-time voltage scaling during FPGA reconfiguration or workload shifts - reducing dynamic power by up to 30% without hardware change. |
Use Scenario: Supplying VDDQ for JEDEC-compliant LPDDR5 memory interfaces in AI accelerators and edge servers. IC Role / Device Role / Timing Role: High-accuracy, low-noise point-of-load regulator meeting LPDDR5 VDDQ tolerance (±3%) and slew rate requirements. Use Value: Maintains ±1% output accuracy across temperature and load, ensuring signal integrity and timing margin compliance for 6400 MT/s data rates. |
| Solid-State Drives | IP Network Cameras |
Use Scenario: Powering NVMe SSD controller and NAND flash interface circuitry in compact M.2 and U.2 form factors. IC Role / Device Role / Timing Role: Compact 1.5×2.5-mm buck converter delivering 0.9 V at 6 A with minimal board area and thermal footprint. Use Value: Achieves >90% efficiency at 0.9-V output and 2.4-MHz switching - enabling full-power operation within 5-W thermal envelope of client SSDs. |
Use Scenario: Providing clean, sequenced power to image sensor, ISP, and video encoder in PoE-powered IP cameras. IC Role / Device Role / Timing Role: I²C-configurable buck with PG output for system-level power sequencing and fault reporting over Ethernet. Use Value: PG pin enables host MCU to verify stable 0.9-V rail before initializing sensor - preventing initialization failures in field-deployed units. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS628691ARQY | Same RQY package and 6-A rating, but VSET/VID pin instead of PG; supports 0.4–1.675 V DVS range with 5-mV steps. | Used where dynamic voltage scaling is required (e.g., CPU DVFS), not fixed 0.9-V startup. | Select TPS628691ARQY only if I²C-controlled VOUT adjustment is needed; TPS6286910CRQYR is preferred for fixed-rail simplicity and guaranteed PG assertion. |
| TPS6286810CRQY | 4-A version with identical 0.9-V startup, PG pin, and RQY package; shares same pinout and register map. | Lower current rating suits lower-power FPGAs or DDR4 VDDQ; thermal derating begins above 105 °C (vs. 125 °C for TPS6286910CRQYR). | Choose TPS6286810CRQY for cost-sensitive 4-A designs with identical layout compatibility; TPS6286910CRQYR provides headroom for future power-upgrades. |
Compared with TPS628691ARQY and TPS6286810CRQY, the TPS6286910CRQYR uniquely combines 6-A capability, factory-fixed 0.9-V startup, and dedicated PG signaling - making it optimal for space-constrained, fixed-voltage applications where reliability and sequencing assurance outweigh DVS flexibility.
Availability
TPS6286910CRQYR is available at Aetrix Electronics and suitable for LPDDR5 VDDQ rail supply, FPGA core power, and solid-state drive controller applications requiring stable component supply, long-term lifecycle support, and automotive-grade reliability validation.
Supply support for TPS6286910CRQYR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion and system-level power architecture.
The TPS62868/TPS62869 family was engineered specifically for high-density, I²C-programmable point-of-load regulation in next-generation compute and memory subsystems - targeting LPDDR5, AI accelerators, and ultra-compact edge devices.
FAQ
What is the startup output voltage of the TPS6286910CRQYR?
The TPS6286910CRQYR has a factory-configured fixed startup output voltage of 0.9 V. This is implemented via the PG pin option (not VSET/VID), eliminating the need for an external resistor network. The device asserts power-good once the output ramps to 0.9 V ±9% within 1 ms, and maintains this regulation across load and temperature.
Does the TPS6286910CRQYR support dynamic voltage scaling (DVS) via I²C?
No - the TPS6286910CRQYR does not support DVS. It is a fixed-output variant with factory-set 0.9-V startup and no VSET/VID pin functionality. While it retains full I²C capability for mode control (e.g., forced PWM, output discharge, protection settings), the output voltage register is locked and cannot be adjusted through the interface.
What is the maximum supported I²C clock frequency for the TPS6286910CRQYR?
The TPS6286910CRQYR supports I²C high-speed mode up to 3.4 Mbps for both read and write operations when bus capacitance is ≤100 pF. At higher capacitance (≤400 pF), the maximum reliable clock frequency drops to 1.7 Mbps. Standard (100 kHz) and fast (400 kHz) modes are also fully supported for backward compatibility.
How does thermal management work on the TPS6286910CRQYR?
The TPS6286910CRQYR features dual thermal thresholds: a 130 °C thermal warning flag (asserted via status register) and a 150 °C thermal shutdown with 20 °C hysteresis. Unlike many converters, it provides early digital warning - allowing host firmware to throttle load before shutdown occurs - and maintains regulation up to 125 °C junction temperature under 6-A load with proper PCB thermal design.
Can the TPS6286910CRQYR operate into a pre-biased output capacitor?
Yes - the TPS6286910CRQYR supports start-up into a pre-biased output. When enabled, it detects the existing VOUT voltage and ramps from that level to the target 0.9 V, avoiding reverse current flow and ensuring safe hot-insertion in modular or hot-swap systems. This behavior is inherent to the DCS-Control™ architecture and requires no configuration.
TPS6286910CRQYR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 9-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.4V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.4V
- Voltage - Output (Max):
- 1.675V
- Current - Output:
- 6A
- Frequency - Switching:
- 2.4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 9-VQFN-HR (1.5x2.5)
TPS6286910CRQYR FAQ
1.How can I place an order for TPS6286910CRQYR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS6286910CRQYR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS6286910CRQYR reliable?
The price and inventory of TPS6286910CRQYR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS6286910CRQYR is usually 5 days.
3.What payment methods are accepted for TPS6286910CRQYR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS6286910CRQYR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS6286910CRQYR?
TPS6286910CRQYR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS6286910CRQYR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS6286910CRQYR?
For technical support, including TPS6286910CRQYR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS6286910CRQYR requirements.
6.How does Aetrix verify that TPS6286910CRQYR is sourced from the original manufacturer or authorized distributors?
All TPS6286910CRQYR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS6286910CRQYR meets industry standards.
7.What is the process for return or replacement of TPS6286910CRQYR?
All TPS6286910CRQYR units undergo pre-shipment inspection (PSI). If there is an issue with TPS6286910CRQYR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS6286910CRQYR part is unused and in its original packaging.
Return procedure for TPS6286910CRQYR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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