Texas Instruments TPS6287B20LA0WRZVR
- Part No.:
- TPS6287B20LA0WRZVR
- Manufacturer:
- Texas Instruments
- Package:
- 24-PowerWFQFN
- Datasheet:
-
TPS6287B20LA0WRZVR.pdf
- Description:
- IC REG BUCK PROG 20A 24WQFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,800
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS6287B20LA0WRZVR from Texas Instruments is a 20A synchronous step-down DC/DC converter with I²C interface, differential remote sense, and fast transient response. It operates from 2.7V to 6V input, delivers output voltage from 0.4V to 1.675V with ±0.8% DC accuracy, and integrates 2.6mΩ/1.5mΩ power MOSFETs for high-efficiency core supply in FPGA and ASIC applications.
For engineers reviewing the TPS6287B20LA0WRZVR datasheet, TPS6287B20LA0WRZVR pinout, TPS6287B20LA0WRZVR application, or TPS6287B20LA0WRZVR equivalent, key selection considerations include its 20A rated current, I²C programmability up to 3.4MHz, selectable 1.5MHz switching frequency, forced-PWM/power-save mode control, and differential remote sensing for point-of-load regulation.
Technical Context
The TPS6287B20LA0WRZVR implements a fixed-frequency DCS-Control architecture optimized for sub-1µs load transient response while maintaining stable operation across 2.7V–6V input and 0.4V–1.675V output ranges. Its dual-MOSFET power stage (2.6mΩ HS / 1.5mΩ LS) enables high-current delivery at elevated ambient temperatures without derating.
Differential remote sensing via VOSNS/GOSNS pins achieves ±0.8% output voltage accuracy under full load and line variation. The device supports stacked operation using SYNC_OUT/MODE/SYNC daisy-chaining and offers I²C-based real-time voltage monitoring, thermal warning (150°C), and thermal shutdown (170°C) with 20°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 20A continuous - supports high-power digital loads including FPGA core rails and ASIC subsystems without external current sharing. |
| Input Voltage Range | 2.7V to 6V - compatible with single-cell Li-ion, 3.3V/5V intermediate bus, and wide-input industrial supplies. |
| Output Voltage Accuracy | ±0.8% DC - ensures tight regulation at point-of-load when used with differential remote sense (VOSNS/GOSNS). |
| Switching Frequency | 1.5MHz (default) - enables compact 100–200nH inductor selection and reduces output ripple without compromising transient performance. |
| I²C Interface Speed | Up to 3.4MHz (high-speed mode) - allows rapid dynamic voltage scaling (DVS) and real-time telemetry updates during active operation. |
| Power MOSFET RDS(on) | 2.6mΩ (HS) / 1.5mΩ (LS) - minimizes conduction loss and thermal rise at 20A, supporting >90% efficiency at mid-load conditions. |
| Thermal Protection | 150°C thermal warning + 170°C shutdown with 20°C hysteresis - provides fail-safe operation and system-level thermal management signaling. |
Pinout & Package
TPS6287B20LA0WRZVR uses a 24-pin WQFN-FCRLF (RZV) package measuring 3.05mm × 4.05mm with exposed thermal pad soldered to GND for optimal thermal performance (RθJA = 28°C/W on EVM).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pins 5,6,15,16) | Power input supply | Four dedicated input pins reduce trace inductance and enable robust decoupling with ≥10µF per pin near package edge. |
| SW (Pins 9,10,11,12) | Switch node | Four parallel switch outputs distribute high di/dt current, minimizing layout parasitics and EMI generation. |
| VOSNS / GOSNS | Differential output voltage sense | Enables precise point-of-load regulation by rejecting PCB IR drop; requires Kelvin routing to load. |
| SDA / SCL (Pins 19,20) | I²C bidirectional interface | Supports high-speed (3.4MHz) communication for register read/write, fault logging, and dynamic VOUT adjustment. |
| MODE/SYNC | Operating mode control | Pull-low for Power-Save mode (efficiency-optimized); pull-high for Forced-PWM (low-noise, fast-transient mode). |
| PG | Open-drain power-good output | Signals valid regulation with window comparator (±4% UV/OV thresholds); daisy-chainable in stacked configurations. |
| VSET1 / VSET2 | Resistor-programmable startup voltage | Selects initial VOUT from 0.4V–0.775V (25mV steps) or 0.8V–1.55V (50mV steps) before I²C takeover. |
| COMP | Loop compensation node | External RC network sets Type-II/III compensation; shared across stacked devices for synchronized loop response. |
Key Features
| Feature | Design Value |
|---|---|
| Differential remote sensing | Compensates for PCB voltage drop between regulator and load, enabling ±0.8% regulation accuracy at point-of-load. |
| I²C programmable output voltage | Adjusts VOUT in real time via I²C registers-supports dynamic voltage scaling for power-aware FPGA/ASIC operation. |
| Stacked operation support | SYNC_OUT/MODE/SYNC daisy-chaining allows up to three devices to share load current or spread thermal dissipation. |
| Selectable soft-start timing | Four ramp times (0.35ms–2.6ms) configurable via CONTROL2[1:0] register bits to prevent inrush current in multi-rail systems. |
| Thermal pre-warning & shutdown | Active thermal warning at 150°C alerts host controller before shutdown at 170°C-enables graceful system throttling. |
| Output discharge function | Internal 2.7–9.2Ω discharge path rapidly collapses VOUT after shutdown-prevents floating rail issues in sequenced power systems. |
Applications
| FPGA Core Supply | ASIC Digital Rail |
|---|---|
|
Use Scenario: Powering 7nm/5nm FPGA core logic requiring tightly regulated, low-noise 0.75V–0.85V at up to 20A peak current. IC Role / Device Role / Timing Role: Primary synchronous buck regulator with differential remote sense and I²C-based dynamic voltage scaling. Use Value: ±0.8% DC accuracy and sub-1µs transient response maintain timing margins under rapid DVFS transitions. |
Use Scenario: Delivering stable 0.8V core voltage to high-performance ASICs in optical networking line cards with strict thermal limits. IC Role / Device Role / Timing Role: High-current DC/DC converter with thermal warning signaling and stacked-mode scalability for multi-die packages. Use Value: 2.6mΩ/1.5mΩ MOSFETs and 28°C/W thermal resistance enable 20A operation at 85°C ambient without derating. |
| Storage Controller Power | Industrial Edge AI Module |
|
Use Scenario: Supplying NVMe SSD controller SoCs with adaptive voltage based on workload intensity and temperature. IC Role / Device Role / Timing Role: I²C-configurable buck converter supporting real-time VOUT adjustment and telemetry reporting (voltage, temperature). Use Value: 3.4MHz I²C interface enables <100µs VOUT reprogramming-critical for latency-sensitive storage acceleration. |
Use Scenario: Powering heterogeneous AI accelerators (CPU+GPU+NPU) in fanless edge servers with constrained airflow. IC Role / Device Role / Timing Role: Thermally robust 20A regulator with remote sense, thermal pre-warning, and stackable architecture. Use Value: Stacked operation spreads heat across multiple TPS6287B20LA0WRZVR units, reducing local hotspot temperature by >15°C. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-current synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS6287B20HA0WRZVR | Same 20A rating and RZV package, but default startup voltage range is 0.8V–1.55V (50mV steps) vs. 0.4V–0.775V for TPS6287B20LA0WRZVR. | Optimized for higher-VOUT digital rails (e.g., DDR memory termination, I/O supply) rather than ultra-low-core voltages. | Select TPS6287B20HA0WRZVR when startup VOUT ≥ 0.8V is required; otherwise use TPS6287B20LA0WRZVR for sub-0.8V core rails. |
| TPS6287B20JE2WRZVR | Includes FSET pin for 1.5/2.25/2.5/3MHz frequency selection and Jacinto platform-specific I²C addressing; same 20A rating and RZV package. | Targeted for TI Jacinto ADAS processors with synchronized multi-rail sequencing and platform-specific register mapping. | Choose TPS6287B20JE2WRZVR only for Jacinto-based designs requiring non-default switching frequencies or platform-locked I²C addresses. |
Compared with TPS6287B20HA0WRZVR and TPS6287B20JE2WRZVR, the TPS6287B20LA0WRZVR provides the lowest startup voltage range (0.4V–0.775V) and simplest I²C configuration-making it ideal for general-purpose FPGA/ASIC core supplies where flexibility and ease of integration outweigh platform-specific features.
Availability
TPS6287B20LA0WRZVR is available at Aetrix Electronics and suitable for FPGA core supply, ASIC digital rail, and industrial edge AI module applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for TPS6287B20LA0WRZVR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in high-reliability power conversion solutions.
The TPS6287Bxx family was designed specifically for high-current, fast-transient digital core supplies in FPGA, ASIC, and AI accelerator applications-emphasizing I²C configurability, differential remote sensing, and thermal resilience in compact WQFN packages.
FAQ
What is the maximum supported I²C clock frequency for TPS6287B20LA0WRZVR?
The TPS6287B20LA0WRZVR supports I²C high-speed mode up to 3.4MHz with ≤100pF bus capacitance. This enables rapid register access for dynamic voltage scaling and real-time telemetry-critical for FPGA DVFS and AI accelerator power management. The device maintains full functionality across standard (100kHz), fast (400kHz), and fast-plus (1MHz) modes as well.
Does TPS6287B20LA0WRZVR support differential remote sensing, and how is it implemented?
Yes, the TPS6287B20LA0WRZVR implements differential remote sensing using dedicated VOSNS (output voltage sense) and GOSNS (output ground sense) pins. This architecture rejects PCB trace resistance voltage drop, delivering ±0.8% output voltage accuracy at the load. Proper Kelvin routing-separate sense traces directly to the load terminals-is required to realize this specification.
Can multiple TPS6287B20LA0WRZVR devices be operated in parallel, and what is required?
Yes, the TPS6287B20LA0WRZVR supports stacked operation for increased current capability or thermal spreading. It requires interconnecting SYNC_OUT of the primary device to MODE/SYNC of secondary devices, daisy-chaining EN and PG pins, and tying all COMP nodes together. Up to three devices can be stacked, with total output current scaling linearly (e.g., 60A with three units).
What are the startup voltage options for TPS6287B20LA0WRZVR, and how are they selected?
The TPS6287B20LA0WRZVR offers resistor-selectable startup output voltage in two ranges: 0.4V–0.775V (25mV steps) or 0.8V–1.55V (50mV steps), configured via VSET1 and VSET2 pins. External resistors (6.2kΩ or 47kΩ to GND/VIN) set the initial VOUT before I²C takes control-enabling safe power-up sequencing without host processor involvement.
What thermal protection features does TPS6287B20LA0WRZVR provide?
The TPS6287B20LA0WRZVR includes thermal pre-warning at 150°C and thermal shutdown at 170°C, both with 20°C hysteresis. The thermal warning signal is accessible via I²C register read, allowing host firmware to throttle processing before shutdown occurs. These features ensure reliable operation in thermally constrained edge AI and industrial computing environments.
TPS6287B20LA0WRZVR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- TPS6287Bxx
- Package/Case:
- 24-PowerWFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Programmable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 0.4V
- Voltage - Output (Max):
- 0.775V
- Current - Output:
- 20A
- Frequency - Switching:
- 1.5MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 24-WQFN-FCRLF (4.05x3.05)
TPS6287B20LA0WRZVR FAQ
1.How can I place an order for TPS6287B20LA0WRZVR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS6287B20LA0WRZVR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS6287B20LA0WRZVR reliable?
The price and inventory of TPS6287B20LA0WRZVR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS6287B20LA0WRZVR is usually 5 days.
3.What payment methods are accepted for TPS6287B20LA0WRZVR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS6287B20LA0WRZVR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS6287B20LA0WRZVR?
TPS6287B20LA0WRZVR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS6287B20LA0WRZVR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS6287B20LA0WRZVR?
For technical support, including TPS6287B20LA0WRZVR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS6287B20LA0WRZVR requirements.
6.How does Aetrix verify that TPS6287B20LA0WRZVR is sourced from the original manufacturer or authorized distributors?
All TPS6287B20LA0WRZVR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS6287B20LA0WRZVR meets industry standards.
7.What is the process for return or replacement of TPS6287B20LA0WRZVR?
All TPS6287B20LA0WRZVR units undergo pre-shipment inspection (PSI). If there is an issue with TPS6287B20LA0WRZVR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS6287B20LA0WRZVR part is unused and in its original packaging.
Return procedure for TPS6287B20LA0WRZVR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS6287B20LA0WRZVR Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

