Texas Instruments TPS63710DRRT

Overview

TPS63710DRRT from Texas Instruments is a low-noise synchronous inverting buck converter generating regulated negative output voltages from +3.1 V to +14 V input. It delivers up to 1 A output current, achieves up to 91% efficiency at 1.5 MHz fixed switching frequency, maintains ±1.5% output voltage accuracy for VOUT ≤ –1.8 V, and produces only 22 µVRMS noise (10 Hz–100 kHz). It serves as a precision negative supply for high-performance ADC/DAC biasing in telecom infrastructure.

For engineers reviewing the TPS63710DRRT datasheet, TPS63710DRRT pinout, TPS63710DRRT application, or TPS63710DRRT equivalent, key selection criteria include its inverting topology, 3-mm × 3-mm WSON-12 package with exposed thermal pad, -1 V to -5.5 V programmable output range, 5-μA shutdown current, and integrated low-noise reference architecture requiring external CAP and CCP capacitors.

Technical Context

The TPS63710DRRT implements a fixed-frequency PWM-controlled inverting buck topology with synchronous rectification, where the CP–SW capacitor enables voltage inversion and limits maximum duty cycle to 70%. Its internal low-noise reference system uses an external RC filter on the CAP pin (100 kΩ internal resistor + CCAP) to suppress 1/f noise below 100 kHz, and regulates output by adjusting VREF via resistor divider feedback.

Functional protection includes undervoltage lockout (2.6 V threshold with 300 mV hysteresis sensed at VAUX), thermal shutdown at 160°C with 20°C hysteresis, open-drain power-good (PG) output with 10 µs de-glitch time, and VOUT discharge circuit active during shutdown. The device supports soft-start via internal 100 µA current source charging CCAP, with ramp time defined by CCAP value.

Key Specifications

Pinout & Package

The TPS63710DRRT is housed in a 3-mm × 3-mm, 12-pin WSON package (DRR suffix) with an exposed thermal pad that must be soldered to a GND plane for thermal and mechanical reliability.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar inverting buck converter applications.

Compared with TPS63710DRRR, the TPS63710DRRT offers identical performance but optimized tape-and-reel configuration for pick-and-place; versus LM5160QPWPRQ1, it delivers superior noise performance and integration at the cost of narrower input range and fixed inverting topology.

Availability

TPS63710DRRT is available at Aetrix Electronics and suitable for telecom infrastructure, optical module design, GaN-based RF power stages, and precision instrumentation requiring stable component supply with guaranteed long-term availability.

Supply support for TPS63710DRRT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader designing analog ICs, embedded processors, and system solutions for industrial, automotive, and communications markets.

The TPS63710DRRT belongs to TI's precision power management portfolio, engineered specifically for noise-sensitive applications requiring clean, programmable negative voltage rails in compact form factors.

FAQ

What is the minimum input voltage required for TPS63710DRRT to regulate –1.8 V output?

The TPS63710DRRT requires VIN ≥ 4.5 V to regulate –1.8 V output reliably. This stems from the |VOUT| < 0.7 × VIN constraint and 70% maximum duty cycle limit. At lower input voltages, the device cannot sustain regulation and enters dropout or shutdown. Data sheet Figure 37 confirms 4.5 V as the practical minimum for full 1-A load at –1.8 V.

How does the CAP pin capacitor affect TPS63710DRRT performance?

The CCAP capacitor on the CAP pin (Pin 6) directly controls soft-start ramp time and filters 1/f noise in the TPS63710DRRT reference system. A 1 µF capacitor yields ~1 ms ramp time (per Iramp = 100 µA), while larger values extend soft-start and further suppress low-frequency noise. Layout must keep this trace short and isolated from noisy nodes to preserve noise performance.

Can TPS63710DRRT drive a –5.5 V output at 1 A continuously?

No. While the TPS63710DRRT supports –5.5 V output voltage, delivering 1 A continuously at that level requires VIN > 7.86 V (since |VOUT| < 0.7 × VIN), and thermal limits become restrictive. At –5.5 V, full 1-A operation is only feasible above ~12 V input with aggressive PCB thermal design per RθJB = 18.9°C/W. Derating is recommended above 85°C ambient.

What is the purpose of the VAUX pin on TPS63710DRRT?

The VAUX pin (Pin 1) outputs a regulated ~4.6 V auxiliary supply derived from VIN, powering the TPS63710DRRT's internal control circuitry. It must connect to 0.08–1 µF ceramic capacitance to GND and supports ≤100 µA external load. Using VAUX for PG pull-up is allowed only if total VAUX current stays within 100 µA limit.

Does TPS63710DRRT support forced PWM mode or PFM operation?

No. The TPS63710DRRT operates exclusively in fixed-frequency PWM mode at 1.5 MHz and does not include pulse-frequency modulation (PFM) or forced-PWM selection. Its control loop maintains constant frequency across load and line variations, ensuring predictable EMI behavior and consistent filter design-ideal for noise-sensitive applications.