Texas Instruments TPS65023BRSBT
- Part No.:
- TPS65023BRSBT
- Manufacturer:
- Texas Instruments
- Category:
- Battery Management
- Package:
- 40-WFQFN Exposed Pad
- Datasheet:
-
TPS65023BRSBT.pdf
- Description:
- IC BAT PWR MGMT LI-ION 1C 40WQFN
- Quantity:
- Payment:

- Shipping:

Inventory:404
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Product details
Overview
TPS65023BRSBT from Texas Instruments is a highly integrated power management IC (PMIC) for single-cell Li-Ion/Li-Polymer systems, featuring three synchronous step-down DC/DC converters (1.7-A core, 1.2-A system, 1.0-A memory), two 200-mA general-purpose LDOs, one 30-mA RTC LDO/switch, I²C interface, dynamic voltage scaling (DVS), and battery backup functionality. It targets portable applications requiring precise rail sequencing, low quiescent current (85 µA), and thermal robustness (–40°C to 85°C).
For engineers reviewing the TPS65023BRSBT datasheet, TPS65023BRSBT pinout, TPS65023BRSBT application, or TPS65023BRSBT equivalent, this page delivers verified technical context, exact pin functions, confirmed I²C timing (100 ns setup/hold for TPS65023B), real-world DVS implementation details, and validated alternative PMICs with documented functional and application-level differences.
Technical Context
The TPS65023BRSBT integrates three independent buck converters with separate enable pins (DCDC1_EN, DCDC2_EN, DCDC3_EN), each supporting adjustable output via external resistor dividers on VDCDC1/VDCDC2/VDCDC3 feedback inputs and default selection via DEFDCDC1/DEFDCDC2/DEFDCDC3 digital inputs. Its I²C interface operates at up to 400 kHz and supports DVS, interrupt masking, and LDO voltage configuration - with TPS65023B-specific 100 ns timing compliance.
Two 200-mA LDOs (VLDO1/VLDO2) accept input from 1.5 V to 6.5 V and offer four preselectable output combinations via DEFLDO1/DEFLDO2 pins; the RTC output (VRTC) includes backup switching from VSYSIN or VBACKUP. Power-good monitoring, thermal shutdown (160°C), UVLO (2.35 V), and open-drain status outputs (INT, PWRFAIL, LOW_BAT, RESPWRON) provide comprehensive system supervision.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DC/DC1 Output Current | 1.7 A max - supports high-current processor core rails with minimal external components. |
| I²C Timing (TPS65023B) | 100 ns setup/hold - enables reliable communication with faster microcontrollers without timing margin risk. |
| LDO Output Current | 200 mA per LDO - sufficient for peripheral I/O, memory interfaces, or auxiliary logic without external regulators. |
| Quiescent Current | 85 µA - extends battery life in always-on or low-power standby modes. |
| Operating Temperature | –40°C to +85°C - qualified for industrial and consumer portable environments without derating. |
| Package | 40-pin WQFN (5 mm × 5 mm) - compact footprint with exposed thermal pad for efficient heat dissipation. |
| UVLO Threshold | 2.35 V (±2%) - prevents erratic operation during battery discharge below safe operating voltage. |
Pinout & Package
TPS65023BRSBT uses a 40-pin, 5.00 mm × 5.00 mm WQFN package (RSB) with an exposed thermal pad connected to AGND. Pin functions are electrically validated per TI SLVS670L Rev L datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DCDC1_EN (25) | Digital enable input | Direct hardware control of core DC/DC converter; logic high activates VDCDC1. |
| VDCDC1 (9) | Feedback sense input | Connects directly to VDCDC1 output for closed-loop regulation; sets output voltage with external resistor divider. |
| L1 (7) | Switch node | High-side FET drain connection point for VDCDC1 inductor; requires low-ESR ceramic capacitor and proper layout for EMI control. |
| VLDO1 (20) | LDO1 output | Provides regulated 1–3.15 V output; voltage selected by DEFLDO1/DEFLDO2 pins or I²C register. |
| SCLK (30) | I²C clock input | Accepts standard/fast-mode I²C clocks up to 400 kHz; TPS65023B requires ≤100 ns setup/hold time. |
| INT (28) | Interrupt output | Open-drain signal indicating fault conditions (PWRFAIL, LOW_BAT, thermal shutdown); requires external pull-up. |
Key Features
| Feature | Design Value |
|---|---|
| Dynamic Voltage Scaling (DVS) | Enables real-time core voltage adjustment via I²C to match processor workload, reducing active power by up to 40%. |
| Preselectable LDO Voltages | Four output combinations (e.g., 1.8 V / 2.8 V, 2.8 V / 3.3 V) set by two digital pins - eliminates need for external DAC or firmware configuration. |
| Battery Backup Path | Automatic switchover between VSYSIN and VBACKUP for VRTC - maintains RTC operation during main power loss without external diodes or controllers. |
| Externally Adjustable Reset Delay | TRESPWRON pin accepts 1 nF capacitor to generate 100 ms system reset pulse - configurable without changing firmware or BOM. |
| Low-Ripple PFM Mode | Maintains <10 mVpp output ripple at light loads - critical for noise-sensitive analog circuits and RF sections. |
Applications
| Digital Media Players | Smart Phones |
|---|---|
Use Scenario: Portable audio/video playback with multi-core SoC, display backlight, and SD card interface. IC Role / Device Role / Timing Role: Central PMIC supplying core (VDCDC1), I/O (VDCDC2), memory (VDCDC3), and camera LDOs while managing DVS and RTC backup. Use Value: Single-chip solution reduces board area by >35% vs discrete regulators and enables adaptive power states for 20+ hour battery life. |
Use Scenario: Compact smartphone platform with application processor, cellular modem, touchscreen controller, and flash storage. IC Role / Device Role / Timing Role: Primary power hub delivering sequenced rails, supervising brownout (PWRFAIL_SNS), and asserting system reset (RESPWRON) during power transitions. Use Value: Integrated power-good monitoring and thermal shutdown prevent data corruption during thermal throttling or battery sag. |
| Digital Still Cameras | DaVinci™ DSP Solutions |
Use Scenario: High-resolution image capture with CMOS sensor, ISP, and burst-mode flash LED driver. IC Role / Device Role / Timing Role: Supplies fast-transient 1.2-A VDCDC2 for sensor I/O and 1.0-A VDCDC3 for DDR memory, with LDOs for analog sensor bias. Use Value: Low-noise PFM mode ensures clean power for image sensor analog front-end, minimizing fixed-pattern noise. |
Use Scenario: TI DaVinci™ TMS320DM6446-based video encoder/decoder with DDR2, USB PHY, and HDMI transmitter. IC Role / Device Role / Timing Role: Reference-design-validated PMIC providing core (1.2 V), memory (1.8 V), and I/O (3.3 V) rails per DaVinci power architecture. Use Value: Predefined DEFDCDCx pin strapping matches DaVinci default voltages - eliminates custom firmware initialization for boot. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power management IC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023RSBT | I²C timing: 300 ns setup/hold (vs. 100 ns for TPS65023B); identical pinout, registers, and electrical specs otherwise. | Compatible with slower microcontrollers but may require timing guardbanding in 400-kHz I²C systems. | Select TPS65023RSBT only if host MCU I²C timing margins exceed 300 ns; otherwise TPS65023BRSBT ensures robustness. |
| TPS65070RSLR | Higher integration: adds 3rd LDO (200 mA), 2-channel LED driver, and dedicated USB LDO; different pinout and register map. | Targets feature-rich portable devices needing backlight control and USB power delivery - not drop-in compatible. | Choose TPS65070RSLR when adding LED driving or USB 5-V regulation justifies redesign; TPS65023BRSBT remains optimal for cost- and space-constrained DSC/media players. |
Compared with TPS65023RSBT, the TPS65023BRSBT provides tighter I²C timing for high-speed host interfaces without layout or firmware changes; compared with TPS65070RSLR, it offers lower BOM count and smaller footprint where LED/USB regulation is unnecessary.
Availability
TPS65023BRSBT is available at Aetrix Electronics and suitable for digital media players, smart phones, digital still cameras, and DaVinci™ DSP solutions requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for TPS65023BRSBT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with over 50 years of innovation in energy-efficient IC design.
The TPS6502x product line was engineered specifically for portable Li-ion-powered systems needing multi-rail efficiency, dynamic voltage scaling, and compact integration - targeting digital media, imaging, and DSP platforms.
FAQ
What is the key timing difference between TPS65023BRSBT and TPS65023RSBT?
The TPS65023BRSBT specifies 100 ns I²C setup and hold timing, whereas the TPS65023RSBT requires 300 ns. This allows the TPS65023BRSBT to interface reliably with faster microcontrollers operating at full 400 kHz I²C speed without timing margin compromises. All other electrical, functional, and pinout characteristics remain identical between the two variants.
How does the TPS65023BRSBT implement dynamic voltage scaling (DVS) for the core rail?
The TPS65023BRSBT implements DVS for VDCDC1 via its I²C interface: writing to the VDCDC1 register adjusts the output voltage in real time across a range of 0.6 V to VINDCDC1. This enables the host processor to lower core voltage during idle states and raise it during compute-intensive tasks - directly reducing dynamic power consumption without hardware modifications.
Can the LDO outputs VLDO1 and VLDO2 be set independently on the TPS65023BRSBT?
No - VLDO1 and VLDO2 share the same voltage selection logic. Their output values are jointly determined by the DEFLDO1 and DEFLDO2 pins, which select one of four predefined combinations (e.g., 1.8 V / 2.8 V or 2.8 V / 3.3 V). Independent programming requires I²C register writes, but both outputs update simultaneously per the selected pair.
What is the function of the TRESPWRON pin on the TPS65023BRSBT?
The TRESPWRON pin on the TPS65023BRSBT sets the duration of the active-low RESPWRON system reset pulse using an external capacitor. A 1 nF capacitor yields a nominal 100 ms delay, allowing precise synchronization of processor reset timing with power rail stabilization - eliminating the need for external RC timers or firmware delays.
Does the TPS65023BRSBT support battery backup for RTC operation?
Yes - the TPS65023BRSBT integrates a dedicated RTC LDO (VRTC) with automatic switchover between VSYSIN and VBACKUP inputs. When main power fails, the device seamlessly transfers RTC load to the backup battery without external circuitry, maintaining timekeeping accuracy and register retention down to VBACKUP = 1.8 V.
TPS65023BRSBT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 40-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Power Management
- Battery Chemistry:
- Lithium Ion/Polymer
- Number of Cells:
- 1
- Fault Protection:
- Over Temperature
- Interface:
- I2C
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-WQFN (5x5)
TPS65023BRSBT FAQ
1.How can I place an order for TPS65023BRSBT through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65023BRSBT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65023BRSBT reliable?
The price and inventory of TPS65023BRSBT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65023BRSBT is usually 5 days.
3.What payment methods are accepted for TPS65023BRSBT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65023BRSBT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS65023BRSBT?
TPS65023BRSBT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65023BRSBT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65023BRSBT?
For technical support, including TPS65023BRSBT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65023BRSBT requirements.
6.How does Aetrix verify that TPS65023BRSBT is sourced from the original manufacturer or authorized distributors?
All TPS65023BRSBT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65023BRSBT meets industry standards.
7.What is the process for return or replacement of TPS65023BRSBT?
All TPS65023BRSBT units undergo pre-shipment inspection (PSI). If there is an issue with TPS65023BRSBT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65023BRSBT part is unused and in its original packaging.
Return procedure for TPS65023BRSBT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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