Texas Instruments TPS65023QRSBRQ1
- Part No.:
- TPS65023QRSBRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Battery Management
- Package:
- 40-WFQFN Exposed Pad
- Datasheet:
-
TPS65023QRSBRQ1.pdf
- Description:
- IC BAT PWR MGMT LI-ION 1C 40WQFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,405
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS65023QRSBRQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive-qualified power management IC (PMIC) integrating three high-efficiency step-down DC/DC converters (1.5 A, 1.2 A, 1 A), three LDOs (30 mA RTC + 2 × 200 mA general-purpose), I²C interface, dynamic voltage scaling (DVS), and battery backup functionality - designed for single-cell Li-Ion/Li-Polymer powered infotainment and cluster systems.
For engineers reviewing the TPS65023QRSBRQ1 datasheet, TPS65023QRSBRQ1 pinout, TPS65023QRSBRQ1 application, or TPS65023QRSBRQ1 equivalent, key selection considerations include its triple-buck architecture with independent enable pins, preselectable LDO voltages via DEFLDO1/DEFLDO2, 85-μA quiescent current in PFM mode, thermal shutdown at 160°C, and support for automotive ambient operation from –40°C to 125°C.
Technical Context
The TPS65023QRSBRQ1 implements three synchronous buck converters using integrated P-channel and N-channel MOSFETs (rDS(on) ≤ 261 mΩ / 260 mΩ for DCDC1), operating at 1.95–2.55 MHz with soft-start ramp time of 750 μs and discharge resistance of 300 Ω per channel. Each converter supports fixed or resistor-divider-adjustable output voltage with ±1% to ±2% accuracy depending on FPWM mode.
Its dual 200-mA LDOs accept 1.5–6.5 V input and deliver 1–3.3 V outputs with load regulation of ±1%, while the 30-mA VRTC LDO provides backup rail switching between VSYSIN and VBACKUP with 12.5-Ω switch rDS(on), 3-V nominal output, and 10-μs regulation time under 10%–90% load steps.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DCDC1 Output Current | 1.5 A max - powers processor core rails with dynamic voltage scaling capability |
| DCDC2 Efficiency | Up to 95% - minimizes thermal load for system I/O voltage domain |
| I²C Interface Speed | 400 kHz - enables fast configuration and real-time DVS control in automotive environments |
| Quiescent Current | 85 μA (all DC/DC + LDOs enabled, no load) - meets stringent automotive standby power budgets |
| Operating Temperature | –40°C to 125°C ambient - qualified per AEC-Q100 Grade 1 for under-hood and dashboard applications |
| LDO Voltage Selection | Digital preselection via DEFLDO1/DEFLDO2 pins - sets four combinations of VLDO1/VLDO2 without I²C overhead |
| Thermal Shutdown | 160°C with 20°C hysteresis - protects against sustained overtemperature in enclosed enclosures |
Pinout & Package
TPS65023QRSBRQ1 is housed in a 40-pin WQFN package (5.0 mm × 5.0 mm, RSB variant) with exposed thermal pad connected to AGND. Pin functions are validated per TI SLVS927F Rev F datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DCDC1_EN (25) | Enable control input | Logic-high activates VDCDC1; allows independent sequencing of core rail |
| VDCDC1 (9) | Feedback sense input | Direct connection to output node for precision regulation of processor core voltage |
| L1 (7) | Switch node | Connects to external 1.5–2.2 µH inductor; carries high-frequency switching current for DCDC1 |
| PGND1 (8) | Power ground return | Low-impedance path for DCDC1 inductor current; must be routed separately from AGND |
| DEFLDO1 (12) / DEFLDO2 (13) | Digital voltage select inputs | Set default VLDO1/VLDO2 output combinations (e.g., 1.8 V / 3.3 V) at power-up before I²C initialization |
| SCLK (30) / SDAT (29) | I²C serial interface | Standard-mode/fast-mode compatible bus (≤400 kHz); supports DVS, interrupt masking, and LDO reconfiguration |
| VBACKUP (15) | RTC backup supply input | Accepts 2.73–3.75 V battery input; enables continuous RTC operation during main power loss |
| RESPWRON (27) | Open-drain reset output | Drives system reset line; delay set by external capacitor (e.g., 1 nF → 100 ms) |
Key Features
| Feature | Design Value |
|---|---|
| Triple synchronous buck architecture | Enables independent power domain control for core, I/O, and memory rails with minimal external components |
| Dynamic voltage scaling (DVS) | Allows real-time adjustment of VDCDC1 output via I²C to match processor performance states and reduce active power |
| Low-ripple PFM mode | Maintains high efficiency at light loads (<10 mA) while minimizing output voltage ripple for noise-sensitive analog circuits |
| Battery backup switching | Automatically transitions VRTC between VSYSIN and VBACKUP with <10-μs switchover time and 12.5-Ω switch resistance |
| AEC-Q100 Grade 1 qualification | Validated for automotive use with HBM ±2000 V, CDM ±1000 V (RSB), and 160°C thermal shutdown |
Applications
| Automotive Digital Cluster | Infotainment Head Unit |
|---|---|
Use Scenario: Centralized instrument cluster with LCD display, microcontroller, and CAN interface requiring multiple isolated voltage domains. IC Role / Device Role / Timing Role: PMIC supplies 1.2 V core (DCDC1), 3.3 V I/O (DCDC2), 1.8 V memory (DCDC3), 3.3 V peripherals (VLDO2), and 3 V RTC backup (VRTC). Use Value: Independent enable pins allow safe power sequencing; DVS reduces MCU active power by up to 30% during low-load states. |
Use Scenario: In-vehicle multimedia system with DSP, audio codec, USB, and touch controller operating from single Li-ion cell. IC Role / Device Role / Timing Role: Delivers regulated rails to DaVinci™ DSP family (VDCDC1), HDMI PHY (VDCDC2), DDR memory (VDCDC3), and audio subsystem (VLDO1/VLDO2). Use Value: Preselectable LDO voltages eliminate need for external resistors; 85-μA quiescent current extends battery runtime in key-off monitoring mode. |
| Automotive Digital Radio | Telematics Control Unit (TCU) |
Use Scenario: AM/FM/DAB radio module with tuner, demodulator, and audio DAC requiring clean, low-noise power rails. IC Role / Device Role / Timing Role: Powers RF front-end (VDCDC2), digital baseband (VDCDC1), memory buffer (VDCDC3), and real-time clock (VRTC) with low-ripple PFM operation. Use Value: Low-ripple PFM mode reduces switching noise coupling into sensitive RF paths, improving SNR by ≥6 dB. |
Use Scenario: Cellular-connected vehicle gateway managing LTE modem, GNSS receiver, and CAN/LIN interfaces. IC Role / Device Role / Timing Role: Supplies 1.8 V modem core (DCDC1), 3.3 V cellular transceiver (DCDC2), 1.2 V GNSS LNA (DCDC3), and always-on 3 V backup (VRTC). Use Value: Battery backup function maintains GPS almanac and network registration during engine-off periods, enabling cold-start TTFF <15 s. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power management IC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS650231RSBR | Non-automotive grade (industrial temp range –40°C to 85°C); identical pinout and register map but lacks AEC-Q100 qualification and thermal shutdown hysteresis tuning. | Suitable for non-safety-critical consumer or industrial embedded systems where automotive reliability is not required. | Select when cost sensitivity outweighs automotive qualification needs and ambient temperature stays below 85°C. |
| TPS65910A3RSLR | Higher integration: adds 4 additional LDOs, 2 more DC/DCs, and integrated RTC; larger 48-pin VQFN (7 mm × 7 mm); different I²C address and register layout. | Targeted at complex SoC platforms (e.g., OMAP, Sitara) requiring >5 rails and deeper power state control (RET/ON/OFF). | Choose when system complexity demands expanded rail count and advanced power-state sequencing beyond TPS65023QRSBRQ1's 6-rail capability. |
Compared with TPS650231RSBR, the TPS65023QRSBRQ1 delivers guaranteed automotive-grade robustness including 125°C operation and tighter ESD specs, while TPS65910A3RSLR offers greater scalability at the cost of increased footprint and firmware migration effort.
Availability
TPS65023QRSBRQ1 is available at Aetrix Electronics and suitable for automotive clusters, infotainment head units, and telematics control units requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for TPS65023QRSBRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of automotive IC design expertise and rigorous AEC-Q100 validation infrastructure.
The TPS65023-Q1 product line was engineered specifically for single-cell Li-ion powered automotive infotainment and instrumentation systems, emphasizing low quiescent current, multi-rail flexibility, and functional safety-aware features like independent enable control and thermal protection.
FAQ
What is the maximum output current supported by each DC/DC converter in the TPS65023QRSBRQ1?
The TPS65023QRSBRQ1 supports 1.5 A on DCDC1 (core rail), 1.2 A on DCDC2 (system I/O), and 1.0 A on DCDC3 (memory rail). These ratings are validated across –40°C to 125°C ambient with appropriate PCB layout, thermal pad soldering, and recommended external components (e.g., 2.2 µH inductors, 22 µF output capacitors). Derating applies above 85°C ambient.
How does the TPS65023QRSBRQ1 implement dynamic voltage scaling (DVS) for the processor core?
The TPS65023QRSBRQ1 implements DVS by allowing real-time adjustment of the VDCDC1 output voltage via its I²C interface - supporting programmable values within the 0.6 V to VCC range. This enables the host processor to lower core voltage during idle states, reducing dynamic power consumption proportionally to V². The TPS65023QRSBRQ1 maintains regulation accuracy of ±1% during transitions.
Can the TPS65023QRSBRQ1 operate without I²C communication after power-up?
Yes - the TPS65023QRSBRQ1 is fully functional without I²C. Default voltages for all DC/DCs and LDOs are set by hardware pins (DEFDCDC1–3, DEFLDO1–2), and enable signals (DCDCx_EN, LDO_EN) are asynchronous. I²C is optional for DVS, interrupt handling, or runtime reconfiguration; basic power delivery operates autonomously.
What is the purpose of the TRESPWRON pin on the TPS65023QRSBRQ1?
The TRESPWRON pin on the TPS65023QRSBRQ1 accepts an external timing capacitor to set the duration of the open-drain RESPWRON reset pulse. For example, a 1-nF capacitor yields a 100-ms reset assertion, ensuring reliable processor initialization. This eliminates need for external RC networks and provides precise, temperature-stable reset timing.
Does the TPS65023QRSBRQ1 support battery backup for real-time clock operation during main power loss?
Yes - the TPS65023QRSBRQ1 integrates a dedicated VRTC LDO with automatic switchover between VSYSIN and VBACKUP inputs. When main system voltage drops below 2.55 V (with 100-mV hysteresis), it seamlessly transfers to the backup battery (2.73–3.75 V range) to maintain 3-V RTC output, enabling continuous timekeeping and alarm functionality during ignition-off periods.
TPS65023QRSBRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 40-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Power Management
- Battery Chemistry:
- Lithium Ion/Polymer
- Number of Cells:
- 1
- Fault Protection:
- Over Temperature
- Interface:
- I2C
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-WQFN (5x5)
TPS65023QRSBRQ1 FAQ
1.How can I place an order for TPS65023QRSBRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65023QRSBRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65023QRSBRQ1 reliable?
The price and inventory of TPS65023QRSBRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65023QRSBRQ1 is usually 5 days.
3.What payment methods are accepted for TPS65023QRSBRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65023QRSBRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS65023QRSBRQ1?
TPS65023QRSBRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65023QRSBRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65023QRSBRQ1?
For technical support, including TPS65023QRSBRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65023QRSBRQ1 requirements.
6.How does Aetrix verify that TPS65023QRSBRQ1 is sourced from the original manufacturer or authorized distributors?
All TPS65023QRSBRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65023QRSBRQ1 meets industry standards.
7.What is the process for return or replacement of TPS65023QRSBRQ1?
All TPS65023QRSBRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS65023QRSBRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65023QRSBRQ1 part is unused and in its original packaging.
Return procedure for TPS65023QRSBRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS65023QRSBRQ1 Tags

-
BQ29700DSER
Texas Instruments

-
S-8241ABKMC-GBKT2G
ABLIC Inc.

-
S-8241ABPMC-GBPT2G
ABLIC Inc.

-
BQ27427YZFR
Texas Instruments

-
BQ27426YZFR
Texas Instruments

-
STC3117IJT
STMicroelectronics

-
STC3115IJT
STMicroelectronics

-
BQ76925RGER
Texas Instruments

-
NPM1100-QDAA-R
Nordic Semiconductor ASA

-
BQ27441DRZR-G1A
Texas Instruments

-
STC3115AIQT
STMicroelectronics

-
S-8252AAL-M6T1U
ABLIC Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

