Texas Instruments TPS650243QRHBRQ1
- Part No.:
- TPS650243QRHBRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Battery Management
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
TPS650243QRHBRQ1.pdf
- Description:
- IC BAT PWR MGMT LI-ION 1C 32VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,251
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Product details
Overview
TPS650243QRHBRQ1 from Texas Instruments is an automotive-qualified power management IC (PMIC) integrating three synchronous step-down converters (1.6-A VDCDC1, 1.0-A VDCDC2, 800-mA VDCDC3), two 200-mA adjustable LDOs, and a 30-mA always-on Vdd_alive LDO in a single 32-pin QFN package. It delivers 3.3-V/2.8-V I/O, 1.8-V/2.5-V memory, and 1.0-V/1.2-V processor core rails for Li-ion powered automotive infotainment and telematics systems.
For engineers reviewing the TPS650243QRHBRQ1 datasheet, TPS650243QRHBRQ1 pinout, TPS650243QRHBRQ1 application, or TPS650243QRHBRQ1 equivalent, key selection criteria include its AEC-Q100 Grade 2 qualification (–40°C to 125°C), dynamic voltage scaling on VDCDC3 via DEFDCDC3, 2.25-MHz switching frequency, 85-μA quiescent current in PFM mode, and integrated thermal shutdown protection.
Technical Context
The TPS650243QRHBRQ1 implements three independent synchronous buck regulators with voltage-mode control, input-voltage feed-forward compensation, and automatic transition between pulse-frequency modulation (PFM) at light loads and fixed-frequency PWM (2.25 MHz) under heavier loads. Each converter features soft-start (750 μs ramp), overcurrent limiting (1.20–1.40 A for VDCDC3), and internal high-side/low-side MOSFETs with specified RDS(ON) (e.g., 310–698 mΩ for VDCDC3 P-FET).
It integrates dual 200-mA LDOs with external feedback (FB_LDO1/FB_LDO2), a dedicated 30-mA Vdd_alive LDO (1.2 V ±1%), and system-level functions including power-fail detection (PWRFAIL_SNS/PWRFAIL), MODE pin for PWM/PFM selection, and EN_Vdd_alive for independent control of the always-on rail - all operating across a 2.5–6.0-V input range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDCDC1 Output | 3.3 V or 2.80 V fixed; adjustable 0.6–VINDCDC1 via resistor divider at DEFDCDC1 |
| VDCDC2 Output | 1.8 V or 2.5 V fixed; adjustable 0.6–VINDCDC2 via resistor divider at DEFDCDC2 |
| VDCDC3 Output | 1.0 V (DEFDCDC3 = LOW) or 1.2 V (DEFDCDC3 = HIGH); no resistor divider support |
| Switching Frequency | 2.25 MHz nominal; enables use of small 1.5–2.2-μH inductors and 10–22-μF ceramic output capacitors |
| Quiescent Current | 85 μA typical with all DC-DCs enabled, zero load, LDOs off - critical for battery runtime in sleep modes |
| Operating Temp Range | –40°C to 125°C ambient; qualified per AEC-Q100 Grade 2 for automotive under-hood and infotainment applications |
| Package | 32-pin QFN (RHB), 5 mm × 5 mm, exposed thermal pad - supports high-power density and thermal dissipation |
Pinout & Package
TPS650243QRHBRQ1 uses a 32-pin QFN (RHB) package with an exposed thermal pad connected to AGND. Pin assignments are fully defined in TI's SLVS994A datasheet, with dedicated analog/power grounds (AGND1, AGND2, PGND1–PGND3), switch nodes (L1–L3), feedback inputs (VDCDC1–VDCDC3), and configuration pins (DEFDCDC1–DEFDCDC3) enabling precise rail setup.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDCDC3 | Feedback input for core converter | Connects directly to VDCDC3 output for closed-loop regulation; sets 1.0 V or 1.2 V based on DEFDCDC3 logic level |
| PGND3 | Power ground for VDCDC3 | Low-impedance return path for high-frequency switching current; must be routed separately from AGND to minimize noise coupling |
| L3 | VDCDC3 switch node | Connects to external 1.5–2.2-μH inductor; carries high di/dt current; requires short, low-inductance PCB trace |
| VINDCDC3 | VDCDC3 input supply | Must be tied to same Li-ion battery or intermediate rail as VINDCDC1/VINDCDC2/VCC; 2.5–6.0 V operating range |
| DEFDCDC3 | VDCDC3 voltage select input | Logic-controlled pin: LOW = 1.0 V, HIGH = 1.2 V; supports dynamic voltage scaling during processor operation |
| EN_DCDC3 | VDCDC3 enable control | Active-high digital input; allows independent sequencing and power gating of processor core rail |
| AGND1 / AGND2 | Analog ground reference | Internally connected; serves as reference for feedback, LDOs, and comparators - requires solid low-noise ground plane |
| PowerPad | Thermal and electrical ground | Exposed pad beneath package; must be soldered to large copper pour tied to AGND for thermal performance and EMI reduction |
Key Features
| Feature | Design Value |
|---|---|
| Three integrated synchronous buck converters | Eliminates need for three discrete DC-DC modules; reduces BOM count, board area, and design complexity for multi-rail systems |
| Dynamic voltage scaling on VDCDC3 | Enables real-time adjustment of processor core voltage (1.0 V ↔ 1.2 V) via DEFDCDC3 pin - supports DVFS for power/performance optimization |
| Automated PFM/PWM mode transition | Maintains >90% efficiency from 10 mA to full load without external control - extends battery life in portable automotive devices |
| AEC-Q100 Grade 2 qualification | Validated for automotive environments with guaranteed operation from –40°C to 125°C ambient - suitable for infotainment head units and ADAS edge nodes |
| Dedicated 30-mA Vdd_alive LDO | Provides always-on 1.2-V supply for RTC, wake-up logic, or memory retention - independent of main DC-DC enable states |
Applications
| Automotive Infotainment Head Unit | Telematics Control Unit (TCU) |
|---|---|
Use Scenario: Central display unit with ARM-based SoC, touchscreen controller, audio codec, and GPS receiver powered by single Li-ion cell. IC Role / Device Role / Timing Role: PMIC supplies 3.3-V I/O, 1.8-V memory, and dynamically scaled 1.0/1.2-V core rails; manages power sequencing and wake-up via Vdd_alive. Use Value: Reduces component count by consolidating three DC-DCs and three LDOs into one QFN; meets AEC-Q100 requirements for dashboard-mounted electronics. | Use Scenario: Cellular-connected vehicle gateway handling LTE modem, CAN interface, and firmware updates over-the-air. IC Role / Device Role / Timing Role: Provides stable 2.5-V memory rail for modem flash, 3.3-V I/O for CAN transceivers, and 1.2-V core for application processor - all with thermal shutdown and UVLO protection. Use Value: 2.25-MHz switching enables compact 2.2-μH inductors and 22-μF ceramic caps; 85-μA quiescent current minimizes battery drain during parked state. |
| Digital Still Camera Module | Split-Supply DSP System |
Use Scenario: Automotive rear-view or surround-view camera using image sensor, ISP, and MIPI interface - powered by 3.7-V Li-ion pack. IC Role / Device Role / Timing Role: Delivers 1.8-V sensor I/O, 1.2-V ISP core, and 3.3-V MIPI PHY rails; Vdd_alive maintains clock and configuration during standby. Use Value: Soft-start (750 μs) prevents inrush current on startup; PFM mode ensures >90% efficiency at 50-mA sensor bias current. | Use Scenario: Radar signal processing module with dual-core DSP requiring asymmetric core/memory voltages and strict sequencing. IC Role / Device Role / Timing Role: Generates 1.0-V and 1.2-V core rails (via DEFDCDC3), 2.5-V memory, and 3.3-V I/O with independent EN_DCDCx controls for precise power-up order. Use Value: Separate enable pins allow staggered activation of rails to meet DSP boot timing constraints; LDO feedback pins support custom output voltages. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power management IC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS650241QRHBRQ1 | VDCDC3 outputs 0.9 V / 1.375 V; lower core voltage range than TPS650243QRHBRQ1's 1.0 V / 1.2 V | Better suited for ultra-low-power ARM Cortex-M cores requiring sub-1.0-V operation | Select when target SoC specifies 0.9-V minimum core voltage and supports tighter DVFS granularity |
| TPS650244QRHBRQ1 | VDCDC3 outputs 1.55 V / 1.6 V; higher core voltage range; rated for –40°C to 85°C only | Targeted at non-under-hood applications such as center console displays where junction temperature stays below 125°C | Choose for cost-sensitive consumer-grade automotive accessories where full Grade 2 thermal range is not required |
Compared with TPS650241QRHBRQ1 and TPS650244QRHBRQ1, the TPS650243QRHBRQ1 offers the optimal 1.0–1.2-V core voltage window for mainstream automotive application processors, retains full AEC-Q100 Grade 2 qualification, and provides identical feature set and pinout - enabling direct substitution in existing designs targeting mid-range performance-per-watt.
Availability
TPS650243QRHBRQ1 is available at Aetrix Electronics and suitable for automotive infotainment head units, telematics control units, and digital camera modules requiring stable component supply, AEC-Q100 compliance, and long-term production continuity.
Supply support for TPS650243QRHBRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and personal electronics markets.
The TPS65024x product line was designed specifically for Li-ion powered automotive systems requiring tightly regulated, sequenced, and dynamically scalable power rails - addressing needs of infotainment, telematics, and vision processing platforms.
FAQ
What is the maximum output current capability of the VDCDC3 converter in TPS650243QRHBRQ1?
The VDCDC3 converter in TPS650243QRHBRQ1 delivers up to 800 mA of continuous output current at its configured voltage (1.0 V or 1.2 V). This is validated across the full operating temperature range (–40°C to 125°C) and supports typical processor core loads in automotive SoCs. The forward current limit is specified at 1.00–1.40 A, providing margin against transient peaks.
Does TPS650243QRHBRQ1 support external resistor dividers on the DEFDCDC3 pin for adjustable VDCDC3 output?
No, TPS650243QRHBRQ1 does not support resistor divider configuration on the DEFDCDC3 pin. Unlike DEFDCDC1 and DEFDCDC2, DEFDCDC3 is a logic-select input only: LOW sets VDCDC3 to 1.0 V, HIGH sets it to 1.2 V. The datasheet explicitly states this pin cannot be connected to a resistor divider - it must be driven to a clean logic level for reliable dynamic voltage scaling.
What is the purpose of the Vdd_alive LDO in TPS650243QRHBRQ1, and what voltage does it provide?
The Vdd_alive LDO in TPS650243QRHBRQ1 provides a dedicated 1.2-V ±1% always-on supply capable of delivering 30 mA. Its role is to maintain power to critical low-power circuitry - such as real-time clocks, wake-up comparators, or configuration memory - even when all three main DC-DC converters and general-purpose LDOs are disabled. It is controlled independently via the EN_Vdd_alive pin.
How does the MODE pin affect the operation of TPS650243QRHBRQ1's DC-DC converters?
The MODE pin in TPS650243QRHBRQ1 selects between two operating modes for all three DC-DC converters: logic LOW enables Power Safe Mode (automatic PFM/PWM transition), while logic HIGH forces fixed-frequency PWM mode across all load conditions. In Power Safe Mode, quiescent current drops to 85 μA at light loads; forced PWM improves ripple and transient response but increases light-load current consumption.
Is TPS650243QRHBRQ1 pin-compatible with other members of the TPS65024x family, such as TPS650241QRHBRQ1 and TPS650244QRHBRQ1?
Yes, TPS650243QRHBRQ1 is pin-compatible with TPS650241QRHBRQ1 and TPS650244QRHBRQ1 - all share the identical 32-pin QFN (RHB) package, pinout, and terminal functions. Differences are limited to default VDCDC3 output voltages and temperature grade (TPS650244QRHBRQ1 is rated to 85°C ambient). This enables drop-in replacement in existing layouts when adjusting core voltage requirements.
TPS650243QRHBRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Power Management
- Battery Chemistry:
- Lithium Ion/Polymer
- Number of Cells:
- 1
- Fault Protection:
- Over Temperature, Under Voltage
- Interface:
- -
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-VQFN (5x5)
TPS650243QRHBRQ1 FAQ
1.How can I place an order for TPS650243QRHBRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS650243QRHBRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS650243QRHBRQ1 reliable?
The price and inventory of TPS650243QRHBRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS650243QRHBRQ1 is usually 5 days.
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5.How can I obtain technical support or documentation for TPS650243QRHBRQ1?
For technical support, including TPS650243QRHBRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS650243QRHBRQ1 requirements.
6.How does Aetrix verify that TPS650243QRHBRQ1 is sourced from the original manufacturer or authorized distributors?
All TPS650243QRHBRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS650243QRHBRQ1 meets industry standards.
7.What is the process for return or replacement of TPS650243QRHBRQ1?
All TPS650243QRHBRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS650243QRHBRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS650243QRHBRQ1 part is unused and in its original packaging.
Return procedure for TPS650243QRHBRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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