Texas Instruments TPS65086100RSKR
- Part No.:
- TPS65086100RSKR
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 64-VFQFN Exposed Pad
- Datasheet:
-
TPS65086100RSKR.pdf
- Description:
- IC REG CTRLR FPGA 13OUT 64VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS65086100RSKR from Texas Instruments is a programmable multirail power-management IC (PMIC) for multicore processors, FPGAs, and embedded systems. It integrates three D-CAP2™ synchronous step-down controllers (5.6V–21V input, up to 30A scalable via external FETs), three DCS-Control synchronous converters (3V–5.5V input, 3A each), three adjustable LDOs, a DDR VTT LDO, and three slew-rate-controlled load switches - all in a single 64-pin VQFN package.
For engineers reviewing the TPS65086100RSKR datasheet, TPS65086100RSKR pinout, TPS65086100RSKR application, or TPS65086100RSKR equivalent, this device supports I²C-based dynamic voltage scaling (DVS) across six SMPS rails, OTP-programmable sequencing, thermal monitoring, and flexible GPIO configuration for system-level power control in industrial vision, test equipment, and embedded PCs.
Technical Context
The TPS65086100RSKR implements dual topology regulation: D-CAP2™ for high-transient-response core rails (BUCK1/2/6) with 10 mV or 25 mV DVS steps, and DCS-Control for memory/system rails (BUCK3/4/5) with 25 mV DVS resolution. Each controller supports remote sensing, programmable current limiting via ILIM pins, and auto-discharge control.
Its digital subsystem includes two banks of one-time programmable (OTP) memory for voltage/sequence defaults, six configurable GPIs (CTL1–CTL6) for rail enable/sleep control, four GPOs for power-good signaling, and an open-drain IRQB interrupt output - all managed via I²C at up to 1 MHz (Fast Mode Plus).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 5.6V to 21V for BUCK1/2/6 controllers; 3V to 5.5V for BUCK3/4/5 converters - enables direct connection to wide-input industrial supplies and battery stacks. |
| Output Voltage Resolution | 10 mV steps (0.41V–1.67V) or 25 mV steps (1V–3.575V) for D-CAP2™ rails; 25 mV steps (0.425V–3.575V) for DCS-Control rails - supports precise core voltage tuning for SoC DVFS. |
| Max Output Current | Scalable up to 30A via external FETs on controllers; fixed 3A per DCS-Control converter; 600mA per LDOA2/A3 - accommodates high-power FPGA cores and low-noise analog rails. |
| I²C Interface Speed | Supports Standard (100 kHz), Fast (400 kHz), and Fast Mode Plus (1 MHz) - allows real-time DVS and status polling without CPU overhead in latency-sensitive applications. |
| Thermal Protection | Critical shutdown at 130°C–160°C with 10°C hysteresis; hot warning at 110°C–120°C - ensures safe operation under sustained load in enclosed industrial enclosures. |
| OTP Memory | Two independent banks for factory-programmed default voltages and power-up/down sequencing - eliminates need for external configuration EEPROM or boot-time I²C initialization. |
| Package | VQFN-64 (8.0 mm × 8.0 mm) with exposed thermal pad - provides low thermal resistance (RθJB = 4.4°C/W) for conduction-cooled PCB layouts. |
Pinout & Package
VQFN-64 (RSKR) package with 8.0 mm × 8.0 mm body size and exposed thermal pad connected to PGND. Thermal pad requires multiple vias to internal ground plane for optimal thermal performance (RθJB = 4.4°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FBVOUT1–FBVOUT6 | Remote feedback sense inputs | Enable Kelvin sensing for ±2% DC accuracy; connect directly to output capacitor terminals to reject PCB trace IR drop. |
| ILIM1, ILIM2, ILIM6 | Current limit set inputs | Accept resistor-to-ground to program valley current limit for external low-side FETs - sets max output current per controller bank. |
| CTL1–CTL6 | Configurable enable/sleep inputs | Active-high signals assignable to enable/disable or enter sleep mode for any rail group - supports hierarchical power states. |
| GPO1–GPO4 | Programmable power-good outputs | Open-drain or push-pull outputs configurable to reflect PGOOD status of any selected rail - simplifies system power sequencing validation. |
| IRQB | Open-drain interrupt output | Asserts on thermal fault, UVLO, OCP, or OTP programming completion - used for host processor alert without polling. |
| LX3–LX5, SW1–SW6 | Switch node connections | Direct connection points for external high-side/low-side FETs - require careful layout to minimize EMI and gate drive loop inductance. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-regulator topology | D-CAP2™ for fast transient response on processor cores; DCS-Control for stable, low-noise memory/system rails - optimizes both speed and ripple performance. |
| OTP-programmable sequencing | Two independent OTP banks store voltage defaults and power-up/down order - enables deterministic, repeatable startup without firmware dependency. |
| I²C DVS with sub-10mV resolution | 10 mV steps over 0.41V–1.67V range allow fine-grained core voltage adjustment for dynamic power/performance trade-offs in multicore SoCs. |
| VTT LDO with remote sensing | VTT output regulated using VTTFB feedback pin - maintains tight DDR termination voltage accuracy despite board-level IR drop. |
| Slew-controlled load switches | Three integrated switches with <96 mΩ RDS(ON) at 1.8V and controlled turn-on rate - prevent inrush current and supply droop during peripheral power-up. |
Applications
| Programmable Logic Controller (PLC) | Machine Vision Camera |
|---|---|
Use Scenario: Industrial PLC with multicore ARM Cortex-A processor, FPGA I/O expansion, and isolated analog sensor interfaces. IC Role / Device Role / Timing Role: Central PMIC supplying core (1.2V), I/O (3.3V), DDR (1.35V), and auxiliary rails (5V, 1.8V) with synchronized sequencing and thermal monitoring. Use Value: Single-chip integration reduces BOM count by >12 discrete regulators; OTP sequencing ensures deterministic boot across temperature (-40°C to +85°C). |
Use Scenario: High-resolution CMOS image sensor module with FPGA-based preprocessing, GigE Vision interface, and on-board flash storage. IC Role / Device Role / Timing Role: Powers image sensor analog bias (1.8V), digital core (1.1V), DDR3 memory (1.5V), and GigE PHY (3.3V) with independent DVS control per rail. Use Value: DCS-Control converters deliver <15 mVpp ripple on memory rails; VTT LDO maintains ±1% DDR termination accuracy for error-free high-speed data capture. |
| Video Surveillance System | Test and Measurement Equipment |
Use Scenario: Multi-channel HD video encoder with H.265 compression, AI inference accelerator, and PoE+ powered backplane. IC Role / Device Role / Timing Role: Supplies SoC core (1.0V), NPU (0.85V), DDR4 (1.2V), PCIe Gen3 (3.3V), and PoE interface (5V) with rail-specific power-good signaling. Use Value: Six GPOs map to individual rail PGOOD signals - enables hardware-level validation of full power tree before firmware execution. |
Use Scenario: Benchtop oscilloscope with ADC front-end (1.8V), FPGA signal processing (1.2V), DAC output stage (3.3V), and USB 3.0 interface (5V). IC Role / Device Role / Timing Role: Delivers ultra-low-noise LDOA1 (1.35–3.3V) for analog sensor bias and clean 3.3V LDO3P3 for logic - minimizing measurement noise floor. Use Value: LDOA1's 200mA output with <3% accuracy and <10 µVrms noise ensures <0.01% THD+N in precision analog signal paths. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multirail PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS650864100RSKR | Same pinout and OTP architecture but adds integrated 5V/3A buck converter (replacing external 5V supply); removes one LDO (LDOA3). | Better suited for designs requiring higher-efficiency 5V rail generation without external converter; less flexible for triple-LDO analog biasing. | Select when system requires integrated 5V buck and can omit third adjustable LDO; verify OTP programming compatibility. |
| MAX77812AEWL+T | 6-channel PMIC with 4 buck converters (up to 4A), 2 LDOs, no VTT LDO; I²C only (no OTP); smaller 40-pin WLP package. | Targeted at space-constrained portable devices; lacks DDR termination support and OTP-based sequencing - requires runtime firmware control. | Choose for compact battery-powered applications where DDR termination and factory-programmed sequencing are not required. |
Compared with TPS65086100RSKR, TPS650864100RSKR offers higher integration for 5V generation but reduced LDO flexibility, while MAX77812AEWL+T trades OTP autonomy and DDR support for footprint reduction and mobile-optimized efficiency.
Availability
TPS65086100RSKR is available at Aetrix Electronics and suitable for programmable logic controllers, machine vision cameras, video surveillance systems, test and measurement instruments, and embedded PCs requiring stable component supply, long-term lifecycle support, and consistent OTP programming services.
Supply support for TPS65086100RSKR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability industrial and automotive power solutions.
The TPS650861 product line delivers highly configurable, OTP-programmable PMICs for multicore processors and FPGAs - designed to simplify power architecture in complex embedded systems while ensuring robust thermal, sequencing, and voltage regulation performance.
FAQ
What is the primary function of the TPS65086100RSKR in a system?
The TPS65086100RSKR serves as a fully integrated, programmable power-management IC that supplies and sequences multiple voltage rails for multicore processors, FPGAs, and embedded systems. It combines three D-CAP2™ controllers, three DCS-Control converters, three adjustable LDOs, a DDR VTT LDO, and three load switches - all coordinated via I²C and factory-programmable OTP memory. Its role is to replace 10+ discrete regulators while enabling deterministic, low-risk power-up in industrial and vision applications.
Does the TPS65086100RSKR support dynamic voltage scaling (DVS)?
Yes, the TPS65086100RSKR supports I²C-based dynamic voltage scaling across all six SMPS rails. BUCK1/2/6 controllers offer 10 mV steps from 0.41V to 1.67V or 25 mV steps from 1V to 3.575V; BUCK3/4/5 converters support 25 mV steps from 0.425V to 3.575V. This enables real-time core voltage adjustment for performance/power optimization in SoCs and FPGAs - a key capability confirmed in TI's SWCS142A datasheet Section 1 and Table 5.7.
How is power sequencing configured on the TPS65086100RSKR?
Power sequencing on the TPS65086100RSKR is configured using two banks of one-time programmable (OTP) memory. These banks store default output voltages and precise power-up/down timing relationships between rails - eliminating runtime I²C initialization. Sequencing is defined during manufacturing or by authorized distributors using dedicated programming hardware and 7V signals on CTL4/IRQB pins, as specified in Section 6.7 and Figure 6-1 of the datasheet.
What thermal protection features does the TPS65086100RSKR include?
The TPS65086100RSKR includes dual thermal thresholds: a hot warning flag triggers at 110°C–120°C (THOT), and critical thermal shutdown activates at 130°C–160°C (TCRIT), both with 10°C hysteresis. These thresholds are monitored continuously by an on-die thermal sensor and reported via IRQB interrupt or I²C registers. The device's VQFN-64 package achieves RθJB = 4.4°C/W, supporting reliable operation up to +85°C ambient in properly cooled industrial PCBs.
Can the TPS65086100RSKR be used for DDR memory termination?
Yes, the TPS65086100RSKR includes a dedicated VTT LDO with remote sensing (VTTFB pin) specifically designed for DDR memory termination. It regulates VTT to half the FBVOUT6 reference voltage (typically 0.675V for DDR3 or 0.6V for DDR4), maintaining ±1% accuracy across load and temperature. The VTT output (pin 47) supports up to 3A sink/source and requires two 22µF ceramic capacitors, as detailed in Section 5.9 and Figure 4-1 of the datasheet.
TPS65086100RSKR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- D-CAP2™
- Package/Case:
- 64-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Controller, Multicore, CPU, FPGA, SOC’s
- Voltage - Input:
- 5.6V ~ 21V
- Number of Outputs:
- 13
- Voltage - Output:
- Multiple
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-VQFN (8x8)
TPS65086100RSKR FAQ
1.How can I place an order for TPS65086100RSKR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65086100RSKR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65086100RSKR reliable?
The price and inventory of TPS65086100RSKR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65086100RSKR is usually 5 days.
3.What payment methods are accepted for TPS65086100RSKR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65086100RSKR transactions.
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4.How is shipping managed for TPS65086100RSKR?
TPS65086100RSKR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65086100RSKR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65086100RSKR?
For technical support, including TPS65086100RSKR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65086100RSKR requirements.
6.How does Aetrix verify that TPS65086100RSKR is sourced from the original manufacturer or authorized distributors?
All TPS65086100RSKR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65086100RSKR meets industry standards.
7.What is the process for return or replacement of TPS65086100RSKR?
All TPS65086100RSKR units undergo pre-shipment inspection (PSI). If there is an issue with TPS65086100RSKR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65086100RSKR part is unused and in its original packaging.
Return procedure for TPS65086100RSKR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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