Texas Instruments TPS65086401RSKR
- Part No.:
- TPS65086401RSKR
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 64-VFQFN Exposed Pad
- Datasheet:
-
TPS65086401RSKR.pdf
- Description:
- IC REG CTLR DGTL CAM 9OUT 64VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,497
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Product details
Overview
TPS65086401RSKR from Texas Instruments is a configurable multirail power-management IC (PMIC) designed specifically for Xilinx Zynq Ultrascale+ MPSoCs (ZU2–ZU5), integrating three D-CAP2™ step-down controllers (5.6V–21V input), three DCS-Control synchronous buck converters (3V–5.5V input, up to 3A each), and six LDOs including VTT termination. It delivers precise I²C-controlled voltage scaling (10mV/25mV steps) and supports DDR memory termination in machine vision and embedded PC applications.
For engineers reviewing the TPS65086401RSKR datasheet, TPS65086401RSKR pinout, TPS65086401RSKR application, or TPS65086401RSKR equivalent, this page provides verified technical context, validated pin functions, confirmed rail configurations per device variant, thermal performance data, and real-world selection guidance for FPGA/MPSoC power architecture design.
Technical Context
The TPS65086401RSKR implements six independent voltage rails with factory-programmed OTP defaults optimized for ZU2–ZU5 devices: BUCK1 at 1.8V (25mV step), BUCK2 at 0.85V (10mV), BUCK3 at 0.85V (25mV), BUCK4/BUCK5 at 3.3V (25mV), and BUCK6 at 1.5V/1.2V/1.1V (10mV). Its dual topology-D-CAP2™ for high-transient core rails and DCS-Control™ for system/memory rails-enables fast load-step response while maintaining stability with small external passives.
Control is implemented via a 1MHz-capable I²C interface supporting standard/fast/fast-plus modes, six configurable GPI pins (CTL1–CTL6) for enable/sleep sequencing, and four programmable GPOs for power-good monitoring. Thermal management relies on an 8mm × 8mm VQFN-64 package with exposed thermal pad (RθJB = 4.4°C/W) and integrated die temperature monitoring with critical shutdown at 130–160°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 5.6V–21V for D-CAP2 controllers; 3V–5.5V for DCS-Control converters - supports 2S/3S/4S Li-ion battery packs and wall adapters. |
| Output Voltage Steps | 10mV (0.41V–1.67V) or 25mV (1V–3.575V) I²C DVS resolution - enables fine-grained core voltage tuning for dynamic power optimization. |
| Max Output Current | 3A per DCS-Control buck converter; scalable current limit for D-CAP2 controllers via external FETs and ILIM resistors. |
| LDO Outputs | LDOA1 (1.8V, 200mA), LDOA2/LDOA3 (1.2V, 600mA each), VTT LDO (DDR termination), LDO3P3 (3.3V), LDO5P0 (5V) - covers analog, I/O, and gate driver supply needs. |
| I²C Interface Speed | Up to 1MHz (fast mode plus) - allows rapid rail configuration and telemetry reads during boot and runtime state transitions. |
| Thermal Resistance | RθJB = 4.4°C/W - enables reliable operation up to 85°C ambient with standard PCB copper pour and thermal vias to ground plane. |
| Package | VQFN-64 (RSKR), 8.0mm × 8.0mm, 0.4mm pitch - single-row layout simplifies routing and supports high-density FPGA carrier board designs. |
Pinout & Package
TPS65086401RSKR uses an 8mm × 8mm, 64-pin VQFN package (RSKR) with exposed thermal pad connected to PCB ground plane for optimal thermal dissipation (RθJB = 4.4°C/W). Pin functions are fully defined in TI's SWCS138G datasheet, with dedicated terminals for six buck regulators, three LDOs, two load switches, VTT termination, I²C, control inputs (CTL1–CTL6), and general-purpose outputs (GPO1–GPO4).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FBVOUT1–FBVOUT6 | Remote feedback sense for buck controllers | Enables precision regulation by sensing at output capacitor; connect to positive terminal of respective cap or ground if unused. |
| DRVH1–DRVH6 / DRVL1–DRVL6 | High-side/low-side gate drivers | Drive external N-channel MOSFETs; DRVHx sourced/sunk ±50mA; DRVLx resistance ≤3Ω - supports discrete FET selection for current scalability. |
| ILIM1 / ILIM2 / ILIM6 | Current limit set inputs | Accept resistor-to-ground to program valley current limit for external low-side FETs - enables overcurrent protection tailored to specific FET RDS(on). |
| LDOA1 / LDOA2 / LDOA3 / LDO3P3 / LDO5P0 | Regulated voltage outputs | Deliver fixed/adjustable voltages: LDOA1=1.8V/200mA, LDOA2/A3=1.2V/600mA, LDO3P3=3.3V, LDO5P0=5V - power SoC I/O, analog blocks, and gate drivers. |
| VTT / VTTFB / PVINVTT | VTT DDR termination LDO | Provides split-rail DDR termination with remote sensing (VTTFB); PVINVTT accepts 1.5V–5.5V input - meets JEDEC DDR4/DDR5 VTT accuracy requirements. |
| CTL1–CTL6 | Configurable enable/sleep control inputs | Factory-programmed as active-high VR enables or active-low sleep entry (CTL3/CTL6) - enables hardware-based power sequencing without software intervention. |
| GPO1–GPO4 | Programmable power-good outputs | Can reflect PGOOD status of any rail or be controlled via I²C register - used for inter-rail sequencing, fault signaling, or enabling downstream supplies. |
| CLK / DATA | I²C interface signals | Support 100kHz/400kHz/1MHz operation; open-drain DATA requires pull-up; robust ESD rating (±1000V HBM) - ensures reliable digital control in noisy industrial environments. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-regulator topology | D-CAP2™ for fast transient core rails + DCS-Control™ for stable memory/system rails - eliminates need for separate PMICs in Zynq Ultrascale+ designs. |
| Factory OTP configuration | Default rail voltages, sequencing, and CTL/GPO assignments pre-programmed for ZU2–ZU5 - reduces firmware initialization overhead and boot-time validation effort. |
| VTT LDO with remote sensing | VTTFB pin enables Kelvin connection to DDR VTT net - maintains ±1% regulation accuracy under dynamic load conditions required for DDR4/DDR5 compliance. |
| Load switch slew rate control | SWA1/SWB1/SWB2 support controlled turn-on to limit inrush current - prevents system brownout during hot-plug or power-state transitions. |
| Thermal monitoring with hysteresis | THOT (110–120°C) and TCRIT (130–160°C) thresholds with 10°C hysteresis - enables graceful throttling before shutdown, preserving system state during thermal stress. |
| 5V LDO with auto-switching | LDO5P0 automatically routes to external 5V buck when available - improves efficiency by bypassing internal LDO conduction loss during high-current operation. |
Applications
| Machine Vision Camera | Embedded PC |
|---|---|
Use Scenario: High-resolution image capture with real-time ISP processing and DDR4 video buffering. IC Role / Device Role / Timing Role: Primary PMIC supplying Zynq Ultrascale+ ZU3/ZU4 core (BUCK1 @ 1.8V), PS DDR (VTT), PL memory rails (BUCK4/5 @ 3.3V), and I/O banks (LDOA1 @ 1.8V). Use Value: Factory-configured 1.8V/0.85V/3.3V rail defaults reduce bring-up time; DCS-Control converters maintain <±1% output regulation during burst-mode sensor readout. |
Use Scenario: Fanless industrial PC with Zynq MPSoC running Linux, PCIe peripherals, and dual-display HDMI output. IC Role / Device Role / Timing Role: Centralized power hub delivering core (BUCK2 @ 0.85V), DDR (VTT), GTY transceivers (LDOA2 @ 1.2V), and USB/PCIe I/O (LDO3P3 @ 3.3V). Use Value: Six independent GPOs provide sequenced PGOOD signals to BIOS/firmware; thermal shutdown at 130°C prevents damage during sustained CPU+GPU workloads. |
| Video Surveillance NVR | Portable Ultrasound |
Use Scenario: Multi-channel HD video encoding with AI-accelerated analytics and NVMe storage. IC Role / Device Role / Timing Role: Powers ZU5 application processor cores (BUCK1 @ 1.8V), DDR4 memory subsystem (VTT + BUCK4/5 @ 3.3V), and PCIe Gen3 PHY (LDOA3 @ 1.2V). Use Value: I²C DVS enables dynamic voltage scaling during encode vs. idle states; 1MHz interface allows sub-10µs rail reconfiguration for latency-critical analytics pipelines. |
Use Scenario: Battery-powered handheld ultrasound with real-time beamforming and display rendering. IC Role / Device Role / Timing Role: Manages 3S Li-ion input (11.1V nominal) to generate 0.85V PL core, 1.2V analog front-end, 3.3V display interface, and VTT for DDR3L memory. Use Value: 65µA shutdown current extends battery life; D-CAP2 topology sustains regulation during 5A pulsed transmit bursts without output droop. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multirail PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS6508640RSKR | Default rail set for ZU7–ZU15: BUCK1=3.3V, BUCK2=0.85V/0.9V, BUCK3=1.2V - lacks 1.5V/1.2V/1.1V triple option on BUCK6. | Targeted at higher-core-count Zynq Ultrascale+ devices requiring 3.3V I/O and 1.2V memory rails; not optimized for ZU2–ZU5 VCCINT profiles. | Select TPS6508640RSKR only when powering ZU7+ devices with 3.3V PL I/O banks and no requirement for multi-voltage BUCK6 sequencing. |
| TPS6508641RSKR | BUCK1 configured for external feedback (Ext FB); BUCK3=1.1V/1.2V; BUCK6=1.8V - differs in default VID mapping and lacks 1.5V/1.2V/1.1V triple option. | Designed for ZU2–ZU5 with external voltage divider feedback on BUCK1; supports tighter core voltage tolerance but requires additional resistor network. | Choose TPS6508641RSKR when BUCK1 requires ±0.5% regulation via external resistor divider and system layout accommodates extra components. |
Compared with TPS65086401RSKR, TPS6508640RSKR offers higher base I/O voltage (3.3V vs. 1.8V) but less flexible BUCK6 options, while TPS6508641RSKR trades factory-set simplicity for external feedback precision on BUCK1 - making TPS65086401RSKR optimal for ZU2–ZU5 designs needing out-of-box 1.8V core, 3.3V I/O, and triple-voltage BUCK6 sequencing.
Availability
TPS65086401RSKR is available at Aetrix Electronics and suitable for machine vision cameras, embedded PCs, and portable ultrasound systems requiring stable component supply, long-term lifecycle support, and guaranteed traceability for medical and industrial deployments.
Supply support for TPS65086401RSKR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability power solutions for FPGA and SoC platforms.
The TPS650864 family was engineered to consolidate power delivery for Xilinx Zynq Ultrascale+ MPSoCs and FPGAs - reducing bill-of-materials count, minimizing PCB area, and simplifying firmware-controlled power sequencing in space-constrained embedded systems.
FAQ
What is the primary target application for TPS65086401RSKR?
TPS65086401RSKR is specifically configured for Xilinx Zynq Ultrascale+ ZU2–ZU5 MPSoCs, providing factory-programmed rail voltages (1.8V BUCK1, 0.85V BUCK2, 3.3V BUCK4/5, 1.5V/1.2V/1.1V BUCK6) and sequencing logic optimized for machine vision, embedded PCs, and portable ultrasound systems. Its OTP settings eliminate manual configuration for these devices.
Does TPS65086401RSKR support DDR4 VTT termination?
Yes, TPS65086401RSKR integrates a dedicated VTT LDO with remote sensing (VTTFB pin) and accepts 1.5V–5.5V input on PVINVTT. It regulates VTT to half the BUCK6 output voltage (e.g., 0.75V for 1.5V BUCK6), meeting JEDEC DDR4 VTT accuracy and transient response requirements without external components.
How does the I²C interface of TPS65086401RSKR support dynamic voltage scaling?
TPS65086401RSKR supports I²C DVS with 10mV steps (0.41V–1.67V) and 25mV steps (1V–3.575V) across all six buck regulators. The interface operates up to 1MHz (fast mode plus), enabling sub-10µs voltage updates - critical for real-time power optimization in Zynq-based AI inference or video encoding workloads.
What thermal performance can be expected from TPS65086401RSKR in a typical 4-layer PCB?
With its 8mm × 8mm VQFN-64 package and exposed thermal pad, TPS65086401RSKR achieves RθJB = 4.4°C/W. On a standard 4-layer board with 2oz copper, thermal vias under the pad, and 2in² ground pour, it sustains full load at 85°C ambient - verified by TI's SWCS138G thermal characterization data.
Can TPS65086401RSKR replace TPS6508640RSKR in a ZU5 design?
TPS65086401RSKR is preferred for ZU5 due to its 1.8V BUCK1 default (vs. 3.3V on TPS6508640RSKR) and triple-voltage BUCK6 (1.5V/1.2V/1.1V), which align with ZU5 VCCINT and auxiliary rail requirements. Swapping requires verifying BUCK1 voltage compatibility and updating OTP-dependent sequencing logic in firmware.
TPS65086401RSKR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- D-CAP2™
- Package/Case:
- 64-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Controller/Converter, Digital Cameras
- Voltage - Input:
- 5.6V ~ 21V
- Number of Outputs:
- 9
- Voltage - Output:
- Multiple
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-VQFN (8x8)
TPS65086401RSKR FAQ
1.How can I place an order for TPS65086401RSKR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65086401RSKR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65086401RSKR reliable?
The price and inventory of TPS65086401RSKR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65086401RSKR is usually 5 days.
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Once your TPS65086401RSKR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65086401RSKR?
For technical support, including TPS65086401RSKR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65086401RSKR requirements.
6.How does Aetrix verify that TPS65086401RSKR is sourced from the original manufacturer or authorized distributors?
All TPS65086401RSKR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65086401RSKR meets industry standards.
7.What is the process for return or replacement of TPS65086401RSKR?
All TPS65086401RSKR units undergo pre-shipment inspection (PSI). If there is an issue with TPS65086401RSKR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65086401RSKR part is unused and in its original packaging.
Return procedure for TPS65086401RSKR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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