Texas Instruments TPS65101RGER
- Part No.:
- TPS65101RGER
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
TPS65101RGER.pdf
- Description:
- IC REG CTRLR TFT 4OUT 24VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS65101RGER from Texas Instruments is a triple-output LCD power supply IC integrating a 1.6-MHz boost converter (VO1 up to 15 V / 350 mA), a regulated negative charge pump (VO2 down to –12 V / 20 mA), a positive charge pump (VO3 up to 30 V / 20 mA), an integrated VCOM buffer, and a 3.3-V linear regulator controller - all in a single VQFN-24 package for TFT LCD biasing in portable displays.
For engineers reviewing the TPS65101RGER datasheet, TPS65101RGER pinout, TPS65101RGER application, or TPS65101RGER equivalent, this device supports precise voltage sequencing, virtual synchronous converter technology for continuous-conduction-mode operation, fault-tolerant design without output shutdown on fault (unlike TPS65100/05), and compact 4.0 mm × 4.0 mm thermal-enhanced packaging suitable for space-constrained notebook and tablet display subsystems.
Technical Context
The TPS65101RGER implements a fixed-frequency 1.6-MHz PWM boost converter with input-voltage feedforward control and external compensation, enabling <0.2%/A load regulation and stable operation with small 4.7-µH inductors. Its virtual synchronous architecture uses an internal P-MOSFET (rDS(on) ≈10 Ω) paralleled with an external Schottky diode to sustain continuous conduction mode across full load range.
It integrates three independent regulated outputs: VO1 (boost, 5–15 V), VO2 (inverting charge pump, –2 to –12 V), and VO3 (doubling/tripling charge pump, up to 30 V), each with dedicated feedback pins (FB1–FB3), plus a 3.3-V linear regulator controller (FB4) and rail-to-rail VCOM buffer (VCOMIN/VCOM) - all powered from VO1 via SUP pin with internal soft-start and power-on sequencing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.8 V - supports single-cell Li-ion or 3.3/5-V system rails without pre-regulation. |
| VO1 Output | Up to 15 V / 350 mA - main source drive voltage for TFT LCD gate drivers; ±1% accuracy ensures stable panel brightness. |
| VO2 Output | Down to –12 V / 20 mA - regulated negative gate bias; uses external Schottky diodes for low-noise inversion. |
| VO3 Output | Up to 30 V / 20 mA - programmable doubler/tripler for positive gate drive; C2-/MODE pin selects topology. |
| VCOM Buffer | Integrated rail-to-rail buffer with soft start - drives LCD backplane capacitance directly; VCOMIN = GND disables to save quiescent current. |
| Linear Regulator Controller | 3.3-V fixed output (FB4) - controls external NPN/PNP transistor; ENR pin enables independent logic-level control. |
| Switching Frequency | 1.6 MHz (typical) - enables use of 220-nF flying capacitors and miniature 4.7-µH inductors; reduces EMI and board area. |
Pinout & Package
VQFN-24 (RGE) package, 4.00 mm × 4.00 mm body size, PowerPAD™ thermal die exposed on bottom - requires solder connection to PGND for thermal performance (RθJB = 10.7°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pin 7) | Main input supply | Accepts 2.7–5.8 V; powers internal logic and gate drivers; connects to system battery or DC rail. |
| SW (Pins 8,9) | Boost converter switch node | Drives external inductor; requires low-ESR ceramic capacitor and Schottky diode to SUP. |
| SUP (Pin 12) | Supply input for charge pumps & VCOM | Must be connected to VO1 output only; powers all auxiliary regulators - no alternate sources permitted. |
| FB1 (Pin 4) | VO1 feedback input | Resistor divider from VO1 sets output voltage; internal reference = 1.146 V (±1.5 mV). |
| FB2 (Pin 24) | VO2 feedback input | Monitors negative output; regulation threshold = –36 mV to +36 mV around ground reference. |
| FB3 (Pin 15) | VO3 feedback input | Configures positive charge pump output; internal reference = 1.214 V (±27 mV). |
| EN (Pin 3) | Main enable input | Active-high logic; initiates full power-on sequence (VO1 → VO2 → VO3 → VCOM) with internal soft-start. |
| ENR (Pin 2) | Linear regulator enable | Independent control of 3.3-V rail; allows VO4 to remain active during VO1/VO2/VO3 faults. |
| VCOMIN (Pin 14) | VCOM buffer input | Connect to VO1 for standard operation; tie to GND to disable buffer and reduce IQ by ~750 µA. |
| VCOM (Pin 13) | VCOM buffer output | Drives LCD common electrode; capable of ±150 mA peak current at VO1 = 10 V. |
| BASE (Pin 6) | External transistor base drive | Drives NPN/PNP pass transistor for VO4; max 27 mA sink/source supports medium-power LDO designs. |
| PGND (Pins 10,11) | Power ground return | Separate from signal GND; must connect to PowerPAD™ thermal pad for thermal integrity and noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| Virtual Synchronous Converter Technology | Enables continuous conduction mode across full load range using internal P-MOSFET + external Schottky diode - eliminates light-load ringing and simplifies compensation. |
| Independent Power-On Sequencing | VO1 rises first, then VO2 (at 91% VO1), then VO3 (at 91% VO2), then VCOM (when VO3 nominal & VCOMIN >1.0 V) - prevents LCD panel latch-up and ensures safe bias ramp. |
| No Fault Shutdown (TPS65101-specific) | Unlike TPS65100/05, TPS65101 continues operating if VO1/VO2/VO3 fall out of regulation - critical for systems requiring uninterrupted display bias under transient load. |
| Programmable Charge Pump Mode | C2-/MODE pin selects voltage tripler (capacitor connected) or doubler (pin tied to GND) - enables flexible VO3 scaling without component change. |
| Integrated VCOM Buffer with Soft Start | Eliminates large inrush into panel capacitance; VCOM output ramps smoothly to avoid voltage droop on VO1 during startup. |
Applications
| TFT LCD Notebook Display | TFT LCD Monitor Panel |
|---|---|
|
Use Scenario: Powering 13.3-inch WXGA+ TFT panel with integrated gate drivers and analog front-end. IC Role / Device Role / Timing Role: Generates VO1 (12 V), VO2 (–10 V), VO3 (24 V), VCOM (6 V), and VO4 (3.3 V) with synchronized soft-start and no inter-rail dependency. Use Value: Eliminates need for five discrete DC/DC converters; reduces BOM count by ≥70% and PCB area by 45% vs. discrete solution. |
Use Scenario: Biasing 24-inch Full HD industrial monitor with high-contrast VA panel requiring tight VCOM stability. IC Role / Device Role / Timing Role: Delivers low-noise VCOM buffer output (±25 mV offset) with rail-to-rail swing and 1.2-A peak current capability. Use Value: Maintains panel gamma consistency across temperature (–40°C to +85°C) without external op-amp compensation. |
| Portable DVD Player Display | Automotive Infotainment Display |
|
Use Scenario: Supplying dual-gate TFT screen in battery-powered DVD player with dynamic backlight dimming. IC Role / Device Role / Timing Role: Provides VO1 (10 V), VO2 (–8 V), VO3 (20 V) from single 3.7-V Li-ion cell; ENR-controlled VO4 powers video decoder ASIC. Use Value: Achieves >85% efficiency at 100-mA VO1 load; 1.6-MHz switching avoids audible noise in audio-sensitive environment. |
Use Scenario: Driving 7-inch automotive-grade TFT cluster display with ASIL-B functional safety requirements. IC Role / Device Role / Timing Role: Supplies sequenced bias rails while maintaining VO4 operation during VO1/VO2/VO3 faults - satisfies diagnostic coverage for display continuity. Use Value: Enables fail-operational behavior per ISO 26262: no black screen on single-rail failure; no external watchdog required. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LCD bias supply applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65100RGER | Includes full fault detection (VO1/VO2/VO3 shutdown on undervoltage); 2.3-A switch current limit; same pinout and package. | Required where safety-critical shutdown on rail fault is mandated (e.g., medical displays). | Select TPS65100RGER when fault propagation and automatic recovery reset are needed; TPS65101RGER preferred for continuous operation under transient overload. |
| TPS65105RGER | Lower 1.37-A switch current limit; optimized for lower-power panels; identical feature set except reduced VO1 current capability. | Suitable for smaller panels (<10") with <200-mA VO1 demand and tighter thermal constraints. | Choose TPS65105RGER to reduce inductor size and improve light-load efficiency; not recommended for 15-V/350-mA VO1 loads. |
Compared with TPS65100RGER and TPS65105RGER, the TPS65101RGER uniquely retains operational continuity during output faults while delivering full 350-mA VO1 capability - making it optimal for consumer portable displays where user experience prioritizes uptime over fault containment.
Availability
TPS65101RGER is available at Aetrix Electronics and suitable for TFT LCD notebook displays, portable DVD players, tablet PCs, and automotive infotainment systems requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for TPS65101RGER includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs - with over 50 years of innovation in high-reliability power conversion and display interface solutions.
The TPS6510x product line was designed specifically for compact, multi-rail TFT LCD biasing in portable and automotive displays - integrating boost, charge pumps, VCOM buffering, and linear regulation into thermally optimized packages.
FAQ
What is the key functional difference between TPS65101RGER and TPS65100RGER?
The TPS65101RGER does not enter shutdown when any output falls below its power-good threshold, whereas the TPS65100RGER shuts down all outputs upon detecting a fault on VO1, VO2, or VO3. This makes TPS65101RGER ideal for applications where uninterrupted display operation is critical despite transient rail deviations - such as portable media players or automotive clusters where black-screen events degrade user experience.
Can TPS65101RGER operate with a 2.5-V input supply?
No - the TPS65101RGER has a minimum input voltage of 2.7 V per its absolute maximum ratings and recommended operating conditions. Operation below 2.7 V risks undervoltage lockout activation (VIT– = 2.2–2.4 V) and unstable regulation. For 2.5-V systems, consider TI's TPS65136 or alternative low-VIN LCD bias ICs with validated 2.3-V operation.
How is the VO3 output voltage configured on TPS65101RGER?
The VO3 output voltage on TPS65101RGER is set by the external resistor divider on FB3 and scaled by the charge pump topology selected via the C2-/MODE pin: tying C2-/MODE to GND configures voltage doubler mode (VO3 ≈ 2 × VO1); connecting a flying capacitor to C2-/MODE enables tripler mode (VO3 ≈ 3 × VO1). The internal FB3 reference is 1.214 V, enabling precise adjustment across the 30-V range.
Does TPS65101RGER require external compensation components for the main boost converter?
Yes - the TPS65101RGER uses external compensation on the COMP pin (Pin 1) to stabilize the main boost converter loop. A typical network includes a series RC (e.g., 10-kΩ resistor + 1-nF capacitor) from COMP to GND, plus optional capacitor from COMP to FB1. This allows designers to optimize phase margin and transient response for specific inductor/capacitor combinations and load profiles.
What thermal considerations apply to the TPS65101RGER in VQFN-24 (RGE) package?
The TPS65101RGER in RGE package has RθJB = 10.7°C/W and requires the exposed PowerPAD™ thermal die to be soldered to a solid PGND copper plane. Without proper thermal vias and board-level copper area, junction temperature can exceed 125°C under full 350-mA VO1 load. TI recommends ≥6 thermal vias (0.3-mm diameter) under the pad connected to an inner-layer ground plane for reliable 85°C ambient operation.
TPS65101RGER Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Controller, TFT LCD
- Voltage - Input:
- 2.7V ~ 5.8V
- Number of Outputs:
- 4
- Voltage - Output:
- Multiple
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-VQFN (4x4)
TPS65101RGER FAQ
1.How can I place an order for TPS65101RGER through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65101RGER on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65101RGER reliable?
The price and inventory of TPS65101RGER are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65101RGER is usually 5 days.
3.What payment methods are accepted for TPS65101RGER?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65101RGER transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS65101RGER?
TPS65101RGER orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65101RGER order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65101RGER?
For technical support, including TPS65101RGER datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65101RGER requirements.
6.How does Aetrix verify that TPS65101RGER is sourced from the original manufacturer or authorized distributors?
All TPS65101RGER products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65101RGER meets industry standards.
7.What is the process for return or replacement of TPS65101RGER?
All TPS65101RGER units undergo pre-shipment inspection (PSI). If there is an issue with TPS65101RGER, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65101RGER part is unused and in its original packaging.
Return procedure for TPS65101RGER:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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