Texas Instruments TPS65105RGERG4
- Part No.:
- TPS65105RGERG4
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
TPS65105RGERG4.pdf
- Description:
- IC REG CTRLR TFT 4OUT 24VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,140
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Product details
Overview
TPS65105RGERG4 from Texas Instruments is a triple-output LCD power supply IC integrating a 1.6-MHz boost converter (VO1 up to 15 V / 350 mA), a negative charge pump (VO2 down to –12 V / 20 mA), a positive charge pump (VO3 up to 30 V / 20 mA), an integrated VCOM buffer, and a 3.3-V linear regulator controller - all in a single VQFN-24 package. It delivers precise, sequenced bias voltages for TFT LCD source/gate drivers and backplane control in portable displays.
For engineers reviewing the TPS65105RGERG4 datasheet, TPS65105RGERG4 pinout, TPS65105RGERG4 application, or TPS65105RGERG4 equivalent, key selection considerations include its 1.37-A internal switch current limit (vs. 2.3-A in TPS65100/01), fault-protection shutdown behavior, VQFN-24 thermal performance (RθJA = 33°C/W), and support for voltage doubler/tripler charge pump modes via C2-/MODE pin configuration.
Technical Context
The TPS65105RGERG4 implements Virtual Synchronous Converter Technology in its main boost stage, enabling continuous conduction mode across full load range using an external Schottky diode and internal P-MOSFET (rDS(on) = 9–22 Ω) - eliminating light-load ringing and simplifying compensation. Its 1.6-MHz fixed-frequency operation allows use of small 4.7-µH inductors and 220-nF flying capacitors.
All three regulated outputs (VO1, VO2, VO3) are monitored for over/undervoltage faults; the TPS65105 enters full shutdown on any output fault, unlike the TPS65101. Power-on sequencing is hardware-controlled: VO1 rises first, followed by VO2 (at 91% of target), then VO3 (at 91% of target), and finally VCOM (when VCOMIN > 1.0 V and VO3 is stable).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.8 V - supports single-cell Li-ion (3.0–4.2 V) and 5-V rail inputs without pre-regulation. |
| VO1 Boost Output | Up to 15 V / 350 mA - powers TFT LCD source driver with <1% output voltage accuracy and 0.2%/A load regulation. |
| VO2 Negative CP | Down to –12 V / 20 mA - supplies gate driver negative bias; regulated via FB2 with ±36-mV feedback threshold. |
| VO3 Positive CP | Up to 30 V / 20 mA - provides gate driver positive bias; supports voltage doubler (VO3 ≈ 2×VO1) or tripler (VO3 ≈ 3×VO1) modes. |
| VCOM Buffer | Output swing: 2.25 V to VO1–2 V; peak current: 0.65 A at VO1 = 10 V - drives LCD backplane capacitance with soft-start to limit inrush. |
| Linear Regulator Ctrl | 3.3-V fixed output (FB4 referenced); requires external NPN/PNP transistor; base drive current up to 27 mA - generates logic rail from 5-V system supply. |
| Switch Current Limit | 1.37 A typical (TPS65105 only) - enables smaller inductor selection vs. 2.3-A TPS65100/01 variants. |
| Fault Response | Full shutdown on VO1/VO2/VO3 fault - distinguishes TPS65105 from non-shutdown TPS65101 variant. |
Pinout & Package
TPS65105RGERG4 is housed in a 4.00 mm × 4.00 mm VQFN-24 package with exposed thermal pad (PowerPAD™), optimized for low thermal resistance (RθJA = 33°C/W, RθJB = 10.7°C/W). The package requires soldering the thermal pad to PGND for reliable thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN (Pin 3) | Main enable input | Logic-high enables full device sequencing; must be terminated - floating causes undefined operation. |
| ENR (Pin 2) | Linear regulator enable | Independent control of 3.3-V LDO controller; pull low to disable regulator while keeping other rails active. |
| FB1 (Pin 4) | VO1 feedback | Connects to VO1 divider network; regulates VO1 to 1.146-V reference with 10–100-nA bias current. |
| FB2 (Pin 24) | VO2 feedback | Monitors negative charge pump output; reference threshold ±36 mV enables tight regulation of VO2. |
| FB3 (Pin 15) | VO3 feedback | Sets positive charge pump output; 1.214-V internal reference supports accurate VO3 scaling. |
| FB4 (Pin 5) | LDO controller feedback | Fixed 3.3-V output; connects to external transistor emitter for closed-loop regulation. |
| SUP (Pin 12) | Supply input for CP/VCOM | Must connect directly to VO1 - no bypass cap recommended; powers charge pumps and VCOM buffer bias circuits. |
| VCOMIN (Pin 14) | VCOM buffer input | Drives VCOM buffer; tie to GND to disable buffer and reduce quiescent current when unused. |
| DRV (Pin 21) | External CP driver | Drives external Schottky diodes in charge pump stages; timing synchronized to 1.6-MHz oscillator. |
| BASE (Pin 6) | LDO transistor base drive | Supplies up to 27 mA to external NPN/PNP base; requires VIN connection if LDO not used. |
| C2-/MODE (Pin 18) | Charge pump mode select | Connect to GND for doubler mode; connect flying cap for tripler mode - configures VO3 multiplication ratio. |
| REF (Pin 23) | Internal 1.213-V reference | Stable reference output usable for external circuitry; ±0.006-V tolerance over temperature. |
Key Features
| Feature | Design Value |
|---|---|
| Virtual Synchronous Converter | Enables true CCM operation across 0–350 mA load using internal P-MOSFET + external Schottky - eliminates light-load ringing and improves transient response. |
| Hardware Sequencing Logic | Automatic power-up order: VO1 → VO2 → VO3 → VCOM - ensures proper TFT LCD bias ramp without external controllers or timers. |
| Dual-Mode Charge Pump | Selectable voltage doubler (VO3 ≈ 2×VO1) or tripler (VO3 ≈ 3×VO1) via C2-/MODE pin - supports diverse panel voltage requirements with one IC. |
| Fault-Protected Shutdown | Enters full shutdown if VO1, VO2, or VO3 deviates beyond ±6% to ±13% thresholds - prevents damage to sensitive LCD panels during fault conditions. |
| VCOM Soft Start | Gradually ramps VCOM output to avoid large current surges into panel capacitance - reduces stress on VO1 and input supply during startup. |
| Thermal-Efficient VQFN | 4×4-mm VQFN-24 with PowerPAD™ achieves RθJB = 10.7°C/W - enables high-power operation in space-constrained portable display designs. |
Applications
| TFT LCD Notebook Display | TFT LCD Monitor |
|---|---|
|
Use Scenario: Powers 10–17-inch notebook LCD panels requiring +12 V source, –7 V gate, +22 V gate, and 3.3-V logic rail from a 3.3-V or 5-V system supply. IC Role / Device Role / Timing Role: Single-chip triple-output bias generator with integrated VCOM buffer and LDO controller - replaces discrete DC/DC + LDO + op-amp solutions. Use Value: Reduces BOM count by ≥7 components and PCB area by >40% versus discrete implementation while ensuring safe power-on sequencing. |
Use Scenario: Supplies bias voltages for 24-inch industrial monitor panels operating from 5-V wall adapter input, with requirement for fault shutdown on gate driver rail failure. IC Role / Device Role / Timing Role: Fault-protected LCD power manager - monitors VO1/VO2/VO3 and shuts down all outputs within 10 µs of fault detection. Use Value: Prevents permanent LCD panel damage caused by unregulated gate driver voltages during capacitor aging or ESD events. |
| Portable DVD Player | Automotive Infotainment Display |
|
Use Scenario: Generates +10 V, –5 V, +18 V, and 3.3-V rails for 7-inch resistive-touch LCD in battery-powered DVD player with 3.7-V Li-ion input. IC Role / Device Role / Timing Role: Compact LCD supply with 1.6-MHz switching - enables use of 220-nF ceramic flying caps and 4.7-µH shielded inductor for ultra-thin form factor. Use Value: Achieves >85% efficiency at 100-mA load while maintaining <15-mm² solution size - critical for handheld thermal and space constraints. |
Use Scenario: Provides bias for 10.1-inch automotive-grade TFT display in car navigation system, operating across –40°C to +85°C ambient with 5-V system rail. IC Role / Device Role / Timing Role: Automotive-qualified LCD PMIC - features thermal shutdown (160°C), –40°C to +125°C junction rating, and robust ESD protection (±2-kV HBM). Use Value: Meets AEC-Q100 stress test requirements for display subsystems without derating or external thermal management. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LCD power supply applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65100RGER | Higher 2.3-A switch current limit; identical pinout and feature set except fault response and current rating. | Preferred for higher-power panels requiring >300 mA VO1 current or larger inductor headroom. | Select TPS65100RGER when VO1 load exceeds 300 mA or when design margin requires higher current limit. |
| TPS65101RGER | No fault-induced shutdown - continues operating even if VO2 or VO3 falls out of regulation. | Suitable for non-safety-critical displays where continuous operation outweighs fault protection. | Choose TPS65101RGER only when system-level monitoring handles fault conditions and uninterrupted bias is mandatory. |
Compared with TPS65100RGER and TPS65101RGER, the TPS65105RGERG4 offers lower switch current (1.37 A) and mandatory fault shutdown - making it optimal for cost-sensitive, medium-power portable displays where reliability and compact magnetics are prioritized over maximum output current.
Availability
TPS65105RGERG4 is available at Aetrix Electronics and suitable for TFT LCD notebooks, portable DVD players, and automotive infotainment displays requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for TPS65105RGERG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in display power solutions.
The TPS6510x product line was designed specifically for compact, high-efficiency bias generation in TFT LCD systems - integrating boost, dual charge pumps, VCOM buffering, and LDO control to replace multi-chip discrete solutions.
FAQ
What is the function of the C2-/MODE pin on the TPS65105RGERG4?
The C2-/MODE pin (Pin 18) configures the positive charge pump operation mode: connecting it to GND selects voltage doubler mode (VO3 ≈ 2×VO1), while connecting a flying capacitor between C2-/MODE and C2+ enables voltage tripler mode (VO3 ≈ 3×VO1). This pin also serves as the negative terminal for the flying capacitor in tripler mode. The TPS65105RGERG4 uses this pin to adapt VO3 output to varying LCD panel voltage requirements without changing external components.
Does the TPS65105RGERG4 provide fault protection for all outputs?
Yes, the TPS65105RGERG4 provides comprehensive fault protection: VO1, VO2, and VO3 are continuously monitored for overvoltage and undervoltage conditions. If any output deviates beyond its specified threshold (e.g., VO1 ±6% to ±12%), the device enters full shutdown - disabling all regulators and charge pumps. This behavior distinguishes the TPS65105RGERG4 from the TPS65101, which lacks this shutdown feature.
How does the TPS65105RGERG4 achieve continuous conduction mode at light loads?
The TPS65105RGERG4 uses Virtual Synchronous Converter Technology: it combines an external Schottky diode with an internal P-channel MOSFET (rDS(on) ≈ 9–22 Ω) across the SW–SUP path. During light loads, the internal MOSFET conducts reverse current, allowing inductor current to go negative and sustaining continuous conduction mode. This eliminates switching-frequency variation and output ripple spikes seen in standard nonsynchronous boost converters - a key advantage of the TPS65105RGERG4.
Can the VCOM buffer in the TPS65105RGERG4 be disabled to reduce power consumption?
Yes, the VCOM buffer in the TPS65105RGERG4 can be fully disabled to reduce quiescent current: tie VCOMIN (Pin 14) to GND. When VCOMIN is grounded, the buffer shuts down and VCOM (Pin 13) may be left open. This reduces total device quiescent current by ~750–1300 µA, as confirmed in the electrical characteristics table under II(QVCOM). The TPS65105RGERG4 supports this low-power mode without affecting other outputs.
What is the purpose of the SUP pin on the TPS65105RGERG4?
The SUP pin (Pin 12) is the dedicated supply input for the negative charge pump, positive charge pump, and VCOM buffer bias circuits. It must be connected directly to VO1 - the output of the main boost converter - and must not be tied to any other voltage source. TI explicitly advises against placing a bypass capacitor directly on SUP, as it can destabilize charge pump operation. This architecture ensures all auxiliary rails track VO1, simplifying design and improving regulation accuracy in the TPS65105RGERG4.
TPS65105RGERG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Applications:
- Controller, TFT LCD
- Voltage - Input:
- 2.7V ~ 5.8V
- Number of Outputs:
- 4
- Voltage - Output:
- Multiple
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-VQFN (4x4)
TPS65105RGERG4 FAQ
1.How can I place an order for TPS65105RGERG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65105RGERG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65105RGERG4 reliable?
The price and inventory of TPS65105RGERG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65105RGERG4 is usually 5 days.
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Once your TPS65105RGERG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65105RGERG4?
For technical support, including TPS65105RGERG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65105RGERG4 requirements.
6.How does Aetrix verify that TPS65105RGERG4 is sourced from the original manufacturer or authorized distributors?
All TPS65105RGERG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65105RGERG4 meets industry standards.
7.What is the process for return or replacement of TPS65105RGERG4?
All TPS65105RGERG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS65105RGERG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65105RGERG4 part is unused and in its original packaging.
Return procedure for TPS65105RGERG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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